src/gallium/winsys/amdgpu/drm/amdgpu_bo.h

   1 /*
   2  * Copyright © 2008 Jérôme Glisse
   3  * Copyright © 2011 Marek Olšák <maraeo@gmail.com>
   4  * Copyright © 2015 Advanced Micro Devices, Inc.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining
   8  * a copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  17  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
  19  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * The above copyright notice and this permission notice (including the
  25  * next paragraph) shall be included in all copies or substantial portions
  26  * of the Software.
  27  */
  28 /*
  29  * Authors:
  30  *      Marek Olšák <maraeo@gmail.com>
  31  */
  32
  33 #ifndef AMDGPU_BO_H
  34 #define AMDGPU_BO_H
  35
  36 #include "amdgpu_winsys.h"
  37
  38 #include "pipebuffer/pb_slab.h"
  39
  40 struct amdgpu_sparse_backing_chunk;
  41
  42 /*
  43  * Sub-allocation information for a real buffer used as backing memory of a
  44  * sparse buffer.
  45  */
  46 struct amdgpu_sparse_backing {
  47    struct list_head list;
  48
  49    struct amdgpu_winsys_bo *bo;
  50
  51    /* Sorted list of free chunks. */
  52    struct amdgpu_sparse_backing_chunk *chunks;
  53    uint32_t max_chunks;
  54    uint32_t num_chunks;
  55 };
  56
  57 struct amdgpu_sparse_commitment {
  58    struct amdgpu_sparse_backing *backing;
  59    uint32_t page;
  60 };
  61
  62 struct amdgpu_winsys_bo {
  63    struct pb_buffer base;
  64    union {
  65       struct {
  66          struct pb_cache_entry cache_entry;
  67
  68          amdgpu_va_handle va_handle;
  69          int map_count;
  70          bool use_reusable_pool;
  71
  72          struct list_head global_list_item;
  73       } real;
  74       struct {
  75          struct pb_slab_entry entry;
  76          struct amdgpu_winsys_bo *real;
  77       } slab;
  78       struct {
  79          mtx_t commit_lock;
  80          amdgpu_va_handle va_handle;
  81          enum radeon_bo_flag flags;
  82
  83          uint32_t num_va_pages;
  84          uint32_t num_backing_pages;
  85
  86          struct list_head backing;
  87
  88          /* Commitment information for each page of the virtual memory area. */
  89          struct amdgpu_sparse_commitment *commitments;
  90       } sparse;
  91    } u;
  92
  93    struct amdgpu_winsys *ws;
  94    void *user_ptr; /* from buffer_from_ptr */
  95
  96    amdgpu_bo_handle bo; /* NULL for slab entries and sparse buffers */
  97    bool sparse;
  98    uint32_t unique_id;
  99    uint64_t va;
 100    enum radeon_bo_domain initial_domain;
 101
 102    /* how many command streams is this bo referenced in? */
 103    int num_cs_references;
 104
 105    /* how many command streams, which are being emitted in a separate
 106     * thread, is this bo referenced in? */
 107    volatile int num_active_ioctls;
 108
 109    /* whether buffer_get_handle or buffer_from_handle was called,
 110     * it can only transition from false to true
 111     */
 112    volatile int is_shared; /* bool (int for atomicity) */
 113
 114    /* Fences for buffer synchronization. */
 115    unsigned num_fences;
 116    unsigned max_fences;
 117    struct pipe_fence_handle **fences;
 118 };
 119
 120 struct amdgpu_slab {
 121    struct pb_slab base;
 122    struct amdgpu_winsys_bo *buffer;
 123    struct amdgpu_winsys_bo *entries;
 124 };
 125
 126 bool amdgpu_bo_can_reclaim(struct pb_buffer *_buf);
 127 void amdgpu_bo_destroy(struct pb_buffer *_buf);
 128 void amdgpu_bo_init_functions(struct amdgpu_winsys *ws);
 129
 130 bool amdgpu_bo_can_reclaim_slab(void *priv, struct pb_slab_entry *entry);
 131 struct pb_slab *amdgpu_bo_slab_alloc(void *priv, unsigned heap,
 132                                      unsigned entry_size,
 133                                      unsigned group_index);
 134 void amdgpu_bo_slab_free(void *priv, struct pb_slab *slab);
 135
 136 static inline
 137 struct amdgpu_winsys_bo *amdgpu_winsys_bo(struct pb_buffer *bo)
 138 {
 139    return (struct amdgpu_winsys_bo *)bo;
 140 }
 141
 142 static inline
 143 struct amdgpu_slab *amdgpu_slab(struct pb_slab *slab)
 144 {
 145    return (struct amdgpu_slab *)slab;
 146 }
 147
 148 static inline
 149 void amdgpu_winsys_bo_reference(struct amdgpu_winsys_bo **dst,
 150                                 struct amdgpu_winsys_bo *src)
 151 {
 152    pb_reference((struct pb_buffer**)dst, (struct pb_buffer*)src);
 153 }
 154
 155 #endif