src/gallium/winsys/drm/intel/dri/intel_context.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef INTEL_CONTEXT_H
  29 #define INTEL_CONTEXT_H
  30
  31 #include <stdint.h>
  32 #include "drm.h"
  33
  34 #include "pipe/p_debug.h"
  35
  36 #include "intel_screen.h"
  37 #include "i915_drm.h"
  38
  39 #include "intel_be_context.h"
  40
  41
  42 struct pipe_context;
  43 struct intel_context;
  44 struct _DriBufferObject;
  45 struct st_context;
  46
  47
  48 #define INTEL_MAX_FIXUP 64
  49
  50 /**
  51  * Intel rendering context, contains a state tracker and intel-specific info.
  52  */
  53 struct intel_context
  54 {
  55    struct intel_be_context base;
  56    struct st_context *st;
  57
  58    struct _DriFenceObject *last_swap_fence;
  59    struct _DriFenceObject *first_swap_fence;
  60
  61 //   struct intel_batchbuffer *batch;
  62
  63    boolean locked;
  64    char *prevLockFile;
  65    int prevLockLine;
  66
  67    uint irqsEmitted;
  68    drm_i915_irq_wait_t iw;
  69
  70    drm_context_t hHWContext;
  71    drmLock *driHwLock;
  72    int driFd;
  73
  74    __DRIdrawablePrivate *driDrawable;
  75    __DRIscreenPrivate *driScreen;
  76    struct intel_screen *intelScreen;
  77    drmI830Sarea *sarea;
  78
  79    uint lastStamp;
  80
  81    /**
  82     * Configuration cache
  83     */
  84    driOptionCache optionCache;
  85 };
  86
  87
  88
  89 /**
  90  * Intel framebuffer.
  91  */
  92 struct intel_framebuffer
  93 {
  94    struct st_framebuffer *stfb;
  95
  96    /* other fields TBD */
  97    int other;
  98 };
  99
 100
 101
 102
 103 /* These are functions now:
 104  */
 105 void LOCK_HARDWARE( struct intel_context *intel );
 106 void UNLOCK_HARDWARE( struct intel_context *intel );
 107
 108 extern char *__progname;
 109
 110
 111
 112 /* ================================================================
 113  * Debugging:
 114  */
 115 #ifdef DEBUG
 116 extern int __intel_debug;
 117
 118 #define DEBUG_SWAP      0x1
 119 #define DEBUG_LOCK      0x2
 120 #define DEBUG_IOCTL     0x4
 121 #define DEBUG_BATCH     0x8
 122
 123 #define DBG(flag, ...)  do {                    \
 124    if (__intel_debug & (DEBUG_##flag))          \
 125       printf(__VA_ARGS__);              \
 126 } while(0)
 127
 128 #else
 129 #define DBG(flag, ...)
 130 #endif
 131
 132
 133
 134 #define PCI_CHIP_845_G                  0x2562
 135 #define PCI_CHIP_I830_M                 0x3577
 136 #define PCI_CHIP_I855_GM                0x3582
 137 #define PCI_CHIP_I865_G                 0x2572
 138 #define PCI_CHIP_I915_G                 0x2582
 139 #define PCI_CHIP_I915_GM                0x2592
 140 #define PCI_CHIP_I945_G                 0x2772
 141 #define PCI_CHIP_I945_GM                0x27A2
 142 #define PCI_CHIP_I945_GME               0x27AE
 143 #define PCI_CHIP_G33_G                  0x29C2
 144 #define PCI_CHIP_Q35_G                  0x29B2
 145 #define PCI_CHIP_Q33_G                  0x29D2
 146
 147
 148 /** Cast wrapper */
 149 static INLINE struct intel_context *
 150 intel_context(__DRIcontextPrivate *driContextPriv)
 151 {
 152    return (struct intel_context *) driContextPriv->driverPrivate;
 153 }
 154
 155
 156 /** Cast wrapper */
 157 static INLINE struct intel_framebuffer *
 158 intel_framebuffer(__DRIdrawablePrivate * driDrawPriv)
 159 {
 160    return (struct intel_framebuffer *) driDrawPriv->driverPrivate;
 161 }
 162
 163
 164 #endif