2 #include "intel_be_device.h"
4 #include "pipe/internal/p_winsys_screen.h"
5 #include "pipe/p_defines.h"
6 #include "pipe/p_state.h"
7 #include "pipe/p_inlines.h"
8 #include "util/u_memory.h"
10 #include "intel_be_fence.h"
12 #include "i915simple/i915_screen.h"
16 * Turn a pipe winsys into an intel/pipe winsys:
18 static INLINE
struct intel_be_device
*
19 intel_be_device(struct pipe_winsys
*winsys
)
21 return (struct intel_be_device
*)winsys
;
29 intel_be_buffer_map(struct pipe_winsys
*winsys
,
30 struct pipe_buffer
*buf
,
33 drm_intel_bo
*bo
= intel_bo(buf
);
37 if (flags
& PIPE_BUFFER_USAGE_CPU_WRITE
)
40 ret
= drm_intel_bo_map(bo
, write
);
49 intel_be_buffer_unmap(struct pipe_winsys
*winsys
,
50 struct pipe_buffer
*buf
)
52 drm_intel_bo_unmap(intel_bo(buf
));
56 intel_be_buffer_destroy(struct pipe_winsys
*winsys
,
57 struct pipe_buffer
*buf
)
59 drm_intel_bo_unreference(intel_bo(buf
));
63 static struct pipe_buffer
*
64 intel_be_buffer_create(struct pipe_winsys
*winsys
,
69 struct intel_be_buffer
*buffer
= CALLOC_STRUCT(intel_be_buffer
);
70 struct intel_be_device
*dev
= intel_be_device(winsys
);
71 drm_intel_bufmgr
*pool
;
77 buffer
->base
.refcount
= 1;
78 buffer
->base
.alignment
= alignment
;
79 buffer
->base
.usage
= usage
;
80 buffer
->base
.size
= size
;
82 if (usage
& (PIPE_BUFFER_USAGE_VERTEX
| PIPE_BUFFER_USAGE_CONSTANT
)) {
84 name
= "gallium3d_local";
85 pool
= dev
->pools
.gem
;
86 } else if (usage
& PIPE_BUFFER_USAGE_CUSTOM
) {
87 /* For vertex buffers */
88 name
= "gallium3d_internal_vertex";
89 pool
= dev
->pools
.gem
;
92 name
= "gallium3d_regular";
93 pool
= dev
->pools
.gem
;
96 buffer
->bo
= drm_intel_bo_alloc(pool
, name
, size
, alignment
);
101 return &buffer
->base
;
108 static struct pipe_buffer
*
109 intel_be_user_buffer_create(struct pipe_winsys
*winsys
, void *ptr
, unsigned bytes
)
111 struct intel_be_buffer
*buffer
= CALLOC_STRUCT(intel_be_buffer
);
112 struct intel_be_device
*dev
= intel_be_device(winsys
);
118 buffer
->base
.refcount
= 1;
119 buffer
->base
.alignment
= 0;
120 buffer
->base
.usage
= 0;
121 buffer
->base
.size
= bytes
;
123 buffer
->bo
= drm_intel_bo_alloc(dev
->pools
.gem
,
124 "gallium3d_user_buffer",
130 ret
= drm_intel_bo_subdata(buffer
->bo
,
136 return &buffer
->base
;
144 intel_be_buffer_from_handle(struct pipe_winsys
*winsys
,
145 const char* name
, unsigned handle
)
147 struct intel_be_device
*dev
= intel_be_device(winsys
);
148 struct intel_be_buffer
*buffer
= CALLOC_STRUCT(intel_be_buffer
);
153 buffer
->bo
= drm_intel_bo_gem_create_from_name(dev
->pools
.gem
, name
, handle
);
158 buffer
->base
.refcount
= 1;
159 buffer
->base
.alignment
= buffer
->bo
->align
;
160 buffer
->base
.usage
= PIPE_BUFFER_USAGE_GPU_READ
|
161 PIPE_BUFFER_USAGE_GPU_WRITE
|
162 PIPE_BUFFER_USAGE_CPU_READ
|
163 PIPE_BUFFER_USAGE_CPU_WRITE
;
164 buffer
->base
.size
= buffer
->bo
->size
;
166 return &buffer
->base
;
174 intel_be_handle_from_buffer(struct pipe_winsys
*winsys
,
175 struct pipe_buffer
*buf
)
177 drm_intel_bo
*bo
= intel_bo(buf
);
186 intel_be_fence_refunref(struct pipe_winsys
*sws
,
187 struct pipe_fence_handle
**ptr
,
188 struct pipe_fence_handle
*fence
)
190 struct intel_be_fence
**p
= (struct intel_be_fence
**)ptr
;
191 struct intel_be_fence
*f
= (struct intel_be_fence
*)fence
;
196 intel_be_fence_reference(f
);
199 intel_be_fence_unreference(*p
);
205 intel_be_fence_signalled(struct pipe_winsys
*sws
,
206 struct pipe_fence_handle
*fence
,
215 intel_be_fence_finish(struct pipe_winsys
*sws
,
216 struct pipe_fence_handle
*fence
,
219 struct intel_be_fence
*f
= (struct intel_be_fence
*)fence
;
221 /* fence already expired */
225 drm_intel_bo_wait_rendering(f
->bo
);
226 drm_intel_bo_unreference(f
->bo
);
237 intel_be_init_device(struct intel_be_device
*dev
, int fd
, unsigned id
)
240 dev
->max_batch_size
= 16 * 4096;
241 dev
->max_vertex_size
= 128 * 4096;
243 dev
->base
.buffer_create
= intel_be_buffer_create
;
244 dev
->base
.user_buffer_create
= intel_be_user_buffer_create
;
245 dev
->base
.buffer_map
= intel_be_buffer_map
;
246 dev
->base
.buffer_unmap
= intel_be_buffer_unmap
;
247 dev
->base
.buffer_destroy
= intel_be_buffer_destroy
;
249 /* Not used anymore */
250 dev
->base
.surface_buffer_create
= NULL
;
252 dev
->base
.fence_reference
= intel_be_fence_refunref
;
253 dev
->base
.fence_signalled
= intel_be_fence_signalled
;
254 dev
->base
.fence_finish
= intel_be_fence_finish
;
256 dev
->pools
.gem
= drm_intel_bufmgr_gem_init(dev
->fd
, dev
->max_batch_size
);
262 intel_be_destroy_device(struct intel_be_device
*dev
)
264 drm_intel_bufmgr_destroy(dev
->pools
.gem
);