src/glsl/nir/nir_intrinsics.h

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *
  26  */
  27
  28 /**
  29  * This header file defines all the available intrinsics in one place. It
  30  * expands to a list of macros of the form:
  31  *
  32  * INTRINSIC(name, num_srcs, src_components, has_dest, dest_components,
  33  *              num_variables, num_indices, flags)
  34  *
  35  * Which should correspond one-to-one with the nir_intrinsic_info structure. It
  36  * is included in both ir.h to create the nir_intrinsic enum (with members of
  37  * the form nir_intrinsic_(name)) and and in opcodes.c to create
  38  * nir_intrinsic_infos, which is a const array of nir_intrinsic_info structures
  39  * for each intrinsic.
  40  */
  41
  42 #define ARR(...) { __VA_ARGS__ }
  43
  44
  45 INTRINSIC(load_var, 0, ARR(), true, 0, 1, 0, NIR_INTRINSIC_CAN_ELIMINATE)
  46 INTRINSIC(store_var, 1, ARR(0), false, 0, 1, 0, 0)
  47 INTRINSIC(copy_var, 0, ARR(), false, 0, 2, 0, 0)
  48
  49 /*
  50  * Interpolation of input.  The interp_var_at* intrinsics are similar to the
  51  * load_var intrinsic acting an a shader input except that they interpolate
  52  * the input differently.  The at_sample and at_offset intrinsics take an
  53  * aditional source that is a integer sample id or a vec2 position offset
  54  * respectively.
  55  */
  56
  57 INTRINSIC(interp_var_at_centroid, 0, ARR(0), true, 0, 1, 0,
  58           NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
  59 INTRINSIC(interp_var_at_sample, 1, ARR(1), true, 0, 1, 0,
  60           NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
  61 INTRINSIC(interp_var_at_offset, 1, ARR(2), true, 0, 1, 0,
  62           NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
  63
  64 /*
  65  * Ask the driver for the size of a given buffer. It takes the buffer index
  66  * as source.
  67  */
  68 INTRINSIC(get_buffer_size, 1, ARR(1), true, 1, 0, 0,
  69           NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
  70
  71 /*
  72  * a barrier is an intrinsic with no inputs/outputs but which can't be moved
  73  * around/optimized in general
  74  */
  75 #define BARRIER(name) INTRINSIC(name, 0, ARR(), false, 0, 0, 0, 0)
  76
  77 BARRIER(barrier)
  78 BARRIER(discard)
  79
  80 /*
  81  * Memory barrier with semantics analogous to the memoryBarrier() GLSL
  82  * intrinsic.
  83  */
  84 BARRIER(memory_barrier)
  85
  86 /** A conditional discard, with a single boolean source. */
  87 INTRINSIC(discard_if, 1, ARR(1), false, 0, 0, 0, 0)
  88
  89 /**
  90  * Basic Geometry Shader intrinsics.
  91  *
  92  * emit_vertex implements GLSL's EmitStreamVertex() built-in.  It takes a single
  93  * index, which is the stream ID to write to.
  94  *
  95  * end_primitive implements GLSL's EndPrimitive() built-in.
  96  */
  97 INTRINSIC(emit_vertex,   0, ARR(), false, 0, 0, 1, 0)
  98 INTRINSIC(end_primitive, 0, ARR(), false, 0, 0, 1, 0)
  99
 100 /**
 101  * Geometry Shader intrinsics with a vertex count.
 102  *
 103  * Alternatively, drivers may implement these intrinsics, and use
 104  * nir_lower_gs_intrinsics() to convert from the basic intrinsics.
 105  *
 106  * These maintain a count of the number of vertices emitted, as an additional
 107  * unsigned integer source.
 108  */
 109 INTRINSIC(emit_vertex_with_counter, 1, ARR(1), false, 0, 0, 1, 0)
 110 INTRINSIC(end_primitive_with_counter, 1, ARR(1), false, 0, 0, 1, 0)
 111 INTRINSIC(set_vertex_count, 1, ARR(1), false, 0, 0, 0, 0)
 112
 113 /*
 114  * Atomic counters
 115  *
 116  * The *_var variants take an atomic_uint nir_variable, while the other,
 117  * lowered, variants take a constant buffer index and register offset.
 118  */
 119
 120 #define ATOMIC(name, flags) \
 121    INTRINSIC(atomic_counter_##name##_var, 0, ARR(), true, 1, 1, 0, flags) \
 122    INTRINSIC(atomic_counter_##name, 1, ARR(1), true, 1, 0, 1, flags)
 123
 124 ATOMIC(inc, 0)
 125 ATOMIC(dec, 0)
 126 ATOMIC(read, NIR_INTRINSIC_CAN_ELIMINATE)
 127
 128 /*
 129  * Image load, store and atomic intrinsics.
 130  *
 131  * All image intrinsics take an image target passed as a nir_variable.  Image
 132  * variables contain a number of memory and layout qualifiers that influence
 133  * the semantics of the intrinsic.
 134  *
 135  * All image intrinsics take a four-coordinate vector and a sample index as
 136  * first two sources, determining the location within the image that will be
 137  * accessed by the intrinsic.  Components not applicable to the image target
 138  * in use are undefined.  Image store takes an additional four-component
 139  * argument with the value to be written, and image atomic operations take
 140  * either one or two additional scalar arguments with the same meaning as in
 141  * the ARB_shader_image_load_store specification.
 142  */
 143 INTRINSIC(image_load, 2, ARR(4, 1), true, 4, 1, 0,
 144           NIR_INTRINSIC_CAN_ELIMINATE)
 145 INTRINSIC(image_store, 3, ARR(4, 1, 4), false, 0, 1, 0, 0)
 146 INTRINSIC(image_atomic_add, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
 147 INTRINSIC(image_atomic_min, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
 148 INTRINSIC(image_atomic_max, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
 149 INTRINSIC(image_atomic_and, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
 150 INTRINSIC(image_atomic_or, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
 151 INTRINSIC(image_atomic_xor, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
 152 INTRINSIC(image_atomic_exchange, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
 153 INTRINSIC(image_atomic_comp_swap, 4, ARR(4, 1, 1, 1), true, 1, 1, 0, 0)
 154 INTRINSIC(image_size, 0, ARR(), true, 4, 1, 0,
 155           NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
 156 INTRINSIC(image_samples, 0, ARR(), true, 1, 1, 0,
 157           NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
 158
 159 /*
 160  * SSBO atomic intrinsics
 161  *
 162  * All of the SSBO atomic memory operations read a value from memory,
 163  * compute a new value using one of the operations below, write the new
 164  * value to memory, and return the original value read.
 165  *
 166  * All operations take 3 sources except CompSwap that takes 4. These
 167  * sources represent:
 168  *
 169  * 0: The SSBO buffer index.
 170  * 1: The offset into the SSBO buffer of the variable that the atomic
 171  *    operation will operate on.
 172  * 2: The data parameter to the atomic function (i.e. the value to add
 173  *    in ssbo_atomic_add, etc).
 174  * 3: For CompSwap only: the second data parameter.
 175  */
 176 INTRINSIC(ssbo_atomic_add, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
 177 INTRINSIC(ssbo_atomic_min, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
 178 INTRINSIC(ssbo_atomic_max, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
 179 INTRINSIC(ssbo_atomic_and, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
 180 INTRINSIC(ssbo_atomic_or, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
 181 INTRINSIC(ssbo_atomic_xor, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
 182 INTRINSIC(ssbo_atomic_exchange, 3, ARR(1, 1, 1), true, 1, 0, 0, 0)
 183 INTRINSIC(ssbo_atomic_comp_swap, 4, ARR(1, 1, 1, 1), true, 1, 0, 0, 0)
 184
 185 #define SYSTEM_VALUE(name, components, num_indices) \
 186    INTRINSIC(load_##name, 0, ARR(), true, components, 0, num_indices, \
 187    NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
 188
 189 SYSTEM_VALUE(front_face, 1, 0)
 190 SYSTEM_VALUE(vertex_id, 1, 0)
 191 SYSTEM_VALUE(vertex_id_zero_base, 1, 0)
 192 SYSTEM_VALUE(base_vertex, 1, 0)
 193 SYSTEM_VALUE(instance_id, 1, 0)
 194 SYSTEM_VALUE(sample_id, 1, 0)
 195 SYSTEM_VALUE(sample_pos, 2, 0)
 196 SYSTEM_VALUE(sample_mask_in, 1, 0)
 197 SYSTEM_VALUE(invocation_id, 1, 0)
 198 SYSTEM_VALUE(local_invocation_id, 3, 0)
 199 SYSTEM_VALUE(work_group_id, 3, 0)
 200 SYSTEM_VALUE(user_clip_plane, 4, 1) /* const_index[0] is user_clip_plane[idx] */
 201 SYSTEM_VALUE(num_work_groups, 3, 0)
 202
 203 /*
 204  * The format of the indices depends on the type of the load.  For uniforms,
 205  * the first index is the base address and the second index is an offset that
 206  * should be added to the base address.  (This way you can determine in the
 207  * back-end which variable is being accessed even in an array.)  For inputs,
 208  * the one and only index corresponds to the attribute slot.  UBO loads
 209  * have two indices the first of which is the descriptor set and the second
 210  * is the base address to load from.
 211  *
 212  * UBO loads have a (possibly constant) source which is the UBO buffer index.
 213  * For each type of load, the _indirect variant has one additional source
 214  * (the second in the case of UBO's) that is the is an indirect to be added to
 215  * the constant address or base offset to compute the final offset.
 216  *
 217  * For vector backends, the address is in terms of one vec4, and so each array
 218  * element is +4 scalar components from the previous array element. For scalar
 219  * backends, the address is in terms of a single 4-byte float/int and arrays
 220  * elements begin immediately after the previous array element.
 221  */
 222
 223 #define LOAD(name, extra_srcs, indices, flags) \
 224    INTRINSIC(load_##name, extra_srcs, ARR(1), true, 0, 0, indices, flags) \
 225    INTRINSIC(load_##name##_indirect, extra_srcs + 1, ARR(1, 1), \
 226              true, 0, 0, indices, flags)
 227
 228 LOAD(uniform, 0, 2, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
 229 LOAD(ubo, 1, 2, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
 230 LOAD(input, 0, 1, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
 231 LOAD(ssbo, 1, 1, NIR_INTRINSIC_CAN_ELIMINATE)
 232
 233 /*
 234  * Stores work the same way as loads, except now the first register input is
 235  * the value or array to store and the optional second input is the indirect
 236  * offset. SSBO stores are similar, but they accept an extra source for the
 237  * block index and an extra index with the writemask to use.
 238  */
 239
 240 #define STORE(name, extra_srcs, extra_srcs_size, extra_indices, flags) \
 241    INTRINSIC(store_##name, 1 + extra_srcs, \
 242              ARR(0, extra_srcs_size, extra_srcs_size, extra_srcs_size), \
 243              false, 0, 0, 1 + extra_indices, flags) \
 244    INTRINSIC(store_##name##_indirect, 2 + extra_srcs, \
 245              ARR(0, 1, extra_srcs_size, extra_srcs_size), \
 246              false, 0, 0, 1 + extra_indices, flags)
 247
 248 STORE(output, 0, 0, 0, 0)
 249 STORE(ssbo, 1, 1, 1, 0)
 250
 251 LAST_INTRINSIC(store_ssbo_indirect)