nir: Get rid of *_indirect variants of input/output load/store intrinsics
[mesa.git] / src / glsl / nir / nir_lower_io.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 * Jason Ekstrand (jason@jlekstrand.net)
26 *
27 */
28
29 /*
30 * This lowering pass converts references to input/output variables with
31 * loads/stores to actual input/output intrinsics.
32 */
33
34 #include "nir.h"
35 #include "nir_builder.h"
36
37 struct lower_io_state {
38 nir_builder builder;
39 void *mem_ctx;
40 int (*type_size)(const struct glsl_type *type);
41 nir_variable_mode mode;
42 };
43
44 void
45 nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
46 int (*type_size)(const struct glsl_type *))
47 {
48 unsigned location = 0;
49
50 nir_foreach_variable(var, var_list) {
51 /*
52 * UBO's have their own address spaces, so don't count them towards the
53 * number of global uniforms
54 */
55 if ((var->data.mode == nir_var_uniform || var->data.mode == nir_var_shader_storage) &&
56 var->interface_type != NULL)
57 continue;
58
59 var->data.driver_location = location;
60 location += type_size(var->type);
61 }
62
63 *size = location;
64 }
65
66 /**
67 * Returns true if we're processing a stage whose inputs are arrays indexed
68 * by a vertex number (such as geometry shader inputs).
69 */
70 static bool
71 is_per_vertex_input(struct lower_io_state *state, nir_variable *var)
72 {
73 gl_shader_stage stage = state->builder.shader->stage;
74
75 return var->data.mode == nir_var_shader_in && !var->data.patch &&
76 (stage == MESA_SHADER_TESS_CTRL ||
77 stage == MESA_SHADER_TESS_EVAL ||
78 stage == MESA_SHADER_GEOMETRY);
79 }
80
81 static bool
82 is_per_vertex_output(struct lower_io_state *state, nir_variable *var)
83 {
84 gl_shader_stage stage = state->builder.shader->stage;
85 return var->data.mode == nir_var_shader_out && !var->data.patch &&
86 stage == MESA_SHADER_TESS_CTRL;
87 }
88
89 static nir_ssa_def *
90 get_io_offset(nir_builder *b, nir_deref_var *deref,
91 nir_ssa_def **vertex_index,
92 int (*type_size)(const struct glsl_type *))
93 {
94 nir_deref *tail = &deref->deref;
95
96 /* For per-vertex input arrays (i.e. geometry shader inputs), keep the
97 * outermost array index separate. Process the rest normally.
98 */
99 if (vertex_index != NULL) {
100 tail = tail->child;
101 assert(tail->deref_type == nir_deref_type_array);
102 nir_deref_array *deref_array = nir_deref_as_array(tail);
103
104 nir_ssa_def *vtx = nir_imm_int(b, deref_array->base_offset);
105 if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
106 vtx = nir_iadd(b, vtx, nir_ssa_for_src(b, deref_array->indirect, 1));
107 }
108 *vertex_index = vtx;
109 }
110
111 /* Just emit code and let constant-folding go to town */
112 nir_ssa_def *offset = nir_imm_int(b, 0);
113
114 while (tail->child != NULL) {
115 const struct glsl_type *parent_type = tail->type;
116 tail = tail->child;
117
118 if (tail->deref_type == nir_deref_type_array) {
119 nir_deref_array *deref_array = nir_deref_as_array(tail);
120 unsigned size = type_size(tail->type);
121
122 offset = nir_iadd(b, offset,
123 nir_imm_int(b, size * deref_array->base_offset));
124
125 if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
126 nir_ssa_def *mul =
127 nir_imul(b, nir_imm_int(b, size),
128 nir_ssa_for_src(b, deref_array->indirect, 1));
129
130 offset = nir_iadd(b, offset, mul);
131 }
132 } else if (tail->deref_type == nir_deref_type_struct) {
133 nir_deref_struct *deref_struct = nir_deref_as_struct(tail);
134
135 unsigned field_offset = 0;
136 for (unsigned i = 0; i < deref_struct->index; i++) {
137 field_offset += type_size(glsl_get_struct_field(parent_type, i));
138 }
139 offset = nir_iadd(b, offset, nir_imm_int(b, field_offset));
140 }
141 }
142
143 return offset;
144 }
145
146 static nir_intrinsic_op
147 load_op(struct lower_io_state *state,
148 nir_variable_mode mode, bool per_vertex)
149 {
150 nir_intrinsic_op op;
151 switch (mode) {
152 case nir_var_shader_in:
153 op = per_vertex ? nir_intrinsic_load_per_vertex_input :
154 nir_intrinsic_load_input;
155 break;
156 case nir_var_shader_out:
157 op = per_vertex ? nir_intrinsic_load_per_vertex_output :
158 nir_intrinsic_load_output;
159 break;
160 case nir_var_uniform:
161 op = nir_intrinsic_load_uniform;
162 break;
163 default:
164 unreachable("Unknown variable mode");
165 }
166 return op;
167 }
168
169 static bool
170 nir_lower_io_block(nir_block *block, void *void_state)
171 {
172 struct lower_io_state *state = void_state;
173
174 nir_builder *b = &state->builder;
175
176 nir_foreach_instr_safe(block, instr) {
177 if (instr->type != nir_instr_type_intrinsic)
178 continue;
179
180 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
181
182 if (intrin->intrinsic != nir_intrinsic_load_var &&
183 intrin->intrinsic != nir_intrinsic_store_var)
184 continue;
185
186 nir_variable_mode mode = intrin->variables[0]->var->data.mode;
187
188 if (state->mode != nir_var_all && state->mode != mode)
189 continue;
190
191 if (mode != nir_var_shader_in &&
192 mode != nir_var_shader_out &&
193 mode != nir_var_uniform)
194 continue;
195
196 b->cursor = nir_before_instr(instr);
197
198 switch (intrin->intrinsic) {
199 case nir_intrinsic_load_var: {
200 bool per_vertex =
201 is_per_vertex_input(state, intrin->variables[0]->var) ||
202 is_per_vertex_output(state, intrin->variables[0]->var);
203
204 nir_ssa_def *offset;
205 nir_ssa_def *vertex_index;
206
207 offset = get_io_offset(b, intrin->variables[0],
208 per_vertex ? &vertex_index : NULL,
209 state->type_size);
210
211 nir_intrinsic_instr *load =
212 nir_intrinsic_instr_create(state->mem_ctx,
213 load_op(state, mode, per_vertex));
214 load->num_components = intrin->num_components;
215
216 load->const_index[0] =
217 intrin->variables[0]->var->data.driver_location;
218
219 if (per_vertex)
220 load->src[0] = nir_src_for_ssa(vertex_index);
221
222 load->src[per_vertex ? 1 : 0] = nir_src_for_ssa(offset);
223
224 if (intrin->dest.is_ssa) {
225 nir_ssa_dest_init(&load->instr, &load->dest,
226 intrin->num_components, NULL);
227 nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
228 nir_src_for_ssa(&load->dest.ssa));
229 } else {
230 nir_dest_copy(&load->dest, &intrin->dest, state->mem_ctx);
231 }
232
233 nir_instr_insert_before(&intrin->instr, &load->instr);
234 nir_instr_remove(&intrin->instr);
235 break;
236 }
237
238 case nir_intrinsic_store_var: {
239 assert(mode == nir_var_shader_out);
240
241 nir_ssa_def *offset;
242 nir_ssa_def *vertex_index;
243
244 bool per_vertex =
245 is_per_vertex_output(state, intrin->variables[0]->var);
246
247 offset = get_io_offset(b, intrin->variables[0],
248 per_vertex ? &vertex_index : NULL,
249 state->type_size);
250
251 nir_intrinsic_op store_op =
252 per_vertex ? nir_intrinsic_store_per_vertex_output :
253 nir_intrinsic_store_output;
254
255 nir_intrinsic_instr *store = nir_intrinsic_instr_create(state->mem_ctx,
256 store_op);
257 store->num_components = intrin->num_components;
258
259 nir_src_copy(&store->src[0], &intrin->src[0], store);
260
261 store->const_index[0] =
262 intrin->variables[0]->var->data.driver_location;
263
264 if (per_vertex)
265 store->src[1] = nir_src_for_ssa(vertex_index);
266
267 store->src[per_vertex ? 2 : 1] = nir_src_for_ssa(offset);
268
269 nir_instr_insert_before(&intrin->instr, &store->instr);
270 nir_instr_remove(&intrin->instr);
271 break;
272 }
273
274 default:
275 break;
276 }
277 }
278
279 return true;
280 }
281
282 static void
283 nir_lower_io_impl(nir_function_impl *impl,
284 nir_variable_mode mode,
285 int (*type_size)(const struct glsl_type *))
286 {
287 struct lower_io_state state;
288
289 nir_builder_init(&state.builder, impl);
290 state.mem_ctx = ralloc_parent(impl);
291 state.mode = mode;
292 state.type_size = type_size;
293
294 nir_foreach_block(impl, nir_lower_io_block, &state);
295
296 nir_metadata_preserve(impl, nir_metadata_block_index |
297 nir_metadata_dominance);
298 }
299
300 void
301 nir_lower_io(nir_shader *shader, nir_variable_mode mode,
302 int (*type_size)(const struct glsl_type *))
303 {
304 nir_foreach_overload(shader, overload) {
305 if (overload->impl)
306 nir_lower_io_impl(overload->impl, mode, type_size);
307 }
308 }
309
310 /**
311 * Return the offset soruce for a load/store intrinsic.
312 */
313 nir_src *
314 nir_get_io_offset_src(nir_intrinsic_instr *instr)
315 {
316 switch (instr->intrinsic) {
317 case nir_intrinsic_load_input:
318 case nir_intrinsic_load_output:
319 case nir_intrinsic_load_uniform:
320 return &instr->src[0];
321 case nir_intrinsic_load_per_vertex_input:
322 case nir_intrinsic_load_per_vertex_output:
323 case nir_intrinsic_store_output:
324 return &instr->src[1];
325 case nir_intrinsic_store_per_vertex_output:
326 return &instr->src[2];
327 default:
328 return NULL;
329 }
330 }
331
332 /**
333 * Return the vertex index source for a load/store per_vertex intrinsic.
334 */
335 nir_src *
336 nir_get_io_vertex_index_src(nir_intrinsic_instr *instr)
337 {
338 switch (instr->intrinsic) {
339 case nir_intrinsic_load_per_vertex_input:
340 case nir_intrinsic_load_per_vertex_output:
341 return &instr->src[0];
342 case nir_intrinsic_store_per_vertex_output:
343 return &instr->src[1];
344 default:
345 return NULL;
346 }
347 }