anv/icd: Advertise the right ABI version
[mesa.git] / src / glsl / nir / nir_lower_io.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 * Jason Ekstrand (jason@jlekstrand.net)
26 *
27 */
28
29 /*
30 * This lowering pass converts references to input/output variables with
31 * loads/stores to actual input/output intrinsics.
32 */
33
34 #include "nir.h"
35 #include "nir_builder.h"
36
37 struct lower_io_state {
38 nir_builder builder;
39 void *mem_ctx;
40 int (*type_size)(const struct glsl_type *type);
41 nir_variable_mode mode;
42 };
43
44 void
45 nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
46 int (*type_size)(const struct glsl_type *))
47 {
48 unsigned location = 0;
49
50 nir_foreach_variable(var, var_list) {
51 /*
52 * UBO's have their own address spaces, so don't count them towards the
53 * number of global uniforms
54 */
55 if ((var->data.mode == nir_var_uniform || var->data.mode == nir_var_shader_storage) &&
56 var->interface_type != NULL)
57 continue;
58
59 var->data.driver_location = location;
60 location += type_size(var->type);
61 }
62
63 *size = location;
64 }
65
66 /**
67 * Returns true if we're processing a stage whose inputs are arrays indexed
68 * by a vertex number (such as geometry shader inputs).
69 */
70 static bool
71 is_per_vertex_input(struct lower_io_state *state, nir_variable *var)
72 {
73 gl_shader_stage stage = state->builder.shader->stage;
74
75 return var->data.mode == nir_var_shader_in && !var->data.patch &&
76 (stage == MESA_SHADER_TESS_CTRL ||
77 stage == MESA_SHADER_TESS_EVAL ||
78 stage == MESA_SHADER_GEOMETRY);
79 }
80
81 static bool
82 is_per_vertex_output(struct lower_io_state *state, nir_variable *var)
83 {
84 gl_shader_stage stage = state->builder.shader->stage;
85 return var->data.mode == nir_var_shader_out && !var->data.patch &&
86 stage == MESA_SHADER_TESS_CTRL;
87 }
88
89 static unsigned
90 get_io_offset(nir_deref_var *deref, nir_instr *instr,
91 nir_ssa_def **vertex_index,
92 nir_ssa_def **out_indirect,
93 struct lower_io_state *state)
94 {
95 nir_ssa_def *indirect = NULL;
96 unsigned base_offset = 0;
97
98 nir_builder *b = &state->builder;
99 b->cursor = nir_before_instr(instr);
100
101 nir_deref *tail = &deref->deref;
102
103 /* For per-vertex input arrays (i.e. geometry shader inputs), keep the
104 * outermost array index separate. Process the rest normally.
105 */
106 if (vertex_index != NULL) {
107 tail = tail->child;
108 assert(tail->deref_type == nir_deref_type_array);
109 nir_deref_array *deref_array = nir_deref_as_array(tail);
110
111 nir_ssa_def *vtx = nir_imm_int(b, deref_array->base_offset);
112 if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
113 vtx = nir_iadd(b, vtx, nir_ssa_for_src(b, deref_array->indirect, 1));
114 }
115 *vertex_index = vtx;
116 }
117
118 while (tail->child != NULL) {
119 const struct glsl_type *parent_type = tail->type;
120 tail = tail->child;
121
122 if (tail->deref_type == nir_deref_type_array) {
123 nir_deref_array *deref_array = nir_deref_as_array(tail);
124 unsigned size = state->type_size(tail->type);
125
126 base_offset += size * deref_array->base_offset;
127
128 if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
129 nir_ssa_def *mul =
130 nir_imul(b, nir_imm_int(b, size),
131 nir_ssa_for_src(b, deref_array->indirect, 1));
132
133 indirect = indirect ? nir_iadd(b, indirect, mul) : mul;
134 }
135 } else if (tail->deref_type == nir_deref_type_struct) {
136 nir_deref_struct *deref_struct = nir_deref_as_struct(tail);
137
138 for (unsigned i = 0; i < deref_struct->index; i++) {
139 base_offset +=
140 state->type_size(glsl_get_struct_field(parent_type, i));
141 }
142 }
143 }
144
145 *out_indirect = indirect;
146 return base_offset;
147 }
148
149 static nir_intrinsic_op
150 load_op(struct lower_io_state *state,
151 nir_variable_mode mode, bool per_vertex, bool has_indirect)
152 {
153 nir_intrinsic_op op;
154 switch (mode) {
155 case nir_var_shader_in:
156 if (per_vertex) {
157 op = has_indirect ? nir_intrinsic_load_per_vertex_input_indirect :
158 nir_intrinsic_load_per_vertex_input;
159 } else {
160 op = has_indirect ? nir_intrinsic_load_input_indirect :
161 nir_intrinsic_load_input;
162 }
163 break;
164 case nir_var_shader_out:
165 if (per_vertex) {
166 op = has_indirect ? nir_intrinsic_load_per_vertex_output_indirect :
167 nir_intrinsic_load_per_vertex_output;
168 } else {
169 op = has_indirect ? nir_intrinsic_load_output_indirect :
170 nir_intrinsic_load_output;
171 }
172 break;
173 case nir_var_uniform:
174 op = has_indirect ? nir_intrinsic_load_uniform_indirect :
175 nir_intrinsic_load_uniform;
176 break;
177 default:
178 unreachable("Unknown variable mode");
179 }
180 return op;
181 }
182
183 static bool
184 nir_lower_io_block(nir_block *block, void *void_state)
185 {
186 struct lower_io_state *state = void_state;
187
188 nir_foreach_instr_safe(block, instr) {
189 if (instr->type != nir_instr_type_intrinsic)
190 continue;
191
192 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
193
194 if (intrin->intrinsic != nir_intrinsic_load_var &&
195 intrin->intrinsic != nir_intrinsic_store_var)
196 continue;
197
198 nir_variable_mode mode = intrin->variables[0]->var->data.mode;
199
200 if (state->mode != nir_var_all && state->mode != mode)
201 continue;
202
203 if (mode != nir_var_shader_in &&
204 mode != nir_var_shader_out &&
205 mode != nir_var_uniform)
206 continue;
207
208 switch (intrin->intrinsic) {
209 case nir_intrinsic_load_var: {
210 bool per_vertex =
211 is_per_vertex_input(state, intrin->variables[0]->var) ||
212 is_per_vertex_output(state, intrin->variables[0]->var);
213
214 nir_ssa_def *indirect;
215 nir_ssa_def *vertex_index;
216
217 unsigned offset = get_io_offset(intrin->variables[0], &intrin->instr,
218 per_vertex ? &vertex_index : NULL,
219 &indirect, state);
220
221 nir_intrinsic_instr *load =
222 nir_intrinsic_instr_create(state->mem_ctx,
223 load_op(state, mode, per_vertex,
224 indirect));
225 load->num_components = intrin->num_components;
226
227 unsigned location = intrin->variables[0]->var->data.driver_location;
228 if (mode == nir_var_uniform) {
229 load->const_index[0] = location;
230 load->const_index[1] = offset;
231 } else {
232 load->const_index[0] = location + offset;
233 }
234
235 if (per_vertex)
236 load->src[0] = nir_src_for_ssa(vertex_index);
237
238 if (indirect)
239 load->src[per_vertex ? 1 : 0] = nir_src_for_ssa(indirect);
240
241 if (intrin->dest.is_ssa) {
242 nir_ssa_dest_init(&load->instr, &load->dest,
243 intrin->num_components, NULL);
244 nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
245 nir_src_for_ssa(&load->dest.ssa));
246 } else {
247 nir_dest_copy(&load->dest, &intrin->dest, state->mem_ctx);
248 }
249
250 nir_instr_insert_before(&intrin->instr, &load->instr);
251 nir_instr_remove(&intrin->instr);
252 break;
253 }
254
255 case nir_intrinsic_store_var: {
256 assert(mode == nir_var_shader_out);
257
258 nir_ssa_def *indirect;
259 nir_ssa_def *vertex_index;
260
261 bool per_vertex =
262 is_per_vertex_output(state, intrin->variables[0]->var);
263
264 unsigned offset = get_io_offset(intrin->variables[0], &intrin->instr,
265 per_vertex ? &vertex_index : NULL,
266 &indirect, state);
267 offset += intrin->variables[0]->var->data.driver_location;
268
269 nir_intrinsic_op store_op;
270 if (per_vertex) {
271 store_op = indirect ? nir_intrinsic_store_per_vertex_output_indirect
272 : nir_intrinsic_store_per_vertex_output;
273 } else {
274 store_op = indirect ? nir_intrinsic_store_output_indirect
275 : nir_intrinsic_store_output;
276 }
277
278 nir_intrinsic_instr *store = nir_intrinsic_instr_create(state->mem_ctx,
279 store_op);
280 store->num_components = intrin->num_components;
281 store->const_index[0] = offset;
282
283 nir_src_copy(&store->src[0], &intrin->src[0], store);
284
285 if (per_vertex)
286 store->src[1] = nir_src_for_ssa(vertex_index);
287
288 if (indirect)
289 store->src[per_vertex ? 2 : 1] = nir_src_for_ssa(indirect);
290
291 nir_instr_insert_before(&intrin->instr, &store->instr);
292 nir_instr_remove(&intrin->instr);
293 break;
294 }
295
296 default:
297 break;
298 }
299 }
300
301 return true;
302 }
303
304 static void
305 nir_lower_io_impl(nir_function_impl *impl,
306 nir_variable_mode mode,
307 int (*type_size)(const struct glsl_type *))
308 {
309 struct lower_io_state state;
310
311 nir_builder_init(&state.builder, impl);
312 state.mem_ctx = ralloc_parent(impl);
313 state.mode = mode;
314 state.type_size = type_size;
315
316 nir_foreach_block(impl, nir_lower_io_block, &state);
317
318 nir_metadata_preserve(impl, nir_metadata_block_index |
319 nir_metadata_dominance);
320 }
321
322 void
323 nir_lower_io(nir_shader *shader, nir_variable_mode mode,
324 int (*type_size)(const struct glsl_type *))
325 {
326 nir_foreach_overload(shader, overload) {
327 if (overload->impl)
328 nir_lower_io_impl(overload->impl, mode, type_size);
329 }
330 }
331
332 /**
333 * Return the indirect source for a load/store indirect intrinsic.
334 */
335 nir_src *
336 nir_get_io_indirect_src(nir_intrinsic_instr *instr)
337 {
338 switch (instr->intrinsic) {
339 case nir_intrinsic_load_input_indirect:
340 case nir_intrinsic_load_output_indirect:
341 case nir_intrinsic_load_uniform_indirect:
342 return &instr->src[0];
343 case nir_intrinsic_load_per_vertex_input_indirect:
344 case nir_intrinsic_load_per_vertex_output_indirect:
345 case nir_intrinsic_store_output_indirect:
346 return &instr->src[1];
347 case nir_intrinsic_store_per_vertex_output_indirect:
348 return &instr->src[2];
349 default:
350 return NULL;
351 }
352 }
353
354 /**
355 * Return the vertex index source for a load/store per_vertex intrinsic.
356 */
357 nir_src *
358 nir_get_io_vertex_index_src(nir_intrinsic_instr *instr)
359 {
360 switch (instr->intrinsic) {
361 case nir_intrinsic_load_per_vertex_input:
362 case nir_intrinsic_load_per_vertex_output:
363 case nir_intrinsic_load_per_vertex_input_indirect:
364 case nir_intrinsic_load_per_vertex_output_indirect:
365 return &instr->src[0];
366 case nir_intrinsic_store_per_vertex_output:
367 case nir_intrinsic_store_per_vertex_output_indirect:
368 return &instr->src[1];
369 default:
370 return NULL;
371 }
372 }