src/intel/common/gen_aux_map.c

   1 /*
   2  * Copyright (c) 2018 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 /**
  25  * The aux map provides a multi-level lookup of the main surface address which
  26  * ends up providing information about the auxiliary surface data, including
  27  * the address where the auxiliary data resides.
  28  *
  29  * The 48-bit VMA (GPU) address of the main surface is split to do the address
  30  * lookup:
  31  *
  32  *  48 bit address of main surface
  33  * +--------+--------+--------+------+
  34  * | 47:36  | 35:24  | 23:16  | 15:0 |
  35  * | L3-idx | L2-idx | L1-idx | ...  |
  36  * +--------+--------+--------+------+
  37  *
  38  * The GFX_AUX_TABLE_BASE_ADDR points to a buffer. The L3 Table Entry is
  39  * located by indexing into this buffer as a uint64_t array using the L3-idx
  40  * value. The 64-bit L3 entry is defined as:
  41  *
  42  * +-------+-------------+------+---+
  43  * | 63:48 | 47:15       | 14:1 | 0 |
  44  * |  ...  | L2-tbl-addr | ...  | V |
  45  * +-------+-------------+------+---+
  46  *
  47  * If the `V` (valid) bit is set, then the L2-tbl-addr gives the address for
  48  * the level-2 table entries, with the lower address bits filled with zero.
  49  * The L2 Table Entry is located by indexing into this buffer as a uint64_t
  50  * array using the L2-idx value. The 64-bit L2 entry is similar to the L3
  51  * entry, except with 2 additional address bits:
  52  *
  53  * +-------+-------------+------+---+
  54  * | 63:48 | 47:13       | 12:1 | 0 |
  55  * |  ...  | L1-tbl-addr | ...  | V |
  56  * +-------+-------------+------+---+
  57  *
  58  * If the `V` bit is set, then the L1-tbl-addr gives the address for the
  59  * level-1 table entries, with the lower address bits filled with zero. The L1
  60  * Table Entry is located by indexing into this buffer as a uint64_t array
  61  * using the L1-idx value. The 64-bit L1 entry is defined as:
  62  *
  63  * +--------+------+-------+-------+-------+---------------+-----+---+
  64  * | 63:58  | 57   | 56:54 | 53:52 | 51:48 | 47:8          | 7:1 | 0 |
  65  * | Format | Y/Cr | Depth |  TM   |  ...  | aux-data-addr | ... | V |
  66  * +--------+------+-------+-------+-------+---------------+-----+---+
  67  *
  68  * Where:
  69  *  - Format: See `get_format_encoding`
  70  *  - Y/Cr: 0=not-Y/Cr, 1=Y/Cr
  71  *  - (bit) Depth: See `get_bpp_encoding`
  72  *  - TM (Tile-mode): 0=Ys, 1=Y, 2=rsvd, 3=rsvd
  73  *  - aux-data-addr: VMA/GPU address for the aux-data
  74  *  - V: entry is valid
  75  */
  76
  77 #include "gen_aux_map.h"
  78 #include "gen_gem.h"
  79
  80 #include "dev/gen_device_info.h"
  81
  82 #include "drm-uapi/i915_drm.h"
  83 #include "util/list.h"
  84 #include "util/ralloc.h"
  85 #include "util/u_atomic.h"
  86 #include "main/macros.h"
  87
  88 #include <inttypes.h>
  89 #include <stdlib.h>
  90 #include <stdio.h>
  91 #include <pthread.h>
  92
  93 static const bool aux_map_debug = false;
  94
  95 struct aux_map_buffer {
  96    struct list_head link;
  97    struct gen_buffer *buffer;
  98 };
  99
 100 struct gen_aux_map_context {
 101    void *driver_ctx;
 102    pthread_mutex_t mutex;
 103    struct gen_mapped_pinned_buffer_alloc *buffer_alloc;
 104    uint32_t num_buffers;
 105    struct list_head buffers;
 106    uint64_t level3_base_addr;
 107    uint64_t *level3_map;
 108    uint32_t tail_offset, tail_remaining;
 109    uint32_t state_num;
 110 };
 111
 112 static bool
 113 add_buffer(struct gen_aux_map_context *ctx)
 114 {
 115    struct aux_map_buffer *buf = ralloc(ctx, struct aux_map_buffer);
 116    if (!buf)
 117       return false;
 118
 119    const uint32_t size = 0x100000;
 120    buf->buffer = ctx->buffer_alloc->alloc(ctx->driver_ctx, size);
 121    if (!buf->buffer) {
 122       ralloc_free(buf);
 123       return false;
 124    }
 125
 126    assert(buf->buffer->map != NULL);
 127
 128    list_addtail(&buf->link, &ctx->buffers);
 129    ctx->tail_offset = 0;
 130    ctx->tail_remaining = size;
 131    p_atomic_inc(&ctx->num_buffers);
 132
 133    return true;
 134 }
 135
 136 static void
 137 advance_current_pos(struct gen_aux_map_context *ctx, uint32_t size)
 138 {
 139    assert(ctx->tail_remaining >= size);
 140    ctx->tail_remaining -= size;
 141    ctx->tail_offset += size;
 142 }
 143
 144 static bool
 145 align_and_verify_space(struct gen_aux_map_context *ctx, uint32_t size,
 146                        uint32_t align)
 147 {
 148    if (ctx->tail_remaining < size)
 149       return false;
 150
 151    struct aux_map_buffer *tail =
 152       list_last_entry(&ctx->buffers, struct aux_map_buffer, link);
 153    uint64_t gpu = tail->buffer->gpu + ctx->tail_offset;
 154    uint64_t aligned = ALIGN(gpu, align);
 155
 156    if ((aligned - gpu) + size > ctx->tail_remaining) {
 157       return false;
 158    } else {
 159       if (aligned - gpu > 0)
 160          advance_current_pos(ctx, aligned - gpu);
 161       return true;
 162    }
 163 }
 164
 165 static void
 166 get_current_pos(struct gen_aux_map_context *ctx, uint64_t *gpu, uint64_t **map)
 167 {
 168    assert(!list_is_empty(&ctx->buffers));
 169    struct aux_map_buffer *tail =
 170       list_last_entry(&ctx->buffers, struct aux_map_buffer, link);
 171    if (gpu)
 172       *gpu = tail->buffer->gpu + ctx->tail_offset;
 173    if (map)
 174       *map = (uint64_t*)((uint8_t*)tail->buffer->map + ctx->tail_offset);
 175 }
 176
 177 static bool
 178 add_sub_table(struct gen_aux_map_context *ctx, uint32_t size,
 179               uint32_t align, uint64_t *gpu, uint64_t **map)
 180 {
 181    if (!align_and_verify_space(ctx, size, align)) {
 182       if (!add_buffer(ctx))
 183          return false;
 184       UNUSED bool aligned = align_and_verify_space(ctx, size, align);
 185       assert(aligned);
 186    }
 187    get_current_pos(ctx, gpu, map);
 188    memset(*map, 0, size);
 189    advance_current_pos(ctx, size);
 190    return true;
 191 }
 192
 193 uint32_t
 194 gen_aux_map_get_state_num(struct gen_aux_map_context *ctx)
 195 {
 196    return p_atomic_read(&ctx->state_num);
 197 }
 198
 199 struct gen_aux_map_context *
 200 gen_aux_map_init(void *driver_ctx,
 201                  struct gen_mapped_pinned_buffer_alloc *buffer_alloc,
 202                  const struct gen_device_info *devinfo)
 203 {
 204    struct gen_aux_map_context *ctx;
 205    if (devinfo->gen < 12)
 206       return NULL;
 207
 208    ctx = ralloc(NULL, struct gen_aux_map_context);
 209    if (!ctx)
 210       return NULL;
 211
 212    if (pthread_mutex_init(&ctx->mutex, NULL))
 213       return NULL;
 214
 215    ctx->driver_ctx = driver_ctx;
 216    ctx->buffer_alloc = buffer_alloc;
 217    ctx->num_buffers = 0;
 218    list_inithead(&ctx->buffers);
 219    ctx->tail_offset = 0;
 220    ctx->tail_remaining = 0;
 221    ctx->state_num = 0;
 222
 223    if (add_sub_table(ctx, 32 * 1024, 32 * 1024, &ctx->level3_base_addr,
 224                      &ctx->level3_map)) {
 225       if (aux_map_debug)
 226          fprintf(stderr, "AUX-MAP L3: 0x%"PRIx64", map=%p\n",
 227                  ctx->level3_base_addr, ctx->level3_map);
 228       p_atomic_inc(&ctx->state_num);
 229       return ctx;
 230    } else {
 231       ralloc_free(ctx);
 232       return NULL;
 233    }
 234 }
 235
 236 void
 237 gen_aux_map_finish(struct gen_aux_map_context *ctx)
 238 {
 239    if (!ctx)
 240       return;
 241
 242    pthread_mutex_destroy(&ctx->mutex);
 243    list_for_each_entry_safe(struct aux_map_buffer, buf, &ctx->buffers, link) {
 244       ctx->buffer_alloc->free(ctx->driver_ctx, buf->buffer);
 245       list_del(&buf->link);
 246       p_atomic_dec(&ctx->num_buffers);
 247       ralloc_free(buf);
 248    }
 249
 250    ralloc_free(ctx);
 251 }
 252
 253 uint64_t
 254 gen_aux_map_get_base(struct gen_aux_map_context *ctx)
 255 {
 256    /**
 257     * This get initialized in gen_aux_map_init, and never changes, so there is
 258     * no need to lock the mutex.
 259     */
 260    return ctx->level3_base_addr;
 261 }
 262
 263 static struct aux_map_buffer *
 264 find_buffer(struct gen_aux_map_context *ctx, uint64_t addr)
 265 {
 266    list_for_each_entry(struct aux_map_buffer, buf, &ctx->buffers, link) {
 267       if (buf->buffer->gpu <= addr && buf->buffer->gpu_end > addr) {
 268          return buf;
 269       }
 270    }
 271    return NULL;
 272 }
 273
 274 static uint64_t *
 275 get_u64_entry_ptr(struct gen_aux_map_context *ctx, uint64_t addr)
 276 {
 277    struct aux_map_buffer *buf = find_buffer(ctx, addr);
 278    assert(buf);
 279    uintptr_t map_offset = addr - buf->buffer->gpu;
 280    return (uint64_t*)((uint8_t*)buf->buffer->map + map_offset);
 281 }
 282
 283 static uint8_t
 284 get_format_encoding(const struct isl_surf *isl_surf)
 285 {
 286    switch(isl_surf->format) {
 287    case ISL_FORMAT_R32G32B32A32_FLOAT: return 0x11;
 288    case ISL_FORMAT_R32G32B32X32_FLOAT: return 0x11;
 289    case ISL_FORMAT_R32G32B32A32_SINT: return 0x12;
 290    case ISL_FORMAT_R32G32B32A32_UINT: return 0x13;
 291    case ISL_FORMAT_R16G16B16A16_UNORM: return 0x14;
 292    case ISL_FORMAT_R16G16B16A16_SNORM: return 0x15;
 293    case ISL_FORMAT_R16G16B16A16_SINT: return 0x16;
 294    case ISL_FORMAT_R16G16B16A16_UINT: return 0x17;
 295    case ISL_FORMAT_R16G16B16A16_FLOAT: return 0x10;
 296    case ISL_FORMAT_R16G16B16X16_FLOAT: return 0x10;
 297    case ISL_FORMAT_R32G32_FLOAT: return 0x11;
 298    case ISL_FORMAT_R32G32_SINT: return 0x12;
 299    case ISL_FORMAT_R32G32_UINT: return 0x13;
 300    case ISL_FORMAT_B8G8R8A8_UNORM: return 0xA;
 301    case ISL_FORMAT_B8G8R8X8_UNORM: return 0xA;
 302    case ISL_FORMAT_B8G8R8A8_UNORM_SRGB: return 0xA;
 303    case ISL_FORMAT_B8G8R8X8_UNORM_SRGB: return 0xA;
 304    case ISL_FORMAT_R10G10B10A2_UNORM: return 0x18;
 305    case ISL_FORMAT_R10G10B10A2_UNORM_SRGB: return 0x18;
 306    case ISL_FORMAT_R10G10B10_FLOAT_A2_UNORM: return 0x19;
 307    case ISL_FORMAT_R10G10B10A2_UINT: return 0x1A;
 308    case ISL_FORMAT_R8G8B8A8_UNORM: return 0xA;
 309    case ISL_FORMAT_R8G8B8A8_UNORM_SRGB: return 0xA;
 310    case ISL_FORMAT_R8G8B8A8_SNORM: return 0x1B;
 311    case ISL_FORMAT_R8G8B8A8_SINT: return 0x1C;
 312    case ISL_FORMAT_R8G8B8A8_UINT: return 0x1D;
 313    case ISL_FORMAT_R16G16_UNORM: return 0x14;
 314    case ISL_FORMAT_R16G16_SNORM: return 0x15;
 315    case ISL_FORMAT_R16G16_SINT: return 0x16;
 316    case ISL_FORMAT_R16G16_UINT: return 0x17;
 317    case ISL_FORMAT_R16G16_FLOAT: return 0x10;
 318    case ISL_FORMAT_B10G10R10A2_UNORM: return 0x18;
 319    case ISL_FORMAT_B10G10R10A2_UNORM_SRGB: return 0x18;
 320    case ISL_FORMAT_R11G11B10_FLOAT: return 0x1E;
 321    case ISL_FORMAT_R32_SINT: return 0x12;
 322    case ISL_FORMAT_R32_UINT: return 0x13;
 323    case ISL_FORMAT_R32_FLOAT: return 0x11;
 324    case ISL_FORMAT_B5G6R5_UNORM: return 0xA;
 325    case ISL_FORMAT_B5G6R5_UNORM_SRGB: return 0xA;
 326    case ISL_FORMAT_B5G5R5A1_UNORM: return 0xA;
 327    case ISL_FORMAT_B5G5R5A1_UNORM_SRGB: return 0xA;
 328    case ISL_FORMAT_B4G4R4A4_UNORM: return 0xA;
 329    case ISL_FORMAT_B4G4R4A4_UNORM_SRGB: return 0xA;
 330    case ISL_FORMAT_R8G8_UNORM: return 0xA;
 331    case ISL_FORMAT_R8G8_SNORM: return 0x1B;
 332    case ISL_FORMAT_R8G8_SINT: return 0x1C;
 333    case ISL_FORMAT_R8G8_UINT: return 0x1D;
 334    case ISL_FORMAT_R16_UNORM: return 0x14;
 335    case ISL_FORMAT_R16_SNORM: return 0x15;
 336    case ISL_FORMAT_R16_SINT: return 0x16;
 337    case ISL_FORMAT_R16_UINT: return 0x17;
 338    case ISL_FORMAT_R16_FLOAT: return 0x10;
 339    case ISL_FORMAT_B5G5R5X1_UNORM: return 0xA;
 340    case ISL_FORMAT_B5G5R5X1_UNORM_SRGB: return 0xA;
 341    case ISL_FORMAT_A1B5G5R5_UNORM: return 0xA;
 342    case ISL_FORMAT_A4B4G4R4_UNORM: return 0xA;
 343    case ISL_FORMAT_R8_UNORM: return 0xA;
 344    case ISL_FORMAT_R8_SNORM: return 0x1B;
 345    case ISL_FORMAT_R8_SINT: return 0x1C;
 346    case ISL_FORMAT_R8_UINT: return 0x1D;
 347    case ISL_FORMAT_A8_UNORM: return 0xA;
 348    default:
 349       unreachable("Unsupported aux-map format!");
 350       return 0;
 351    }
 352 }
 353
 354 static uint8_t
 355 get_bpp_encoding(uint16_t bpp)
 356 {
 357    switch (bpp) {
 358    case 16:  return 0;
 359    case 10:  return 1;
 360    case 12:  return 2;
 361    case 8:   return 4;
 362    case 32:  return 5;
 363    case 64:  return 6;
 364    case 128: return 7;
 365    default:
 366       unreachable("Unsupported bpp!");
 367       return 0;
 368    }
 369 }
 370
 371 static void
 372 add_mapping(struct gen_aux_map_context *ctx, uint64_t address,
 373             uint64_t aux_address, const struct isl_surf *isl_surf,
 374             bool *state_changed)
 375 {
 376    if (aux_map_debug)
 377       fprintf(stderr, "AUX-MAP 0x%"PRIx64" => 0x%"PRIx64"\n", address,
 378               aux_address);
 379
 380    uint32_t l3_index = (address >> 36) & 0xfff;
 381    uint64_t *l3_entry = &ctx->level3_map[l3_index];
 382
 383    uint64_t *l2_map;
 384    if ((*l3_entry & 1) == 0) {
 385       uint64_t l2_gpu;
 386       if (add_sub_table(ctx, 32 * 1024, 32 * 1024, &l2_gpu, &l2_map)) {
 387          if (aux_map_debug)
 388             fprintf(stderr, "AUX-MAP L3[0x%x]: 0x%"PRIx64", map=%p\n",
 389                     l3_index, l2_gpu, l2_map);
 390       } else {
 391          unreachable("Failed to add L2 Aux-Map Page Table!");
 392       }
 393       *l3_entry = (l2_gpu & 0xffffffff8000ULL) | 1;
 394    } else {
 395       uint64_t l2_addr = gen_canonical_address(*l3_entry & ~0x7fffULL);
 396       l2_map = get_u64_entry_ptr(ctx, l2_addr);
 397    }
 398    uint32_t l2_index = (address >> 24) & 0xfff;
 399    uint64_t *l2_entry = &l2_map[l2_index];
 400
 401    uint64_t *l1_map;
 402    if ((*l2_entry & 1) == 0) {
 403       uint64_t l1_gpu;
 404       if (add_sub_table(ctx, 8 * 1024, 8 * 1024, &l1_gpu, &l1_map)) {
 405          if (aux_map_debug)
 406             fprintf(stderr, "AUX-MAP L2[0x%x]: 0x%"PRIx64", map=%p\n",
 407                     l2_index, l1_gpu, l1_map);
 408       } else {
 409          unreachable("Failed to add L1 Aux-Map Page Table!");
 410       }
 411       *l2_entry = (l1_gpu & 0xffffffffe000ULL) | 1;
 412    } else {
 413       uint64_t l1_addr = gen_canonical_address(*l2_entry & ~0x1fffULL);
 414       l1_map = get_u64_entry_ptr(ctx, l1_addr);
 415    }
 416    uint32_t l1_index = (address >> 16) & 0xff;
 417    uint64_t *l1_entry = &l1_map[l1_index];
 418
 419    const struct isl_format_layout *fmtl =
 420       isl_format_get_layout(isl_surf->format);
 421    uint16_t bpp = fmtl->bpb;
 422    assert(fmtl->bw == 1 && fmtl->bh == 1 && fmtl->bd == 1);
 423    if (aux_map_debug)
 424       fprintf(stderr, "AUX-MAP entry %s, bpp=%d\n",
 425               isl_format_get_name(isl_surf->format), bpp);
 426
 427    const uint64_t l1_data =
 428       (aux_address & 0xffffffffff00ULL) |
 429       ((uint64_t)get_format_encoding(isl_surf) << 58) |
 430       ((uint64_t)get_bpp_encoding(bpp) << 54) |
 431       (1ULL /* Y tiling */ << 52) |
 432       1 /* Valid entry */;
 433
 434    const uint64_t current_l1_data = *l1_entry;
 435    if ((current_l1_data & 1) == 0) {
 436       assert((aux_address & 0xffULL) == 0);
 437       if (aux_map_debug)
 438          fprintf(stderr, "AUX-MAP L1[0x%x] 0x%"PRIx64" -> 0x%"PRIx64"\n",
 439                  l1_index, current_l1_data, l1_data);
 440       /**
 441        * We use non-zero bits in 63:1 to indicate the entry had been filled
 442        * previously. If these bits are non-zero and they don't exactly match
 443        * what we want to program into the entry, then we must force the
 444        * aux-map tables to be flushed.
 445        */
 446       if (current_l1_data != 0 && (current_l1_data | 1) != l1_data)
 447          *state_changed = true;
 448       *l1_entry = l1_data;
 449    } else {
 450       if (aux_map_debug)
 451          fprintf(stderr, "AUX-MAP L1[0x%x] is already marked valid!\n",
 452                  l1_index);
 453       assert(*l1_entry == l1_data);
 454    }
 455 }
 456
 457 void
 458 gen_aux_map_add_image(struct gen_aux_map_context *ctx,
 459                       const struct isl_surf *isl_surf, uint64_t address,
 460                       uint64_t aux_address)
 461 {
 462    bool state_changed = false;
 463    pthread_mutex_lock(&ctx->mutex);
 464    uint64_t map_addr = address;
 465    uint64_t dest_aux_addr = aux_address;
 466    assert(ALIGN(address, 64 * 1024) == address);
 467    assert(ALIGN(aux_address, 4 * 64) == aux_address);
 468    while (map_addr - address < isl_surf->size_B) {
 469       add_mapping(ctx, map_addr, dest_aux_addr, isl_surf, &state_changed);
 470       map_addr += 64 * 1024;
 471       dest_aux_addr += 4 * 64;
 472    }
 473    pthread_mutex_unlock(&ctx->mutex);
 474    if (state_changed)
 475       p_atomic_inc(&ctx->state_num);
 476 }
 477
 478 /**
 479  * We mark the leaf entry as invalid, but we don't attempt to cleanup the
 480  * other levels of translation mappings. Since we attempt to re-use VMA
 481  * ranges, hopefully this will not lead to unbounded growth of the translation
 482  * tables.
 483  */
 484 static void
 485 remove_mapping(struct gen_aux_map_context *ctx, uint64_t address,
 486                bool *state_changed)
 487 {
 488    uint32_t l3_index = (address >> 36) & 0xfff;
 489    uint64_t *l3_entry = &ctx->level3_map[l3_index];
 490
 491    uint64_t *l2_map;
 492    if ((*l3_entry & 1) == 0) {
 493       return;
 494    } else {
 495       uint64_t l2_addr = gen_canonical_address(*l3_entry & ~0x7fffULL);
 496       l2_map = get_u64_entry_ptr(ctx, l2_addr);
 497    }
 498    uint32_t l2_index = (address >> 24) & 0xfff;
 499    uint64_t *l2_entry = &l2_map[l2_index];
 500
 501    uint64_t *l1_map;
 502    if ((*l2_entry & 1) == 0) {
 503       return;
 504    } else {
 505       uint64_t l1_addr = gen_canonical_address(*l2_entry & ~0x1fffULL);
 506       l1_map = get_u64_entry_ptr(ctx, l1_addr);
 507    }
 508    uint32_t l1_index = (address >> 16) & 0xff;
 509    uint64_t *l1_entry = &l1_map[l1_index];
 510
 511    const uint64_t current_l1_data = *l1_entry;
 512    const uint64_t l1_data = current_l1_data & ~1ull;
 513
 514    if ((current_l1_data & 1) == 0) {
 515       return;
 516    } else {
 517       if (aux_map_debug)
 518          fprintf(stderr, "AUX-MAP [0x%x][0x%x][0x%x] L1 entry removed!\n",
 519                  l3_index, l2_index, l1_index);
 520       /**
 521        * We use non-zero bits in 63:1 to indicate the entry had been filled
 522        * previously. In the unlikely event that these are all zero, we force a
 523        * flush of the aux-map tables.
 524        */
 525       if (unlikely(l1_data == 0))
 526          *state_changed = true;
 527       *l1_entry = l1_data;
 528    }
 529 }
 530
 531 void
 532 gen_aux_map_unmap_range(struct gen_aux_map_context *ctx, uint64_t address,
 533                         uint64_t size)
 534 {
 535    bool state_changed = false;
 536    pthread_mutex_lock(&ctx->mutex);
 537    if (aux_map_debug)
 538       fprintf(stderr, "AUX-MAP remove 0x%"PRIx64"-0x%"PRIx64"\n", address,
 539               address + size);
 540
 541    uint64_t map_addr = address;
 542    assert(ALIGN(address, 64 * 1024) == address);
 543    while (map_addr - address < size) {
 544       remove_mapping(ctx, map_addr, &state_changed);
 545       map_addr += 64 * 1024;
 546    }
 547    pthread_mutex_unlock(&ctx->mutex);
 548    if (state_changed)
 549       p_atomic_inc(&ctx->state_num);
 550 }
 551
 552 uint32_t
 553 gen_aux_map_get_num_buffers(struct gen_aux_map_context *ctx)
 554 {
 555    return p_atomic_read(&ctx->num_buffers);
 556 }
 557
 558 void
 559 gen_aux_map_fill_bos(struct gen_aux_map_context *ctx, void **driver_bos,
 560                      uint32_t max_bos)
 561 {
 562    assert(p_atomic_read(&ctx->num_buffers) >= max_bos);
 563    uint32_t i = 0;
 564    list_for_each_entry(struct aux_map_buffer, buf, &ctx->buffers, link) {
 565       if (i >= max_bos)
 566          return;
 567       driver_bos[i++] = buf->buffer->driver_bo;
 568    }
 569 }