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e447087094bfdf54c2462cbb085c93472b1f909d
[mesa.git] / src / intel / compiler / brw_disasm.c
1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <string.h>
25 #include <stdarg.h>
26
27 #include "brw_eu_defines.h"
28 #include "brw_inst.h"
29 #include "brw_shader.h"
30 #include "brw_reg.h"
31 #include "brw_inst.h"
32 #include "brw_eu.h"
33 #include "util/half_float.h"
34
35 bool
36 brw_has_jip(const struct gen_device_info *devinfo, enum opcode opcode)
37 {
38 if (devinfo->gen < 6)
39 return false;
40
41 return opcode == BRW_OPCODE_IF ||
42 opcode == BRW_OPCODE_ELSE ||
43 opcode == BRW_OPCODE_ENDIF ||
44 opcode == BRW_OPCODE_WHILE ||
45 opcode == BRW_OPCODE_BREAK ||
46 opcode == BRW_OPCODE_CONTINUE ||
47 opcode == BRW_OPCODE_HALT;
48 }
49
50 bool
51 brw_has_uip(const struct gen_device_info *devinfo, enum opcode opcode)
52 {
53 if (devinfo->gen < 6)
54 return false;
55
56 return (devinfo->gen >= 7 && opcode == BRW_OPCODE_IF) ||
57 (devinfo->gen >= 8 && opcode == BRW_OPCODE_ELSE) ||
58 opcode == BRW_OPCODE_BREAK ||
59 opcode == BRW_OPCODE_CONTINUE ||
60 opcode == BRW_OPCODE_HALT;
61 }
62
63 static bool
64 has_branch_ctrl(const struct gen_device_info *devinfo, enum opcode opcode)
65 {
66 if (devinfo->gen < 8)
67 return false;
68
69 return opcode == BRW_OPCODE_IF ||
70 opcode == BRW_OPCODE_ELSE;
71 /* opcode == BRW_OPCODE_GOTO; */
72 }
73
74 static bool
75 is_logic_instruction(unsigned opcode)
76 {
77 return opcode == BRW_OPCODE_AND ||
78 opcode == BRW_OPCODE_NOT ||
79 opcode == BRW_OPCODE_OR ||
80 opcode == BRW_OPCODE_XOR;
81 }
82
83 static bool
84 is_send(unsigned opcode)
85 {
86 return opcode == BRW_OPCODE_SEND ||
87 opcode == BRW_OPCODE_SENDC ||
88 opcode == BRW_OPCODE_SENDS ||
89 opcode == BRW_OPCODE_SENDSC;
90 }
91
92 static bool
93 is_split_send(UNUSED const struct gen_device_info *devinfo, unsigned opcode)
94 {
95 if (devinfo->gen >= 12)
96 return is_send(opcode);
97 else
98 return opcode == BRW_OPCODE_SENDS ||
99 opcode == BRW_OPCODE_SENDSC;
100 }
101
102 const char *const conditional_modifier[16] = {
103 [BRW_CONDITIONAL_NONE] = "",
104 [BRW_CONDITIONAL_Z] = ".z",
105 [BRW_CONDITIONAL_NZ] = ".nz",
106 [BRW_CONDITIONAL_G] = ".g",
107 [BRW_CONDITIONAL_GE] = ".ge",
108 [BRW_CONDITIONAL_L] = ".l",
109 [BRW_CONDITIONAL_LE] = ".le",
110 [BRW_CONDITIONAL_R] = ".r",
111 [BRW_CONDITIONAL_O] = ".o",
112 [BRW_CONDITIONAL_U] = ".u",
113 };
114
115 static const char *const m_negate[2] = {
116 [0] = "",
117 [1] = "-",
118 };
119
120 static const char *const _abs[2] = {
121 [0] = "",
122 [1] = "(abs)",
123 };
124
125 static const char *const m_bitnot[2] = { "", "~" };
126
127 static const char *const vert_stride[16] = {
128 [0] = "0",
129 [1] = "1",
130 [2] = "2",
131 [3] = "4",
132 [4] = "8",
133 [5] = "16",
134 [6] = "32",
135 [15] = "VxH",
136 };
137
138 static const char *const width[8] = {
139 [0] = "1",
140 [1] = "2",
141 [2] = "4",
142 [3] = "8",
143 [4] = "16",
144 };
145
146 static const char *const horiz_stride[4] = {
147 [0] = "0",
148 [1] = "1",
149 [2] = "2",
150 [3] = "4"
151 };
152
153 static const char *const chan_sel[4] = {
154 [0] = "x",
155 [1] = "y",
156 [2] = "z",
157 [3] = "w",
158 };
159
160 static const char *const debug_ctrl[2] = {
161 [0] = "",
162 [1] = ".breakpoint"
163 };
164
165 static const char *const saturate[2] = {
166 [0] = "",
167 [1] = ".sat"
168 };
169
170 static const char *const cmpt_ctrl[2] = {
171 [0] = "",
172 [1] = "compacted"
173 };
174
175 static const char *const accwr[2] = {
176 [0] = "",
177 [1] = "AccWrEnable"
178 };
179
180 static const char *const branch_ctrl[2] = {
181 [0] = "",
182 [1] = "BranchCtrl"
183 };
184
185 static const char *const wectrl[2] = {
186 [0] = "",
187 [1] = "WE_all"
188 };
189
190 static const char *const exec_size[8] = {
191 [0] = "1",
192 [1] = "2",
193 [2] = "4",
194 [3] = "8",
195 [4] = "16",
196 [5] = "32"
197 };
198
199 static const char *const pred_inv[2] = {
200 [0] = "+",
201 [1] = "-"
202 };
203
204 const char *const pred_ctrl_align16[16] = {
205 [1] = "",
206 [2] = ".x",
207 [3] = ".y",
208 [4] = ".z",
209 [5] = ".w",
210 [6] = ".any4h",
211 [7] = ".all4h",
212 };
213
214 static const char *const pred_ctrl_align1[16] = {
215 [BRW_PREDICATE_NORMAL] = "",
216 [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv",
217 [BRW_PREDICATE_ALIGN1_ALLV] = ".allv",
218 [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h",
219 [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h",
220 [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h",
221 [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h",
222 [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h",
223 [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h",
224 [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",
225 [BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h",
226 [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",
227 [BRW_PREDICATE_ALIGN1_ALL32H] = ".all32h",
228 };
229
230 static const char *const thread_ctrl[4] = {
231 [BRW_THREAD_NORMAL] = "",
232 [BRW_THREAD_ATOMIC] = "atomic",
233 [BRW_THREAD_SWITCH] = "switch",
234 };
235
236 static const char *const compr_ctrl[4] = {
237 [0] = "",
238 [1] = "sechalf",
239 [2] = "compr",
240 [3] = "compr4",
241 };
242
243 static const char *const dep_ctrl[4] = {
244 [0] = "",
245 [1] = "NoDDClr",
246 [2] = "NoDDChk",
247 [3] = "NoDDClr,NoDDChk",
248 };
249
250 static const char *const mask_ctrl[4] = {
251 [0] = "",
252 [1] = "nomask",
253 };
254
255 static const char *const access_mode[2] = {
256 [0] = "align1",
257 [1] = "align16",
258 };
259
260 static const char *const reg_file[4] = {
261 [0] = "A",
262 [1] = "g",
263 [2] = "m",
264 [3] = "imm",
265 };
266
267 static const char *const writemask[16] = {
268 [0x0] = ".",
269 [0x1] = ".x",
270 [0x2] = ".y",
271 [0x3] = ".xy",
272 [0x4] = ".z",
273 [0x5] = ".xz",
274 [0x6] = ".yz",
275 [0x7] = ".xyz",
276 [0x8] = ".w",
277 [0x9] = ".xw",
278 [0xa] = ".yw",
279 [0xb] = ".xyw",
280 [0xc] = ".zw",
281 [0xd] = ".xzw",
282 [0xe] = ".yzw",
283 [0xf] = "",
284 };
285
286 static const char *const end_of_thread[2] = {
287 [0] = "",
288 [1] = "EOT"
289 };
290
291 /* SFIDs on Gen4-5 */
292 static const char *const gen4_sfid[16] = {
293 [BRW_SFID_NULL] = "null",
294 [BRW_SFID_MATH] = "math",
295 [BRW_SFID_SAMPLER] = "sampler",
296 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
297 [BRW_SFID_DATAPORT_READ] = "read",
298 [BRW_SFID_DATAPORT_WRITE] = "write",
299 [BRW_SFID_URB] = "urb",
300 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
301 [BRW_SFID_VME] = "vme",
302 };
303
304 static const char *const gen6_sfid[16] = {
305 [BRW_SFID_NULL] = "null",
306 [BRW_SFID_MATH] = "math",
307 [BRW_SFID_SAMPLER] = "sampler",
308 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
309 [BRW_SFID_URB] = "urb",
310 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
311 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "dp_sampler",
312 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
313 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
314 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data",
315 [GEN7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",
316 [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",
317 [HSW_SFID_CRE] = "cre",
318 };
319
320 static const char *const gen7_gateway_subfuncid[8] = {
321 [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY] = "open",
322 [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY] = "close",
323 [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG] = "forward msg",
324 [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP] = "get timestamp",
325 [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG] = "barrier msg",
326 [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE] = "update state",
327 [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE] = "mmio read/write",
328 };
329
330 static const char *const gen4_dp_read_port_msg_type[4] = {
331 [0b00] = "OWord Block Read",
332 [0b01] = "OWord Dual Block Read",
333 [0b10] = "Media Block Read",
334 [0b11] = "DWord Scattered Read",
335 };
336
337 static const char *const g45_dp_read_port_msg_type[8] = {
338 [0b000] = "OWord Block Read",
339 [0b010] = "OWord Dual Block Read",
340 [0b100] = "Media Block Read",
341 [0b110] = "DWord Scattered Read",
342 [0b001] = "Render Target UNORM Read",
343 [0b011] = "AVC Loop Filter Read",
344 };
345
346 static const char *const dp_write_port_msg_type[8] = {
347 [0b000] = "OWord block write",
348 [0b001] = "OWord dual block write",
349 [0b010] = "media block write",
350 [0b011] = "DWord scattered write",
351 [0b100] = "RT write",
352 [0b101] = "streamed VB write",
353 [0b110] = "RT UNORM write", /* G45+ */
354 [0b111] = "flush render cache",
355 };
356
357 static const char *const dp_rc_msg_type_gen6[16] = {
358 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
359 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
360 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
361 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
362 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =
363 "OWORD unaligned block read",
364 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
365 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
366 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
367 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =
368 "OWORD dual block write",
369 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
370 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =
371 "DWORD scattered write",
372 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
373 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
374 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write",
375 };
376
377 static const char *const dp_rc_msg_type_gen7[16] = {
378 [GEN7_DATAPORT_RC_MEDIA_BLOCK_READ] = "media block read",
379 [GEN7_DATAPORT_RC_TYPED_SURFACE_READ] = "typed surface read",
380 [GEN7_DATAPORT_RC_TYPED_ATOMIC_OP] = "typed atomic op",
381 [GEN7_DATAPORT_RC_MEMORY_FENCE] = "memory fence",
382 [GEN7_DATAPORT_RC_MEDIA_BLOCK_WRITE] = "media block write",
383 [GEN7_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write",
384 [GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE] = "typed surface write"
385 };
386
387 static const char *const dp_rc_msg_type_gen9[16] = {
388 [GEN9_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write",
389 [GEN9_DATAPORT_RC_RENDER_TARGET_READ] = "RT read"
390 };
391
392 static const char *const *
393 dp_rc_msg_type(const struct gen_device_info *devinfo)
394 {
395 return (devinfo->gen >= 9 ? dp_rc_msg_type_gen9 :
396 devinfo->gen >= 7 ? dp_rc_msg_type_gen7 :
397 devinfo->gen >= 6 ? dp_rc_msg_type_gen6 :
398 dp_write_port_msg_type);
399 }
400
401 static const char *const m_rt_write_subtype[] = {
402 [0b000] = "SIMD16",
403 [0b001] = "SIMD16/RepData",
404 [0b010] = "SIMD8/DualSrcLow",
405 [0b011] = "SIMD8/DualSrcHigh",
406 [0b100] = "SIMD8",
407 [0b101] = "SIMD8/ImageWrite", /* Gen6+ */
408 [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */
409 };
410
411 static const char *const dp_dc0_msg_type_gen7[16] = {
412 [GEN7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",
413 [GEN7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =
414 "DC unaligned OWORD block read",
415 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",
416 [GEN7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",
417 [GEN7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",
418 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ] = "DC untyped surface read",
419 [GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",
420 [GEN7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",
421 [GEN7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",
422 [GEN7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",
423 [GEN7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",
424 [GEN7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",
425 [GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
426 };
427
428 static const char *const dp_dc1_msg_type_hsw[32] = {
429 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
430 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
431 [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =
432 "DC untyped 4x2 atomic op",
433 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",
434 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",
435 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",
436 [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",
437 [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
438 [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",
439 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",
440 [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =
441 "DC 4x2 atomic counter op",
442 [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",
443 [GEN9_DATAPORT_DC_PORT1_A64_SCATTERED_READ] = "DC A64 scattered read",
444 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ] = "DC A64 untyped surface read",
445 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP] = "DC A64 untyped atomic op",
446 [GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE] = "DC A64 untyped surface write",
447 [GEN8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE] = "DC A64 scattered write",
448 [GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP] =
449 "DC untyped atomic float op",
450 [GEN9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP] =
451 "DC A64 untyped atomic float op",
452 };
453
454 static const char *const aop[16] = {
455 [BRW_AOP_AND] = "and",
456 [BRW_AOP_OR] = "or",
457 [BRW_AOP_XOR] = "xor",
458 [BRW_AOP_MOV] = "mov",
459 [BRW_AOP_INC] = "inc",
460 [BRW_AOP_DEC] = "dec",
461 [BRW_AOP_ADD] = "add",
462 [BRW_AOP_SUB] = "sub",
463 [BRW_AOP_REVSUB] = "revsub",
464 [BRW_AOP_IMAX] = "imax",
465 [BRW_AOP_IMIN] = "imin",
466 [BRW_AOP_UMAX] = "umax",
467 [BRW_AOP_UMIN] = "umin",
468 [BRW_AOP_CMPWR] = "cmpwr",
469 [BRW_AOP_PREDEC] = "predec",
470 };
471
472 static const char *const aop_float[4] = {
473 [BRW_AOP_FMAX] = "fmax",
474 [BRW_AOP_FMIN] = "fmin",
475 [BRW_AOP_FCMPWR] = "fcmpwr",
476 };
477
478 static const char * const pixel_interpolator_msg_types[4] = {
479 [GEN7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset",
480 [GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position",
481 [GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid",
482 [GEN7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset",
483 };
484
485 static const char *const math_function[16] = {
486 [BRW_MATH_FUNCTION_INV] = "inv",
487 [BRW_MATH_FUNCTION_LOG] = "log",
488 [BRW_MATH_FUNCTION_EXP] = "exp",
489 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
490 [BRW_MATH_FUNCTION_RSQ] = "rsq",
491 [BRW_MATH_FUNCTION_SIN] = "sin",
492 [BRW_MATH_FUNCTION_COS] = "cos",
493 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
494 [BRW_MATH_FUNCTION_FDIV] = "fdiv",
495 [BRW_MATH_FUNCTION_POW] = "pow",
496 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
497 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
498 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
499 [GEN8_MATH_FUNCTION_INVM] = "invm",
500 [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
501 };
502
503 static const char *const sync_function[16] = {
504 [TGL_SYNC_NOP] = "nop",
505 [TGL_SYNC_ALLRD] = "allrd",
506 [TGL_SYNC_ALLWR] = "allwr",
507 [TGL_SYNC_BAR] = "bar",
508 [TGL_SYNC_HOST] = "host",
509 };
510
511 static const char *const math_saturate[2] = {
512 [0] = "",
513 [1] = "sat"
514 };
515
516 static const char *const math_signed[2] = {
517 [0] = "",
518 [1] = "signed"
519 };
520
521 static const char *const math_scalar[2] = {
522 [0] = "",
523 [1] = "scalar"
524 };
525
526 static const char *const math_precision[2] = {
527 [0] = "",
528 [1] = "partial_precision"
529 };
530
531 static const char *const gen5_urb_opcode[] = {
532 [0] = "urb_write",
533 [1] = "ff_sync",
534 };
535
536 static const char *const gen7_urb_opcode[] = {
537 [BRW_URB_OPCODE_WRITE_HWORD] = "write HWord",
538 [BRW_URB_OPCODE_WRITE_OWORD] = "write OWord",
539 [BRW_URB_OPCODE_READ_HWORD] = "read HWord",
540 [BRW_URB_OPCODE_READ_OWORD] = "read OWord",
541 [GEN7_URB_OPCODE_ATOMIC_MOV] = "atomic mov", /* Gen7+ */
542 [GEN7_URB_OPCODE_ATOMIC_INC] = "atomic inc", /* Gen7+ */
543 [GEN8_URB_OPCODE_ATOMIC_ADD] = "atomic add", /* Gen8+ */
544 [GEN8_URB_OPCODE_SIMD8_WRITE] = "SIMD8 write", /* Gen8+ */
545 [GEN8_URB_OPCODE_SIMD8_READ] = "SIMD8 read", /* Gen8+ */
546 /* [9-15] - reserved */
547 };
548
549 static const char *const urb_swizzle[4] = {
550 [BRW_URB_SWIZZLE_NONE] = "",
551 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
552 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
553 };
554
555 static const char *const urb_allocate[2] = {
556 [0] = "",
557 [1] = "allocate"
558 };
559
560 static const char *const urb_used[2] = {
561 [0] = "",
562 [1] = "used"
563 };
564
565 static const char *const urb_complete[2] = {
566 [0] = "",
567 [1] = "complete"
568 };
569
570 static const char *const gen5_sampler_msg_type[] = {
571 [GEN5_SAMPLER_MESSAGE_SAMPLE] = "sample",
572 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS] = "sample_b",
573 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD] = "sample_l",
574 [GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE] = "sample_c",
575 [GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS] = "sample_d",
576 [GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE] = "sample_b_c",
577 [GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE] = "sample_l_c",
578 [GEN5_SAMPLER_MESSAGE_SAMPLE_LD] = "ld",
579 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4] = "gather4",
580 [GEN5_SAMPLER_MESSAGE_LOD] = "lod",
581 [GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO] = "resinfo",
582 [GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO] = "sampleinfo",
583 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C] = "gather4_c",
584 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO] = "gather4_po",
585 [GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C] = "gather4_po_c",
586 [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE] = "sample_d_c",
587 [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ] = "sample_lz",
588 [GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ] = "sample_c_lz",
589 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ] = "ld_lz",
590 [GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W] = "ld2dms_w",
591 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS] = "ld_mcs",
592 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS] = "ld2dms",
593 [GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss",
594 };
595
596 static const char *const gen5_sampler_simd_mode[4] = {
597 [BRW_SAMPLER_SIMD_MODE_SIMD4X2] = "SIMD4x2",
598 [BRW_SAMPLER_SIMD_MODE_SIMD8] = "SIMD8",
599 [BRW_SAMPLER_SIMD_MODE_SIMD16] = "SIMD16",
600 [BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64",
601 };
602
603 static const char *const sampler_target_format[4] = {
604 [0] = "F",
605 [2] = "UD",
606 [3] = "D"
607 };
608
609
610 static int column;
611
612 static int
613 string(FILE *file, const char *string)
614 {
615 fputs(string, file);
616 column += strlen(string);
617 return 0;
618 }
619
620 static int
621 format(FILE *f, const char *format, ...) PRINTFLIKE(2, 3);
622
623 static int
624 format(FILE *f, const char *format, ...)
625 {
626 char buf[1024];
627 va_list args;
628 va_start(args, format);
629
630 vsnprintf(buf, sizeof(buf) - 1, format, args);
631 va_end(args);
632 string(f, buf);
633 return 0;
634 }
635
636 static int
637 newline(FILE *f)
638 {
639 putc('\n', f);
640 column = 0;
641 return 0;
642 }
643
644 static int
645 pad(FILE *f, int c)
646 {
647 do
648 string(f, " ");
649 while (column < c);
650 return 0;
651 }
652
653 static int
654 control(FILE *file, const char *name, const char *const ctrl[],
655 unsigned id, int *space)
656 {
657 if (!ctrl[id]) {
658 fprintf(file, "*** invalid %s value %d ", name, id);
659 return 1;
660 }
661 if (ctrl[id][0]) {
662 if (space && *space)
663 string(file, " ");
664 string(file, ctrl[id]);
665 if (space)
666 *space = 1;
667 }
668 return 0;
669 }
670
671 static int
672 print_opcode(FILE *file, const struct gen_device_info *devinfo,
673 enum opcode id)
674 {
675 const struct opcode_desc *desc = brw_opcode_desc(devinfo, id);
676 if (!desc) {
677 format(file, "*** invalid opcode value %d ", id);
678 return 1;
679 }
680 string(file, desc->name);
681 return 0;
682 }
683
684 static int
685 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)
686 {
687 int err = 0;
688
689 /* Clear the Compr4 instruction compression bit. */
690 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
691 _reg_nr &= ~BRW_MRF_COMPR4;
692
693 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
694 switch (_reg_nr & 0xf0) {
695 case BRW_ARF_NULL:
696 string(file, "null");
697 break;
698 case BRW_ARF_ADDRESS:
699 format(file, "a%d", _reg_nr & 0x0f);
700 break;
701 case BRW_ARF_ACCUMULATOR:
702 format(file, "acc%d", _reg_nr & 0x0f);
703 break;
704 case BRW_ARF_FLAG:
705 format(file, "f%d", _reg_nr & 0x0f);
706 break;
707 case BRW_ARF_MASK:
708 format(file, "mask%d", _reg_nr & 0x0f);
709 break;
710 case BRW_ARF_MASK_STACK:
711 format(file, "ms%d", _reg_nr & 0x0f);
712 break;
713 case BRW_ARF_MASK_STACK_DEPTH:
714 format(file, "msd%d", _reg_nr & 0x0f);
715 break;
716 case BRW_ARF_STATE:
717 format(file, "sr%d", _reg_nr & 0x0f);
718 break;
719 case BRW_ARF_CONTROL:
720 format(file, "cr%d", _reg_nr & 0x0f);
721 break;
722 case BRW_ARF_NOTIFICATION_COUNT:
723 format(file, "n%d", _reg_nr & 0x0f);
724 break;
725 case BRW_ARF_IP:
726 string(file, "ip");
727 return -1;
728 break;
729 case BRW_ARF_TDR:
730 format(file, "tdr0");
731 return -1;
732 case BRW_ARF_TIMESTAMP:
733 format(file, "tm%d", _reg_nr & 0x0f);
734 break;
735 default:
736 format(file, "ARF%d", _reg_nr);
737 break;
738 }
739 } else {
740 err |= control(file, "src reg file", reg_file, _reg_file, NULL);
741 format(file, "%d", _reg_nr);
742 }
743 return err;
744 }
745
746 static int
747 dest(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
748 {
749 enum brw_reg_type type = brw_inst_dst_type(devinfo, inst);
750 unsigned elem_size = brw_reg_type_to_size(type);
751 int err = 0;
752
753 if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {
754 /* These are fixed for split sends */
755 type = BRW_REGISTER_TYPE_UD;
756 elem_size = 4;
757 if (devinfo->gen >= 12) {
758 err |= reg(file, brw_inst_send_dst_reg_file(devinfo, inst),
759 brw_inst_dst_da_reg_nr(devinfo, inst));
760 string(file, brw_reg_type_to_letters(type));
761 } else if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
762 err |= reg(file, brw_inst_send_dst_reg_file(devinfo, inst),
763 brw_inst_dst_da_reg_nr(devinfo, inst));
764 unsigned subreg_nr = brw_inst_dst_da16_subreg_nr(devinfo, inst);
765 if (subreg_nr)
766 format(file, ".%u", subreg_nr);
767 string(file, brw_reg_type_to_letters(type));
768 } else {
769 string(file, "g[a0");
770 if (brw_inst_dst_ia_subreg_nr(devinfo, inst))
771 format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) /
772 elem_size);
773 if (brw_inst_send_dst_ia16_addr_imm(devinfo, inst))
774 format(file, " %d", brw_inst_send_dst_ia16_addr_imm(devinfo, inst));
775 string(file, "]<");
776 string(file, brw_reg_type_to_letters(type));
777 }
778 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
779 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
780 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
781 brw_inst_dst_da_reg_nr(devinfo, inst));
782 if (err == -1)
783 return 0;
784 if (brw_inst_dst_da1_subreg_nr(devinfo, inst))
785 format(file, ".%"PRIu64, brw_inst_dst_da1_subreg_nr(devinfo, inst) /
786 elem_size);
787 string(file, "<");
788 err |= control(file, "horiz stride", horiz_stride,
789 brw_inst_dst_hstride(devinfo, inst), NULL);
790 string(file, ">");
791 string(file, brw_reg_type_to_letters(type));
792 } else {
793 string(file, "g[a0");
794 if (brw_inst_dst_ia_subreg_nr(devinfo, inst))
795 format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) /
796 elem_size);
797 if (brw_inst_dst_ia1_addr_imm(devinfo, inst))
798 format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst));
799 string(file, "]<");
800 err |= control(file, "horiz stride", horiz_stride,
801 brw_inst_dst_hstride(devinfo, inst), NULL);
802 string(file, ">");
803 string(file, brw_reg_type_to_letters(type));
804 }
805 } else {
806 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
807 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),
808 brw_inst_dst_da_reg_nr(devinfo, inst));
809 if (err == -1)
810 return 0;
811 if (brw_inst_dst_da16_subreg_nr(devinfo, inst))
812 format(file, ".%u", 16 / elem_size);
813 string(file, "<1>");
814 err |= control(file, "writemask", writemask,
815 brw_inst_da16_writemask(devinfo, inst), NULL);
816 string(file, brw_reg_type_to_letters(type));
817 } else {
818 err = 1;
819 string(file, "Indirect align16 address mode not supported");
820 }
821 }
822
823 return 0;
824 }
825
826 static int
827 dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
828 {
829 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
830 int err = 0;
831 uint32_t reg_file;
832 unsigned subreg_nr;
833 enum brw_reg_type type;
834
835 if (devinfo->gen < 10 && is_align1)
836 return 0;
837
838 if (devinfo->gen == 6 && brw_inst_3src_a16_dst_reg_file(devinfo, inst))
839 reg_file = BRW_MESSAGE_REGISTER_FILE;
840 else if (devinfo->gen >= 12)
841 reg_file = brw_inst_3src_a1_dst_reg_file(devinfo, inst);
842 else if (is_align1 && brw_inst_3src_a1_dst_reg_file(devinfo, inst))
843 reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
844 else
845 reg_file = BRW_GENERAL_REGISTER_FILE;
846
847 err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(devinfo, inst));
848 if (err == -1)
849 return 0;
850
851 if (is_align1) {
852 type = brw_inst_3src_a1_dst_type(devinfo, inst);
853 subreg_nr = brw_inst_3src_a1_dst_subreg_nr(devinfo, inst);
854 } else {
855 type = brw_inst_3src_a16_dst_type(devinfo, inst);
856 subreg_nr = brw_inst_3src_a16_dst_subreg_nr(devinfo, inst) * 4;
857 }
858 subreg_nr /= brw_reg_type_to_size(type);
859
860 if (subreg_nr)
861 format(file, ".%u", subreg_nr);
862 string(file, "<1>");
863
864 if (!is_align1) {
865 err |= control(file, "writemask", writemask,
866 brw_inst_3src_a16_dst_writemask(devinfo, inst), NULL);
867 }
868 string(file, brw_reg_type_to_letters(type));
869
870 return 0;
871 }
872
873 static int
874 src_align1_region(FILE *file,
875 unsigned _vert_stride, unsigned _width,
876 unsigned _horiz_stride)
877 {
878 int err = 0;
879 string(file, "<");
880 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
881 string(file, ",");
882 err |= control(file, "width", width, _width, NULL);
883 string(file, ",");
884 err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
885 string(file, ">");
886 return err;
887 }
888
889 static int
890 src_da1(FILE *file,
891 const struct gen_device_info *devinfo,
892 unsigned opcode,
893 enum brw_reg_type type, unsigned _reg_file,
894 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
895 unsigned reg_num, unsigned sub_reg_num, unsigned __abs,
896 unsigned _negate)
897 {
898 int err = 0;
899
900 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
901 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
902 else
903 err |= control(file, "negate", m_negate, _negate, NULL);
904
905 err |= control(file, "abs", _abs, __abs, NULL);
906
907 err |= reg(file, _reg_file, reg_num);
908 if (err == -1)
909 return 0;
910 if (sub_reg_num) {
911 unsigned elem_size = brw_reg_type_to_size(type);
912 format(file, ".%d", sub_reg_num / elem_size); /* use formal style like spec */
913 }
914 src_align1_region(file, _vert_stride, _width, _horiz_stride);
915 string(file, brw_reg_type_to_letters(type));
916 return err;
917 }
918
919 static int
920 src_ia1(FILE *file,
921 const struct gen_device_info *devinfo,
922 unsigned opcode,
923 enum brw_reg_type type,
924 int _addr_imm,
925 unsigned _addr_subreg_nr,
926 unsigned _negate,
927 unsigned __abs,
928 unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)
929 {
930 int err = 0;
931
932 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
933 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
934 else
935 err |= control(file, "negate", m_negate, _negate, NULL);
936
937 err |= control(file, "abs", _abs, __abs, NULL);
938
939 string(file, "g[a0");
940 if (_addr_subreg_nr)
941 format(file, ".%d", _addr_subreg_nr);
942 if (_addr_imm)
943 format(file, " %d", _addr_imm);
944 string(file, "]");
945 src_align1_region(file, _vert_stride, _width, _horiz_stride);
946 string(file, brw_reg_type_to_letters(type));
947 return err;
948 }
949
950 static int
951 src_swizzle(FILE *file, unsigned swiz)
952 {
953 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);
954 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);
955 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);
956 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);
957 int err = 0;
958
959 if (x == y && x == z && x == w) {
960 string(file, ".");
961 err |= control(file, "channel select", chan_sel, x, NULL);
962 } else if (swiz != BRW_SWIZZLE_XYZW) {
963 string(file, ".");
964 err |= control(file, "channel select", chan_sel, x, NULL);
965 err |= control(file, "channel select", chan_sel, y, NULL);
966 err |= control(file, "channel select", chan_sel, z, NULL);
967 err |= control(file, "channel select", chan_sel, w, NULL);
968 }
969 return err;
970 }
971
972 static int
973 src_da16(FILE *file,
974 const struct gen_device_info *devinfo,
975 unsigned opcode,
976 enum brw_reg_type type,
977 unsigned _reg_file,
978 unsigned _vert_stride,
979 unsigned _reg_nr,
980 unsigned _subreg_nr,
981 unsigned __abs,
982 unsigned _negate,
983 unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)
984 {
985 int err = 0;
986
987 if (devinfo->gen >= 8 && is_logic_instruction(opcode))
988 err |= control(file, "bitnot", m_bitnot, _negate, NULL);
989 else
990 err |= control(file, "negate", m_negate, _negate, NULL);
991
992 err |= control(file, "abs", _abs, __abs, NULL);
993
994 err |= reg(file, _reg_file, _reg_nr);
995 if (err == -1)
996 return 0;
997 if (_subreg_nr) {
998 unsigned elem_size = brw_reg_type_to_size(type);
999
1000 /* bit4 for subreg number byte addressing. Make this same meaning as
1001 in da1 case, so output looks consistent. */
1002 format(file, ".%d", 16 / elem_size);
1003 }
1004 string(file, "<");
1005 err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);
1006 string(file, ">");
1007 err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));
1008 string(file, brw_reg_type_to_letters(type));
1009 return err;
1010 }
1011
1012 static enum brw_vertical_stride
1013 vstride_from_align1_3src_vstride(const struct gen_device_info *devinfo,
1014 enum gen10_align1_3src_vertical_stride vstride)
1015 {
1016 switch (vstride) {
1017 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_0: return BRW_VERTICAL_STRIDE_0;
1018 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_2:
1019 if (devinfo->gen >= 12)
1020 return BRW_VERTICAL_STRIDE_1;
1021 else
1022 return BRW_VERTICAL_STRIDE_2;
1023 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_4: return BRW_VERTICAL_STRIDE_4;
1024 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_8: return BRW_VERTICAL_STRIDE_8;
1025 default:
1026 unreachable("not reached");
1027 }
1028 }
1029
1030 static enum brw_horizontal_stride
1031 hstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride)
1032 {
1033 switch (hstride) {
1034 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0: return BRW_HORIZONTAL_STRIDE_0;
1035 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1: return BRW_HORIZONTAL_STRIDE_1;
1036 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2: return BRW_HORIZONTAL_STRIDE_2;
1037 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4: return BRW_HORIZONTAL_STRIDE_4;
1038 default:
1039 unreachable("not reached");
1040 }
1041 }
1042
1043 static enum brw_vertical_stride
1044 vstride_from_align1_3src_hstride(enum gen10_align1_3src_src_horizontal_stride hstride)
1045 {
1046 switch (hstride) {
1047 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0: return BRW_VERTICAL_STRIDE_0;
1048 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1: return BRW_VERTICAL_STRIDE_1;
1049 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2: return BRW_VERTICAL_STRIDE_2;
1050 case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4: return BRW_VERTICAL_STRIDE_4;
1051 default:
1052 unreachable("not reached");
1053 }
1054 }
1055
1056 /* From "GEN10 Regioning Rules for Align1 Ternary Operations" in the
1057 * "Register Region Restrictions" documentation
1058 */
1059 static enum brw_width
1060 implied_width(enum brw_vertical_stride _vert_stride,
1061 enum brw_horizontal_stride _horiz_stride)
1062 {
1063 /* "1. Width is 1 when Vertical and Horizontal Strides are both zero." */
1064 if (_vert_stride == BRW_VERTICAL_STRIDE_0 &&
1065 _horiz_stride == BRW_HORIZONTAL_STRIDE_0) {
1066 return BRW_WIDTH_1;
1067
1068 /* "2. Width is equal to vertical stride when Horizontal Stride is zero." */
1069 } else if (_horiz_stride == BRW_HORIZONTAL_STRIDE_0) {
1070 switch (_vert_stride) {
1071 case BRW_VERTICAL_STRIDE_2: return BRW_WIDTH_2;
1072 case BRW_VERTICAL_STRIDE_4: return BRW_WIDTH_4;
1073 case BRW_VERTICAL_STRIDE_8: return BRW_WIDTH_8;
1074 case BRW_VERTICAL_STRIDE_0:
1075 default:
1076 unreachable("not reached");
1077 }
1078
1079 } else {
1080 /* FINISHME: Implement these: */
1081
1082 /* "3. Width is equal to Vertical Stride/Horizontal Stride when both
1083 * Strides are non-zero.
1084 *
1085 * 4. Vertical Stride must not be zero if Horizontal Stride is non-zero.
1086 * This implies Vertical Stride is always greater than Horizontal
1087 * Stride."
1088 *
1089 * Given these statements and the knowledge that the stride and width
1090 * values are encoded in logarithmic form, we can perform the division
1091 * by just subtracting.
1092 */
1093 return _vert_stride - _horiz_stride;
1094 }
1095 }
1096
1097 static int
1098 src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1099 {
1100 int err = 0;
1101 unsigned reg_nr, subreg_nr;
1102 enum brw_reg_file _file;
1103 enum brw_reg_type type;
1104 enum brw_vertical_stride _vert_stride;
1105 enum brw_width _width;
1106 enum brw_horizontal_stride _horiz_stride;
1107 bool is_scalar_region;
1108 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
1109
1110 if (devinfo->gen < 10 && is_align1)
1111 return 0;
1112
1113 if (is_align1) {
1114 if (devinfo->gen >= 12 && !brw_inst_3src_a1_src0_is_imm(devinfo, inst)) {
1115 _file = brw_inst_3src_a1_src0_reg_file(devinfo, inst);
1116 } else if (brw_inst_3src_a1_src0_reg_file(devinfo, inst) ==
1117 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
1118 _file = BRW_GENERAL_REGISTER_FILE;
1119 } else if (brw_inst_3src_a1_src0_type(devinfo, inst) ==
1120 BRW_REGISTER_TYPE_NF) {
1121 _file = BRW_ARCHITECTURE_REGISTER_FILE;
1122 } else {
1123 _file = BRW_IMMEDIATE_VALUE;
1124 uint16_t imm_val = brw_inst_3src_a1_src0_imm(devinfo, inst);
1125 enum brw_reg_type type = brw_inst_3src_a1_src0_type(devinfo, inst);
1126
1127 if (type == BRW_REGISTER_TYPE_W) {
1128 format(file, "%dW", imm_val);
1129 } else if (type == BRW_REGISTER_TYPE_UW) {
1130 format(file, "0x%04xUW", imm_val);
1131 } else if (type == BRW_REGISTER_TYPE_HF) {
1132 format(file, "0x%04xHF", imm_val);
1133 }
1134 return 0;
1135 }
1136
1137 reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst);
1138 subreg_nr = brw_inst_3src_a1_src0_subreg_nr(devinfo, inst);
1139 type = brw_inst_3src_a1_src0_type(devinfo, inst);
1140 _vert_stride = vstride_from_align1_3src_vstride(
1141 devinfo, brw_inst_3src_a1_src0_vstride(devinfo, inst));
1142 _horiz_stride = hstride_from_align1_3src_hstride(
1143 brw_inst_3src_a1_src0_hstride(devinfo, inst));
1144 _width = implied_width(_vert_stride, _horiz_stride);
1145 } else {
1146 _file = BRW_GENERAL_REGISTER_FILE;
1147 reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst);
1148 subreg_nr = brw_inst_3src_a16_src0_subreg_nr(devinfo, inst) * 4;
1149 type = brw_inst_3src_a16_src_type(devinfo, inst);
1150
1151 if (brw_inst_3src_a16_src0_rep_ctrl(devinfo, inst)) {
1152 _vert_stride = BRW_VERTICAL_STRIDE_0;
1153 _width = BRW_WIDTH_1;
1154 _horiz_stride = BRW_HORIZONTAL_STRIDE_0;
1155 } else {
1156 _vert_stride = BRW_VERTICAL_STRIDE_4;
1157 _width = BRW_WIDTH_4;
1158 _horiz_stride = BRW_HORIZONTAL_STRIDE_1;
1159 }
1160 }
1161 is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 &&
1162 _width == BRW_WIDTH_1 &&
1163 _horiz_stride == BRW_HORIZONTAL_STRIDE_0;
1164
1165 subreg_nr /= brw_reg_type_to_size(type);
1166
1167 err |= control(file, "negate", m_negate,
1168 brw_inst_3src_src0_negate(devinfo, inst), NULL);
1169 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL);
1170
1171 err |= reg(file, _file, reg_nr);
1172 if (err == -1)
1173 return 0;
1174 if (subreg_nr || is_scalar_region)
1175 format(file, ".%d", subreg_nr);
1176 src_align1_region(file, _vert_stride, _width, _horiz_stride);
1177 if (!is_scalar_region && !is_align1)
1178 err |= src_swizzle(file, brw_inst_3src_a16_src0_swizzle(devinfo, inst));
1179 string(file, brw_reg_type_to_letters(type));
1180 return err;
1181 }
1182
1183 static int
1184 src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1185 {
1186 int err = 0;
1187 unsigned reg_nr, subreg_nr;
1188 enum brw_reg_file _file;
1189 enum brw_reg_type type;
1190 enum brw_vertical_stride _vert_stride;
1191 enum brw_width _width;
1192 enum brw_horizontal_stride _horiz_stride;
1193 bool is_scalar_region;
1194 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
1195
1196 if (devinfo->gen < 10 && is_align1)
1197 return 0;
1198
1199 if (is_align1) {
1200 if (devinfo->gen >= 12) {
1201 _file = brw_inst_3src_a1_src1_reg_file(devinfo, inst);
1202 } else if (brw_inst_3src_a1_src1_reg_file(devinfo, inst) ==
1203 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
1204 _file = BRW_GENERAL_REGISTER_FILE;
1205 } else {
1206 _file = BRW_ARCHITECTURE_REGISTER_FILE;
1207 }
1208
1209 reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst);
1210 subreg_nr = brw_inst_3src_a1_src1_subreg_nr(devinfo, inst);
1211 type = brw_inst_3src_a1_src1_type(devinfo, inst);
1212
1213 _vert_stride = vstride_from_align1_3src_vstride(
1214 devinfo, brw_inst_3src_a1_src1_vstride(devinfo, inst));
1215 _horiz_stride = hstride_from_align1_3src_hstride(
1216 brw_inst_3src_a1_src1_hstride(devinfo, inst));
1217 _width = implied_width(_vert_stride, _horiz_stride);
1218 } else {
1219 _file = BRW_GENERAL_REGISTER_FILE;
1220 reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst);
1221 subreg_nr = brw_inst_3src_a16_src1_subreg_nr(devinfo, inst) * 4;
1222 type = brw_inst_3src_a16_src_type(devinfo, inst);
1223
1224 if (brw_inst_3src_a16_src1_rep_ctrl(devinfo, inst)) {
1225 _vert_stride = BRW_VERTICAL_STRIDE_0;
1226 _width = BRW_WIDTH_1;
1227 _horiz_stride = BRW_HORIZONTAL_STRIDE_0;
1228 } else {
1229 _vert_stride = BRW_VERTICAL_STRIDE_4;
1230 _width = BRW_WIDTH_4;
1231 _horiz_stride = BRW_HORIZONTAL_STRIDE_1;
1232 }
1233 }
1234 is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 &&
1235 _width == BRW_WIDTH_1 &&
1236 _horiz_stride == BRW_HORIZONTAL_STRIDE_0;
1237
1238 subreg_nr /= brw_reg_type_to_size(type);
1239
1240 err |= control(file, "negate", m_negate,
1241 brw_inst_3src_src1_negate(devinfo, inst), NULL);
1242 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL);
1243
1244 err |= reg(file, _file, reg_nr);
1245 if (err == -1)
1246 return 0;
1247 if (subreg_nr || is_scalar_region)
1248 format(file, ".%d", subreg_nr);
1249 src_align1_region(file, _vert_stride, _width, _horiz_stride);
1250 if (!is_scalar_region && !is_align1)
1251 err |= src_swizzle(file, brw_inst_3src_a16_src1_swizzle(devinfo, inst));
1252 string(file, brw_reg_type_to_letters(type));
1253 return err;
1254 }
1255
1256 static int
1257 src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1258 {
1259 int err = 0;
1260 unsigned reg_nr, subreg_nr;
1261 enum brw_reg_file _file;
1262 enum brw_reg_type type;
1263 enum brw_vertical_stride _vert_stride;
1264 enum brw_width _width;
1265 enum brw_horizontal_stride _horiz_stride;
1266 bool is_scalar_region;
1267 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
1268
1269 if (devinfo->gen < 10 && is_align1)
1270 return 0;
1271
1272 if (is_align1) {
1273 if (devinfo->gen >= 12 && !brw_inst_3src_a1_src2_is_imm(devinfo, inst)) {
1274 _file = brw_inst_3src_a1_src2_reg_file(devinfo, inst);
1275 } else if (brw_inst_3src_a1_src2_reg_file(devinfo, inst) ==
1276 BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {
1277 _file = BRW_GENERAL_REGISTER_FILE;
1278 } else {
1279 _file = BRW_IMMEDIATE_VALUE;
1280 uint16_t imm_val = brw_inst_3src_a1_src2_imm(devinfo, inst);
1281 enum brw_reg_type type = brw_inst_3src_a1_src2_type(devinfo, inst);
1282
1283 if (type == BRW_REGISTER_TYPE_W) {
1284 format(file, "%dW", imm_val);
1285 } else if (type == BRW_REGISTER_TYPE_UW) {
1286 format(file, "0x%04xUW", imm_val);
1287 } else if (type == BRW_REGISTER_TYPE_HF) {
1288 format(file, "0x%04xHF", imm_val);
1289 }
1290 return 0;
1291 }
1292
1293 reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst);
1294 subreg_nr = brw_inst_3src_a1_src2_subreg_nr(devinfo, inst);
1295 type = brw_inst_3src_a1_src2_type(devinfo, inst);
1296 /* FINISHME: No vertical stride on src2. Is using the hstride in place
1297 * correct? Doesn't seem like it, since there's hstride=1 but
1298 * no vstride=1.
1299 */
1300 _vert_stride = vstride_from_align1_3src_hstride(
1301 brw_inst_3src_a1_src2_hstride(devinfo, inst));
1302 _horiz_stride = hstride_from_align1_3src_hstride(
1303 brw_inst_3src_a1_src2_hstride(devinfo, inst));
1304 _width = implied_width(_vert_stride, _horiz_stride);
1305 } else {
1306 _file = BRW_GENERAL_REGISTER_FILE;
1307 reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst);
1308 subreg_nr = brw_inst_3src_a16_src2_subreg_nr(devinfo, inst) * 4;
1309 type = brw_inst_3src_a16_src_type(devinfo, inst);
1310
1311 if (brw_inst_3src_a16_src2_rep_ctrl(devinfo, inst)) {
1312 _vert_stride = BRW_VERTICAL_STRIDE_0;
1313 _width = BRW_WIDTH_1;
1314 _horiz_stride = BRW_HORIZONTAL_STRIDE_0;
1315 } else {
1316 _vert_stride = BRW_VERTICAL_STRIDE_4;
1317 _width = BRW_WIDTH_4;
1318 _horiz_stride = BRW_HORIZONTAL_STRIDE_1;
1319 }
1320 }
1321 is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 &&
1322 _width == BRW_WIDTH_1 &&
1323 _horiz_stride == BRW_HORIZONTAL_STRIDE_0;
1324
1325 subreg_nr /= brw_reg_type_to_size(type);
1326
1327 err |= control(file, "negate", m_negate,
1328 brw_inst_3src_src2_negate(devinfo, inst), NULL);
1329 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL);
1330
1331 err |= reg(file, _file, reg_nr);
1332 if (err == -1)
1333 return 0;
1334 if (subreg_nr || is_scalar_region)
1335 format(file, ".%d", subreg_nr);
1336 src_align1_region(file, _vert_stride, _width, _horiz_stride);
1337 if (!is_scalar_region && !is_align1)
1338 err |= src_swizzle(file, brw_inst_3src_a16_src2_swizzle(devinfo, inst));
1339 string(file, brw_reg_type_to_letters(type));
1340 return err;
1341 }
1342
1343 static int
1344 imm(FILE *file, const struct gen_device_info *devinfo, enum brw_reg_type type,
1345 const brw_inst *inst)
1346 {
1347 switch (type) {
1348 case BRW_REGISTER_TYPE_UQ:
1349 format(file, "0x%016"PRIx64"UQ", brw_inst_imm_uq(devinfo, inst));
1350 break;
1351 case BRW_REGISTER_TYPE_Q:
1352 format(file, "0x%016"PRIx64"Q", brw_inst_imm_uq(devinfo, inst));
1353 break;
1354 case BRW_REGISTER_TYPE_UD:
1355 format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst));
1356 break;
1357 case BRW_REGISTER_TYPE_D:
1358 format(file, "%dD", brw_inst_imm_d(devinfo, inst));
1359 break;
1360 case BRW_REGISTER_TYPE_UW:
1361 format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst));
1362 break;
1363 case BRW_REGISTER_TYPE_W:
1364 format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst));
1365 break;
1366 case BRW_REGISTER_TYPE_UV:
1367 format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst));
1368 break;
1369 case BRW_REGISTER_TYPE_VF:
1370 format(file, "0x%"PRIx64"VF", brw_inst_bits(inst, 127, 96));
1371 pad(file, 48);
1372 format(file, "/* [%-gF, %-gF, %-gF, %-gF]VF */",
1373 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),
1374 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8),
1375 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16),
1376 brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24));
1377 break;
1378 case BRW_REGISTER_TYPE_V:
1379 format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst));
1380 break;
1381 case BRW_REGISTER_TYPE_F:
1382 /* The DIM instruction's src0 uses an F type but contains a
1383 * 64-bit immediate
1384 */
1385 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_DIM) {
1386 format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 64));
1387 pad(file, 48);
1388 format(file, "/* %-gF */", brw_inst_imm_df(devinfo, inst));
1389 } else {
1390 format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 96));
1391 pad(file, 48);
1392 format(file, " /* %-gF */", brw_inst_imm_f(devinfo, inst));
1393 }
1394 break;
1395 case BRW_REGISTER_TYPE_DF:
1396 format(file, "0x%016"PRIx64"DF", brw_inst_bits(inst, 127, 64));
1397 pad(file, 48);
1398 format(file, "/* %-gDF */", brw_inst_imm_df(devinfo, inst));
1399 break;
1400 case BRW_REGISTER_TYPE_HF:
1401 string(file, "Half Float IMM");
1402 break;
1403 case BRW_REGISTER_TYPE_NF:
1404 case BRW_REGISTER_TYPE_UB:
1405 case BRW_REGISTER_TYPE_B:
1406 format(file, "*** invalid immediate type %d ", type);
1407 }
1408 return 0;
1409 }
1410
1411 static int
1412 src_sends_da(FILE *file,
1413 const struct gen_device_info *devinfo,
1414 enum brw_reg_type type,
1415 enum brw_reg_file _reg_file,
1416 unsigned _reg_nr,
1417 unsigned _reg_subnr)
1418 {
1419 int err = 0;
1420
1421 err |= reg(file, _reg_file, _reg_nr);
1422 if (err == -1)
1423 return 0;
1424 if (_reg_subnr)
1425 format(file, ".1");
1426 string(file, brw_reg_type_to_letters(type));
1427
1428 return err;
1429 }
1430
1431 static int
1432 src_sends_ia(FILE *file,
1433 const struct gen_device_info *devinfo,
1434 enum brw_reg_type type,
1435 int _addr_imm,
1436 unsigned _addr_subreg_nr)
1437 {
1438 string(file, "g[a0");
1439 if (_addr_subreg_nr)
1440 format(file, ".1");
1441 if (_addr_imm)
1442 format(file, " %d", _addr_imm);
1443 string(file, "]");
1444 string(file, brw_reg_type_to_letters(type));
1445
1446 return 0;
1447 }
1448
1449 static int
1450 src_send_desc_ia(FILE *file,
1451 const struct gen_device_info *devinfo,
1452 unsigned _addr_subreg_nr)
1453 {
1454 string(file, "a0");
1455 if (_addr_subreg_nr)
1456 format(file, ".%d", _addr_subreg_nr);
1457 format(file, "<0>UD");
1458
1459 return 0;
1460 }
1461
1462 static int
1463 src0(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1464 {
1465 if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {
1466 if (devinfo->gen >= 12) {
1467 return src_sends_da(file,
1468 devinfo,
1469 BRW_REGISTER_TYPE_UD,
1470 brw_inst_send_src0_reg_file(devinfo, inst),
1471 brw_inst_src0_da_reg_nr(devinfo, inst),
1472 0);
1473 } else if (brw_inst_send_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1474 return src_sends_da(file,
1475 devinfo,
1476 BRW_REGISTER_TYPE_UD,
1477 BRW_GENERAL_REGISTER_FILE,
1478 brw_inst_src0_da_reg_nr(devinfo, inst),
1479 brw_inst_src0_da16_subreg_nr(devinfo, inst));
1480 } else {
1481 return src_sends_ia(file,
1482 devinfo,
1483 BRW_REGISTER_TYPE_UD,
1484 brw_inst_send_src0_ia16_addr_imm(devinfo, inst),
1485 brw_inst_src0_ia_subreg_nr(devinfo, inst));
1486 }
1487 } else if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1488 return imm(file, devinfo, brw_inst_src0_type(devinfo, inst), inst);
1489 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1490 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1491 return src_da1(file,
1492 devinfo,
1493 brw_inst_opcode(devinfo, inst),
1494 brw_inst_src0_type(devinfo, inst),
1495 brw_inst_src0_reg_file(devinfo, inst),
1496 brw_inst_src0_vstride(devinfo, inst),
1497 brw_inst_src0_width(devinfo, inst),
1498 brw_inst_src0_hstride(devinfo, inst),
1499 brw_inst_src0_da_reg_nr(devinfo, inst),
1500 brw_inst_src0_da1_subreg_nr(devinfo, inst),
1501 brw_inst_src0_abs(devinfo, inst),
1502 brw_inst_src0_negate(devinfo, inst));
1503 } else {
1504 return src_ia1(file,
1505 devinfo,
1506 brw_inst_opcode(devinfo, inst),
1507 brw_inst_src0_type(devinfo, inst),
1508 brw_inst_src0_ia1_addr_imm(devinfo, inst),
1509 brw_inst_src0_ia_subreg_nr(devinfo, inst),
1510 brw_inst_src0_negate(devinfo, inst),
1511 brw_inst_src0_abs(devinfo, inst),
1512 brw_inst_src0_hstride(devinfo, inst),
1513 brw_inst_src0_width(devinfo, inst),
1514 brw_inst_src0_vstride(devinfo, inst));
1515 }
1516 } else {
1517 if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1518 return src_da16(file,
1519 devinfo,
1520 brw_inst_opcode(devinfo, inst),
1521 brw_inst_src0_type(devinfo, inst),
1522 brw_inst_src0_reg_file(devinfo, inst),
1523 brw_inst_src0_vstride(devinfo, inst),
1524 brw_inst_src0_da_reg_nr(devinfo, inst),
1525 brw_inst_src0_da16_subreg_nr(devinfo, inst),
1526 brw_inst_src0_abs(devinfo, inst),
1527 brw_inst_src0_negate(devinfo, inst),
1528 brw_inst_src0_da16_swiz_x(devinfo, inst),
1529 brw_inst_src0_da16_swiz_y(devinfo, inst),
1530 brw_inst_src0_da16_swiz_z(devinfo, inst),
1531 brw_inst_src0_da16_swiz_w(devinfo, inst));
1532 } else {
1533 string(file, "Indirect align16 address mode not supported");
1534 return 1;
1535 }
1536 }
1537 }
1538
1539 static int
1540 src1(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1541 {
1542 if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {
1543 return src_sends_da(file,
1544 devinfo,
1545 BRW_REGISTER_TYPE_UD,
1546 brw_inst_send_src1_reg_file(devinfo, inst),
1547 brw_inst_send_src1_reg_nr(devinfo, inst),
1548 0 /* subreg_nr */);
1549 } else if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1550 return imm(file, devinfo, brw_inst_src1_type(devinfo, inst), inst);
1551 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1552 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1553 return src_da1(file,
1554 devinfo,
1555 brw_inst_opcode(devinfo, inst),
1556 brw_inst_src1_type(devinfo, inst),
1557 brw_inst_src1_reg_file(devinfo, inst),
1558 brw_inst_src1_vstride(devinfo, inst),
1559 brw_inst_src1_width(devinfo, inst),
1560 brw_inst_src1_hstride(devinfo, inst),
1561 brw_inst_src1_da_reg_nr(devinfo, inst),
1562 brw_inst_src1_da1_subreg_nr(devinfo, inst),
1563 brw_inst_src1_abs(devinfo, inst),
1564 brw_inst_src1_negate(devinfo, inst));
1565 } else {
1566 return src_ia1(file,
1567 devinfo,
1568 brw_inst_opcode(devinfo, inst),
1569 brw_inst_src1_type(devinfo, inst),
1570 brw_inst_src1_ia1_addr_imm(devinfo, inst),
1571 brw_inst_src1_ia_subreg_nr(devinfo, inst),
1572 brw_inst_src1_negate(devinfo, inst),
1573 brw_inst_src1_abs(devinfo, inst),
1574 brw_inst_src1_hstride(devinfo, inst),
1575 brw_inst_src1_width(devinfo, inst),
1576 brw_inst_src1_vstride(devinfo, inst));
1577 }
1578 } else {
1579 if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {
1580 return src_da16(file,
1581 devinfo,
1582 brw_inst_opcode(devinfo, inst),
1583 brw_inst_src1_type(devinfo, inst),
1584 brw_inst_src1_reg_file(devinfo, inst),
1585 brw_inst_src1_vstride(devinfo, inst),
1586 brw_inst_src1_da_reg_nr(devinfo, inst),
1587 brw_inst_src1_da16_subreg_nr(devinfo, inst),
1588 brw_inst_src1_abs(devinfo, inst),
1589 brw_inst_src1_negate(devinfo, inst),
1590 brw_inst_src1_da16_swiz_x(devinfo, inst),
1591 brw_inst_src1_da16_swiz_y(devinfo, inst),
1592 brw_inst_src1_da16_swiz_z(devinfo, inst),
1593 brw_inst_src1_da16_swiz_w(devinfo, inst));
1594 } else {
1595 string(file, "Indirect align16 address mode not supported");
1596 return 1;
1597 }
1598 }
1599 }
1600
1601 static int
1602 qtr_ctrl(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1603 {
1604 int qtr_ctl = brw_inst_qtr_control(devinfo, inst);
1605 int exec_size = 1 << brw_inst_exec_size(devinfo, inst);
1606 const unsigned nib_ctl = devinfo->gen < 7 ? 0 :
1607 brw_inst_nib_control(devinfo, inst);
1608
1609 if (exec_size < 8 || nib_ctl) {
1610 format(file, " %dN", qtr_ctl * 2 + nib_ctl + 1);
1611 } else if (exec_size == 8) {
1612 switch (qtr_ctl) {
1613 case 0:
1614 string(file, " 1Q");
1615 break;
1616 case 1:
1617 string(file, " 2Q");
1618 break;
1619 case 2:
1620 string(file, " 3Q");
1621 break;
1622 case 3:
1623 string(file, " 4Q");
1624 break;
1625 }
1626 } else if (exec_size == 16) {
1627 if (qtr_ctl < 2)
1628 string(file, " 1H");
1629 else
1630 string(file, " 2H");
1631 }
1632 return 0;
1633 }
1634
1635 static int
1636 swsb(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst)
1637 {
1638 const struct tgl_swsb swsb = tgl_swsb_decode(brw_inst_opcode(devinfo, inst),
1639 brw_inst_swsb(devinfo, inst));
1640 if (swsb.regdist)
1641 format(file, " @%d", swsb.regdist);
1642 if (swsb.mode)
1643 format(file, " $%d%s", swsb.sbid,
1644 (swsb.mode & TGL_SBID_SET ? "" :
1645 swsb.mode & TGL_SBID_DST ? ".dst" : ".src"));
1646 return 0;
1647 }
1648
1649 #ifdef DEBUG
1650 static __attribute__((__unused__)) int
1651 brw_disassemble_imm(const struct gen_device_info *devinfo,
1652 uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0)
1653 {
1654 brw_inst inst;
1655 inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0);
1656 inst.data[1] = (((uint64_t) dw3) << 32) | ((uint64_t) dw2);
1657 return brw_disassemble_inst(stderr, devinfo, &inst, false);
1658 }
1659 #endif
1660
1661 int
1662 brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
1663 const brw_inst *inst, bool is_compacted)
1664 {
1665 int err = 0;
1666 int space = 0;
1667
1668 const enum opcode opcode = brw_inst_opcode(devinfo, inst);
1669 const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
1670
1671 if (brw_inst_pred_control(devinfo, inst)) {
1672 string(file, "(");
1673 err |= control(file, "predicate inverse", pred_inv,
1674 brw_inst_pred_inv(devinfo, inst), NULL);
1675 format(file, "f%"PRIu64".%"PRIu64,
1676 devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0,
1677 brw_inst_flag_subreg_nr(devinfo, inst));
1678 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
1679 err |= control(file, "predicate control align1", pred_ctrl_align1,
1680 brw_inst_pred_control(devinfo, inst), NULL);
1681 } else {
1682 err |= control(file, "predicate control align16", pred_ctrl_align16,
1683 brw_inst_pred_control(devinfo, inst), NULL);
1684 }
1685 string(file, ") ");
1686 }
1687
1688 err |= print_opcode(file, devinfo, opcode);
1689
1690 if (!is_send(opcode))
1691 err |= control(file, "saturate", saturate, brw_inst_saturate(devinfo, inst),
1692 NULL);
1693
1694 err |= control(file, "debug control", debug_ctrl,
1695 brw_inst_debug_control(devinfo, inst), NULL);
1696
1697 if (opcode == BRW_OPCODE_MATH) {
1698 string(file, " ");
1699 err |= control(file, "function", math_function,
1700 brw_inst_math_function(devinfo, inst), NULL);
1701
1702 } else if (opcode == BRW_OPCODE_SYNC) {
1703 string(file, " ");
1704 err |= control(file, "function", sync_function,
1705 brw_inst_cond_modifier(devinfo, inst), NULL);
1706
1707 } else if (!is_send(opcode)) {
1708 err |= control(file, "conditional modifier", conditional_modifier,
1709 brw_inst_cond_modifier(devinfo, inst), NULL);
1710
1711 /* If we're using the conditional modifier, print which flags reg is
1712 * used for it. Note that on gen6+, the embedded-condition SEL and
1713 * control flow doesn't update flags.
1714 */
1715 if (brw_inst_cond_modifier(devinfo, inst) &&
1716 (devinfo->gen < 6 || (opcode != BRW_OPCODE_SEL &&
1717 opcode != BRW_OPCODE_CSEL &&
1718 opcode != BRW_OPCODE_IF &&
1719 opcode != BRW_OPCODE_WHILE))) {
1720 format(file, ".f%"PRIu64".%"PRIu64,
1721 devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0,
1722 brw_inst_flag_subreg_nr(devinfo, inst));
1723 }
1724 }
1725
1726 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
1727 string(file, "(");
1728 err |= control(file, "execution size", exec_size,
1729 brw_inst_exec_size(devinfo, inst), NULL);
1730 string(file, ")");
1731 }
1732
1733 if (opcode == BRW_OPCODE_SEND && devinfo->gen < 6)
1734 format(file, " %"PRIu64, brw_inst_base_mrf(devinfo, inst));
1735
1736 if (brw_has_uip(devinfo, opcode)) {
1737 /* Instructions that have UIP also have JIP. */
1738 pad(file, 16);
1739 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1740 pad(file, 32);
1741 format(file, "UIP: %d", brw_inst_uip(devinfo, inst));
1742 } else if (brw_has_jip(devinfo, opcode)) {
1743 pad(file, 16);
1744 if (devinfo->gen >= 7) {
1745 format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
1746 } else {
1747 format(file, "JIP: %d", brw_inst_gen6_jump_count(devinfo, inst));
1748 }
1749 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
1750 opcode == BRW_OPCODE_CONTINUE ||
1751 opcode == BRW_OPCODE_ELSE)) {
1752 pad(file, 16);
1753 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1754 pad(file, 32);
1755 format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst));
1756 } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_IF ||
1757 opcode == BRW_OPCODE_IFF ||
1758 opcode == BRW_OPCODE_HALT ||
1759 opcode == BRW_OPCODE_WHILE)) {
1760 pad(file, 16);
1761 format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
1762 } else if (devinfo->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
1763 pad(file, 16);
1764 format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst));
1765 } else if (opcode == BRW_OPCODE_JMPI) {
1766 pad(file, 16);
1767 err |= src1(file, devinfo, inst);
1768 } else if (desc && desc->nsrc == 3) {
1769 pad(file, 16);
1770 err |= dest_3src(file, devinfo, inst);
1771
1772 pad(file, 32);
1773 err |= src0_3src(file, devinfo, inst);
1774
1775 pad(file, 48);
1776 err |= src1_3src(file, devinfo, inst);
1777
1778 pad(file, 64);
1779 err |= src2_3src(file, devinfo, inst);
1780 } else if (desc) {
1781 if (desc->ndst > 0) {
1782 pad(file, 16);
1783 err |= dest(file, devinfo, inst);
1784 }
1785
1786 if (desc->nsrc > 0) {
1787 pad(file, 32);
1788 err |= src0(file, devinfo, inst);
1789 }
1790
1791 if (desc->nsrc > 1) {
1792 pad(file, 48);
1793 err |= src1(file, devinfo, inst);
1794 }
1795 }
1796
1797 if (is_send(opcode)) {
1798 enum brw_message_target sfid = brw_inst_sfid(devinfo, inst);
1799
1800 bool has_imm_desc = false, has_imm_ex_desc = false;
1801 uint32_t imm_desc = 0, imm_ex_desc = 0;
1802 if (is_split_send(devinfo, opcode)) {
1803 pad(file, 64);
1804 if (brw_inst_send_sel_reg32_desc(devinfo, inst)) {
1805 /* show the indirect descriptor source */
1806 err |= src_send_desc_ia(file, devinfo, 0);
1807 } else {
1808 has_imm_desc = true;
1809 imm_desc = brw_inst_send_desc(devinfo, inst);
1810 fprintf(file, "0x%08"PRIx32, imm_desc);
1811 }
1812
1813 pad(file, 80);
1814 if (brw_inst_send_sel_reg32_ex_desc(devinfo, inst)) {
1815 /* show the indirect descriptor source */
1816 err |= src_send_desc_ia(file, devinfo,
1817 brw_inst_send_ex_desc_ia_subreg_nr(devinfo, inst));
1818 } else {
1819 has_imm_ex_desc = true;
1820 imm_ex_desc = brw_inst_sends_ex_desc(devinfo, inst);
1821 fprintf(file, "0x%08"PRIx32, imm_ex_desc);
1822 }
1823 } else {
1824 if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
1825 /* show the indirect descriptor source */
1826 pad(file, 48);
1827 err |= src1(file, devinfo, inst);
1828 pad(file, 64);
1829 } else {
1830 has_imm_desc = true;
1831 imm_desc = brw_inst_send_desc(devinfo, inst);
1832 pad(file, 48);
1833 }
1834
1835 /* Print message descriptor as immediate source */
1836 fprintf(file, "0x%08"PRIx64, inst->data[1] >> 32);
1837 }
1838
1839 newline(file);
1840 pad(file, 16);
1841 space = 0;
1842
1843 fprintf(file, " ");
1844 err |= control(file, "SFID", devinfo->gen >= 6 ? gen6_sfid : gen4_sfid,
1845 sfid, &space);
1846 string(file, " MsgDesc:");
1847
1848 if (!has_imm_desc) {
1849 format(file, " indirect");
1850 } else {
1851 switch (sfid) {
1852 case BRW_SFID_MATH:
1853 err |= control(file, "math function", math_function,
1854 brw_inst_math_msg_function(devinfo, inst), &space);
1855 err |= control(file, "math saturate", math_saturate,
1856 brw_inst_math_msg_saturate(devinfo, inst), &space);
1857 err |= control(file, "math signed", math_signed,
1858 brw_inst_math_msg_signed_int(devinfo, inst), &space);
1859 err |= control(file, "math scalar", math_scalar,
1860 brw_inst_math_msg_data_type(devinfo, inst), &space);
1861 err |= control(file, "math precision", math_precision,
1862 brw_inst_math_msg_precision(devinfo, inst), &space);
1863 break;
1864 case BRW_SFID_SAMPLER:
1865 if (devinfo->gen >= 5) {
1866 err |= control(file, "sampler message", gen5_sampler_msg_type,
1867 brw_sampler_desc_msg_type(devinfo, imm_desc),
1868 &space);
1869 err |= control(file, "sampler simd mode", gen5_sampler_simd_mode,
1870 brw_sampler_desc_simd_mode(devinfo, imm_desc),
1871 &space);
1872 format(file, " Surface = %u Sampler = %u",
1873 brw_sampler_desc_binding_table_index(devinfo, imm_desc),
1874 brw_sampler_desc_sampler(devinfo, imm_desc));
1875 } else {
1876 format(file, " (%u, %u, %u, ",
1877 brw_sampler_desc_binding_table_index(devinfo, imm_desc),
1878 brw_sampler_desc_sampler(devinfo, imm_desc),
1879 brw_sampler_desc_msg_type(devinfo, imm_desc));
1880 if (!devinfo->is_g4x) {
1881 err |= control(file, "sampler target format",
1882 sampler_target_format,
1883 brw_sampler_desc_return_format(devinfo, imm_desc),
1884 NULL);
1885 }
1886 string(file, ")");
1887 }
1888 break;
1889 case GEN6_SFID_DATAPORT_SAMPLER_CACHE:
1890 case GEN6_SFID_DATAPORT_CONSTANT_CACHE:
1891 /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */
1892 if (devinfo->gen >= 6) {
1893 format(file, " (%u, %u, %u, %u)",
1894 brw_dp_desc_binding_table_index(devinfo, imm_desc),
1895 brw_dp_desc_msg_control(devinfo, imm_desc),
1896 brw_dp_desc_msg_type(devinfo, imm_desc),
1897 devinfo->gen >= 7 ? 0u :
1898 brw_dp_write_desc_write_commit(devinfo, imm_desc));
1899 } else {
1900 bool is_965 = devinfo->gen == 4 && !devinfo->is_g4x;
1901 err |= control(file, "DP read message type",
1902 is_965 ? gen4_dp_read_port_msg_type :
1903 g45_dp_read_port_msg_type,
1904 brw_dp_read_desc_msg_type(devinfo, imm_desc),
1905 &space);
1906
1907 format(file, " MsgCtrl = 0x%u",
1908 brw_dp_read_desc_msg_control(devinfo, imm_desc));
1909
1910 format(file, " Surface = %u",
1911 brw_dp_desc_binding_table_index(devinfo, imm_desc));
1912 }
1913 break;
1914
1915 case GEN6_SFID_DATAPORT_RENDER_CACHE: {
1916 /* aka BRW_SFID_DATAPORT_WRITE on Gen4-5 */
1917 unsigned msg_type = brw_dp_write_desc_msg_type(devinfo, imm_desc);
1918
1919 err |= control(file, "DP rc message type",
1920 dp_rc_msg_type(devinfo), msg_type, &space);
1921
1922 bool is_rt_write = msg_type ==
1923 (devinfo->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE
1924 : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE);
1925
1926 if (is_rt_write) {
1927 err |= control(file, "RT message type", m_rt_write_subtype,
1928 brw_inst_rt_message_type(devinfo, inst), &space);
1929 if (devinfo->gen >= 6 && brw_inst_rt_slot_group(devinfo, inst))
1930 string(file, " Hi");
1931 if (brw_dp_write_desc_last_render_target(devinfo, imm_desc))
1932 string(file, " LastRT");
1933 if (devinfo->gen < 7 &&
1934 brw_dp_write_desc_write_commit(devinfo, imm_desc))
1935 string(file, " WriteCommit");
1936 } else {
1937 format(file, " MsgCtrl = 0x%u",
1938 brw_dp_write_desc_msg_control(devinfo, imm_desc));
1939 }
1940
1941 format(file, " Surface = %u",
1942 brw_dp_desc_binding_table_index(devinfo, imm_desc));
1943 break;
1944 }
1945
1946 case BRW_SFID_URB: {
1947 unsigned opcode = brw_inst_urb_opcode(devinfo, inst);
1948
1949 format(file, " %"PRIu64, brw_inst_urb_global_offset(devinfo, inst));
1950
1951 space = 1;
1952
1953 err |= control(file, "urb opcode",
1954 devinfo->gen >= 7 ? gen7_urb_opcode
1955 : gen5_urb_opcode,
1956 opcode, &space);
1957
1958 if (devinfo->gen >= 7 &&
1959 brw_inst_urb_per_slot_offset(devinfo, inst)) {
1960 string(file, " per-slot");
1961 }
1962
1963 if (opcode == GEN8_URB_OPCODE_SIMD8_WRITE ||
1964 opcode == GEN8_URB_OPCODE_SIMD8_READ) {
1965 if (brw_inst_urb_channel_mask_present(devinfo, inst))
1966 string(file, " masked");
1967 } else {
1968 err |= control(file, "urb swizzle", urb_swizzle,
1969 brw_inst_urb_swizzle_control(devinfo, inst),
1970 &space);
1971 }
1972
1973 if (devinfo->gen < 7) {
1974 err |= control(file, "urb allocate", urb_allocate,
1975 brw_inst_urb_allocate(devinfo, inst), &space);
1976 err |= control(file, "urb used", urb_used,
1977 brw_inst_urb_used(devinfo, inst), &space);
1978 }
1979 if (devinfo->gen < 8) {
1980 err |= control(file, "urb complete", urb_complete,
1981 brw_inst_urb_complete(devinfo, inst), &space);
1982 }
1983 break;
1984 }
1985 case BRW_SFID_THREAD_SPAWNER:
1986 break;
1987
1988 case BRW_SFID_MESSAGE_GATEWAY:
1989 format(file, " (%s)",
1990 gen7_gateway_subfuncid[brw_inst_gateway_subfuncid(devinfo, inst)]);
1991 break;
1992
1993 case GEN7_SFID_DATAPORT_DATA_CACHE:
1994 if (devinfo->gen >= 7) {
1995 format(file, " (");
1996
1997 err |= control(file, "DP DC0 message type",
1998 dp_dc0_msg_type_gen7,
1999 brw_dp_desc_msg_type(devinfo, imm_desc), &space);
2000
2001 format(file, ", %u, ",
2002 brw_dp_desc_binding_table_index(devinfo, imm_desc));
2003
2004 switch (brw_inst_dp_msg_type(devinfo, inst)) {
2005 case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP:
2006 control(file, "atomic op", aop,
2007 brw_dp_desc_msg_control(devinfo, imm_desc) & 0xf,
2008 &space);
2009 break;
2010 default:
2011 format(file, "%u",
2012 brw_dp_desc_msg_control(devinfo, imm_desc));
2013 }
2014 format(file, ")");
2015 break;
2016 }
2017 /* FALLTHROUGH */
2018
2019 case HSW_SFID_DATAPORT_DATA_CACHE_1: {
2020 if (devinfo->gen >= 7) {
2021 format(file, " (");
2022
2023 unsigned msg_ctrl = brw_dp_desc_msg_control(devinfo, imm_desc);
2024
2025 err |= control(file, "DP DC1 message type",
2026 dp_dc1_msg_type_hsw,
2027 brw_dp_desc_msg_type(devinfo, imm_desc), &space);
2028
2029 format(file, ", Surface = %u, ",
2030 brw_dp_desc_binding_table_index(devinfo, imm_desc));
2031
2032 switch (brw_inst_dp_msg_type(devinfo, inst)) {
2033 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:
2034 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
2035 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
2036 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
2037 /* fallthrough */
2038 case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
2039 case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
2040 case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:
2041 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP:
2042 control(file, "atomic op", aop, msg_ctrl & 0xf, &space);
2043 break;
2044 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:
2045 case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:
2046 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:
2047 case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE:
2048 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE:
2049 case GEN8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ: {
2050 static const char *simd_modes[] = { "4x2", "16", "8" };
2051 format(file, "SIMD%s, Mask = 0x%x",
2052 simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);
2053 break;
2054 }
2055 case GEN9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP:
2056 case GEN9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP:
2057 format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
2058 control(file, "atomic float op", aop_float, msg_ctrl & 0xf,
2059 &space);
2060 break;
2061 default:
2062 format(file, "0x%x", msg_ctrl);
2063 }
2064 format(file, ")");
2065 break;
2066 }
2067 }
2068 /* FALLTHROUGH */
2069
2070 case GEN7_SFID_PIXEL_INTERPOLATOR:
2071 if (devinfo->gen >= 7) {
2072 format(file, " (%s, %s, 0x%02"PRIx64")",
2073 brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp",
2074 pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)],
2075 brw_inst_pi_message_data(devinfo, inst));
2076 break;
2077 }
2078 /* FALLTHROUGH */
2079
2080 default:
2081 format(file, "unsupported shared function ID %d", sfid);
2082 break;
2083 }
2084
2085 if (space)
2086 string(file, " ");
2087 }
2088 if (has_imm_desc)
2089 format(file, "mlen %u", brw_message_desc_mlen(devinfo, imm_desc));
2090 if (has_imm_ex_desc) {
2091 format(file, " ex_mlen %u",
2092 brw_message_ex_desc_ex_mlen(devinfo, imm_ex_desc));
2093 }
2094 if (has_imm_desc)
2095 format(file, " rlen %u", brw_message_desc_rlen(devinfo, imm_desc));
2096 }
2097 pad(file, 64);
2098 if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {
2099 string(file, "{");
2100 space = 1;
2101 err |= control(file, "access mode", access_mode,
2102 brw_inst_access_mode(devinfo, inst), &space);
2103 if (devinfo->gen >= 6) {
2104 err |= control(file, "write enable control", wectrl,
2105 brw_inst_mask_control(devinfo, inst), &space);
2106 } else {
2107 err |= control(file, "mask control", mask_ctrl,
2108 brw_inst_mask_control(devinfo, inst), &space);
2109 }
2110
2111 if (devinfo->gen < 12) {
2112 err |= control(file, "dependency control", dep_ctrl,
2113 ((brw_inst_no_dd_check(devinfo, inst) << 1) |
2114 brw_inst_no_dd_clear(devinfo, inst)), &space);
2115 }
2116
2117 if (devinfo->gen >= 6)
2118 err |= qtr_ctrl(file, devinfo, inst);
2119 else {
2120 if (brw_inst_qtr_control(devinfo, inst) == BRW_COMPRESSION_COMPRESSED &&
2121 desc && desc->ndst > 0 &&
2122 brw_inst_dst_reg_file(devinfo, inst) == BRW_MESSAGE_REGISTER_FILE &&
2123 brw_inst_dst_da_reg_nr(devinfo, inst) & BRW_MRF_COMPR4) {
2124 format(file, " compr4");
2125 } else {
2126 err |= control(file, "compression control", compr_ctrl,
2127 brw_inst_qtr_control(devinfo, inst), &space);
2128 }
2129 }
2130
2131 if (devinfo->gen >= 12)
2132 err |= swsb(file, devinfo, inst);
2133
2134 err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
2135 err |= control(file, "thread control", thread_ctrl,
2136 (devinfo->gen >= 12 ? brw_inst_atomic_control(devinfo, inst) :
2137 brw_inst_thread_control(devinfo, inst)),
2138 &space);
2139 if (has_branch_ctrl(devinfo, opcode)) {
2140 err |= control(file, "branch ctrl", branch_ctrl,
2141 brw_inst_branch_control(devinfo, inst), &space);
2142 } else if (devinfo->gen >= 6) {
2143 err |= control(file, "acc write control", accwr,
2144 brw_inst_acc_wr_control(devinfo, inst), &space);
2145 }
2146 if (is_send(opcode))
2147 err |= control(file, "end of thread", end_of_thread,
2148 brw_inst_eot(devinfo, inst), &space);
2149 if (space)
2150 string(file, " ");
2151 string(file, "}");
2152 }
2153 string(file, ";");
2154 newline(file);
2155 return err;
2156 }