src/intel/compiler/brw_eu.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_EU_H
  34 #define BRW_EU_H
  35
  36 #include <stdbool.h>
  37 #include <stdio.h>
  38 #include "brw_inst.h"
  39 #include "brw_eu_defines.h"
  40 #include "brw_reg.h"
  41 #include "brw_disasm_info.h"
  42
  43 #ifdef __cplusplus
  44 extern "C" {
  45 #endif
  46
  47 #define BRW_EU_MAX_INSN_STACK 5
  48
  49 struct brw_insn_state {
  50    /* One of BRW_EXECUTE_* */
  51    unsigned exec_size:3;
  52
  53    /* Group in units of channels */
  54    unsigned group:5;
  55
  56    /* Compression control on gen4-5 */
  57    bool compressed:1;
  58
  59    /* One of BRW_MASK_* */
  60    unsigned mask_control:1;
  61
  62    bool saturate:1;
  63
  64    /* One of BRW_ALIGN_* */
  65    unsigned access_mode:1;
  66
  67    /* One of BRW_PREDICATE_* */
  68    enum brw_predicate predicate:4;
  69
  70    bool pred_inv:1;
  71
  72    /* Flag subreg.  Bottom bit is subreg, top bit is reg */
  73    unsigned flag_subreg:2;
  74
  75    bool acc_wr_control:1;
  76 };
  77
  78
  79 /* A helper for accessing the last instruction emitted.  This makes it easy
  80  * to set various bits on an instruction without having to create temporary
  81  * variable and assign the emitted instruction to those.
  82  */
  83 #define brw_last_inst (&p->store[p->nr_insn - 1])
  84
  85 struct brw_codegen {
  86    brw_inst *store;
  87    int store_size;
  88    unsigned nr_insn;
  89    unsigned int next_insn_offset;
  90
  91    void *mem_ctx;
  92
  93    /* Allow clients to push/pop instruction state:
  94     */
  95    struct brw_insn_state stack[BRW_EU_MAX_INSN_STACK];
  96    struct brw_insn_state *current;
  97
  98    /** Whether or not the user wants automatic exec sizes
  99     *
 100     * If true, codegen will try to automatically infer the exec size of an
 101     * instruction from the width of the destination register.  If false, it
 102     * will take whatever is set by brw_set_default_exec_size verbatim.
 103     *
 104     * This is set to true by default in brw_init_codegen.
 105     */
 106    bool automatic_exec_sizes;
 107
 108    bool single_program_flow;
 109    const struct gen_device_info *devinfo;
 110
 111    /* Control flow stacks:
 112     * - if_stack contains IF and ELSE instructions which must be patched
 113     *   (and popped) once the matching ENDIF instruction is encountered.
 114     *
 115     *   Just store the instruction pointer(an index).
 116     */
 117    int *if_stack;
 118    int if_stack_depth;
 119    int if_stack_array_size;
 120
 121    /**
 122     * loop_stack contains the instruction pointers of the starts of loops which
 123     * must be patched (and popped) once the matching WHILE instruction is
 124     * encountered.
 125     */
 126    int *loop_stack;
 127    /**
 128     * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
 129     * blocks they were popping out of, to fix up the mask stack.  This tracks
 130     * the IF/ENDIF nesting in each current nested loop level.
 131     */
 132    int *if_depth_in_loop;
 133    int loop_stack_depth;
 134    int loop_stack_array_size;
 135 };
 136
 137 void brw_pop_insn_state( struct brw_codegen *p );
 138 void brw_push_insn_state( struct brw_codegen *p );
 139 unsigned brw_get_default_exec_size(struct brw_codegen *p);
 140 unsigned brw_get_default_group(struct brw_codegen *p);
 141 unsigned brw_get_default_access_mode(struct brw_codegen *p);
 142 void brw_set_default_exec_size(struct brw_codegen *p, unsigned value);
 143 void brw_set_default_mask_control( struct brw_codegen *p, unsigned value );
 144 void brw_set_default_saturate( struct brw_codegen *p, bool enable );
 145 void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode );
 146 void brw_inst_set_compression(const struct gen_device_info *devinfo,
 147                               brw_inst *inst, bool on);
 148 void brw_set_default_compression(struct brw_codegen *p, bool on);
 149 void brw_inst_set_group(const struct gen_device_info *devinfo,
 150                         brw_inst *inst, unsigned group);
 151 void brw_set_default_group(struct brw_codegen *p, unsigned group);
 152 void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c);
 153 void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc );
 154 void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse);
 155 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
 156 void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value);
 157
 158 void brw_init_codegen(const struct gen_device_info *, struct brw_codegen *p,
 159                       void *mem_ctx);
 160 int brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
 161                          const struct brw_inst *inst, bool is_compacted);
 162 void brw_disassemble(const struct gen_device_info *devinfo,
 163                      const void *assembly, int start, int end, FILE *out);
 164 const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz );
 165
 166 brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
 167 void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest);
 168 void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 169
 170 void gen6_resolve_implied_move(struct brw_codegen *p,
 171                                struct brw_reg *src,
 172                                unsigned msg_reg_nr);
 173
 174 /* Helpers for regular instructions:
 175  */
 176 #define ALU1(OP)                                \
 177 brw_inst *brw_##OP(struct brw_codegen *p,       \
 178               struct brw_reg dest,              \
 179               struct brw_reg src0);
 180
 181 #define ALU2(OP)                                \
 182 brw_inst *brw_##OP(struct brw_codegen *p,       \
 183               struct brw_reg dest,              \
 184               struct brw_reg src0,              \
 185               struct brw_reg src1);
 186
 187 #define ALU3(OP)                                \
 188 brw_inst *brw_##OP(struct brw_codegen *p,       \
 189               struct brw_reg dest,              \
 190               struct brw_reg src0,              \
 191               struct brw_reg src1,              \
 192               struct brw_reg src2);
 193
 194 #define ROUND(OP) \
 195 void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0);
 196
 197 ALU1(MOV)
 198 ALU2(SEL)
 199 ALU1(NOT)
 200 ALU2(AND)
 201 ALU2(OR)
 202 ALU2(XOR)
 203 ALU2(SHR)
 204 ALU2(SHL)
 205 ALU1(DIM)
 206 ALU2(ASR)
 207 ALU3(CSEL)
 208 ALU1(F32TO16)
 209 ALU1(F16TO32)
 210 ALU2(ADD)
 211 ALU2(AVG)
 212 ALU2(MUL)
 213 ALU1(FRC)
 214 ALU1(RNDD)
 215 ALU2(MAC)
 216 ALU2(MACH)
 217 ALU1(LZD)
 218 ALU2(DP4)
 219 ALU2(DPH)
 220 ALU2(DP3)
 221 ALU2(DP2)
 222 ALU2(LINE)
 223 ALU2(PLN)
 224 ALU3(MAD)
 225 ALU3(LRP)
 226 ALU1(BFREV)
 227 ALU3(BFE)
 228 ALU2(BFI1)
 229 ALU3(BFI2)
 230 ALU1(FBH)
 231 ALU1(FBL)
 232 ALU1(CBIT)
 233 ALU2(ADDC)
 234 ALU2(SUBB)
 235 ALU2(MAC)
 236
 237 ROUND(RNDZ)
 238 ROUND(RNDE)
 239
 240 #undef ALU1
 241 #undef ALU2
 242 #undef ALU3
 243 #undef ROUND
 244
 245
 246 /* Helpers for SEND instruction:
 247  */
 248 void brw_set_dp_read_message(struct brw_codegen *p,
 249                              brw_inst *insn,
 250                              unsigned binding_table_index,
 251                              unsigned msg_control,
 252                              unsigned msg_type,
 253                              unsigned target_cache,
 254                              unsigned msg_length,
 255                              bool header_present,
 256                              unsigned response_length);
 257
 258 void brw_set_dp_write_message(struct brw_codegen *p,
 259                               brw_inst *insn,
 260                               unsigned binding_table_index,
 261                               unsigned msg_control,
 262                               unsigned msg_type,
 263                               unsigned target_cache,
 264                               unsigned msg_length,
 265                               bool header_present,
 266                               unsigned last_render_target,
 267                               unsigned response_length,
 268                               unsigned end_of_thread,
 269                               unsigned send_commit_msg);
 270
 271 /**
 272  * Construct a message descriptor immediate with the specified common
 273  * descriptor controls.
 274  */
 275 static inline uint32_t
 276 brw_message_desc(const struct gen_device_info *devinfo,
 277                  unsigned msg_length,
 278                  unsigned response_length,
 279                  bool header_present)
 280 {
 281    if (devinfo->gen >= 5) {
 282       return (SET_BITS(msg_length, 28, 25) |
 283               SET_BITS(response_length, 24, 20) |
 284               SET_BITS(header_present, 19, 19));
 285    } else {
 286       return (SET_BITS(msg_length, 23, 20) |
 287               SET_BITS(response_length, 19, 16));
 288    }
 289 }
 290
 291 /**
 292  * Construct a message descriptor immediate with the specified sampler
 293  * function controls.
 294  */
 295 static inline uint32_t
 296 brw_sampler_desc(const struct gen_device_info *devinfo,
 297                  unsigned binding_table_index,
 298                  unsigned sampler,
 299                  unsigned msg_type,
 300                  unsigned simd_mode,
 301                  unsigned return_format)
 302 {
 303    const unsigned desc = (SET_BITS(binding_table_index, 7, 0) |
 304                           SET_BITS(sampler, 11, 8));
 305    if (devinfo->gen >= 7)
 306       return (desc | SET_BITS(msg_type, 16, 12) |
 307               SET_BITS(simd_mode, 18, 17));
 308    else if (devinfo->gen >= 5)
 309       return (desc | SET_BITS(msg_type, 15, 12) |
 310               SET_BITS(simd_mode, 17, 16));
 311    else if (devinfo->is_g4x)
 312       return desc | SET_BITS(msg_type, 15, 12);
 313    else
 314       return (desc | SET_BITS(return_format, 13, 12) |
 315               SET_BITS(msg_type, 15, 14));
 316 }
 317
 318 void brw_urb_WRITE(struct brw_codegen *p,
 319                    struct brw_reg dest,
 320                    unsigned msg_reg_nr,
 321                    struct brw_reg src0,
 322                    enum brw_urb_write_flags flags,
 323                    unsigned msg_length,
 324                    unsigned response_length,
 325                    unsigned offset,
 326                    unsigned swizzle);
 327
 328 /**
 329  * Send message to shared unit \p sfid with a possibly indirect descriptor \p
 330  * desc.  If \p desc is not an immediate it will be transparently loaded to an
 331  * address register using an OR instruction.  The returned instruction can be
 332  * passed as argument to the usual brw_set_*_message() functions in order to
 333  * specify any additional descriptor bits -- If \p desc is an immediate this
 334  * will be the SEND instruction itself, otherwise it will be the OR
 335  * instruction.
 336  */
 337 struct brw_inst *
 338 brw_send_indirect_message(struct brw_codegen *p,
 339                           unsigned sfid,
 340                           struct brw_reg dst,
 341                           struct brw_reg payload,
 342                           struct brw_reg desc,
 343                           unsigned desc_imm);
 344
 345 void brw_ff_sync(struct brw_codegen *p,
 346                    struct brw_reg dest,
 347                    unsigned msg_reg_nr,
 348                    struct brw_reg src0,
 349                    bool allocate,
 350                    unsigned response_length,
 351                    bool eot);
 352
 353 void brw_svb_write(struct brw_codegen *p,
 354                    struct brw_reg dest,
 355                    unsigned msg_reg_nr,
 356                    struct brw_reg src0,
 357                    unsigned binding_table_index,
 358                    bool   send_commit_msg);
 359
 360 brw_inst *brw_fb_WRITE(struct brw_codegen *p,
 361                        struct brw_reg payload,
 362                        struct brw_reg implied_header,
 363                        unsigned msg_control,
 364                        unsigned binding_table_index,
 365                        unsigned msg_length,
 366                        unsigned response_length,
 367                        bool eot,
 368                        bool last_render_target,
 369                        bool header_present);
 370
 371 brw_inst *gen9_fb_READ(struct brw_codegen *p,
 372                        struct brw_reg dst,
 373                        struct brw_reg payload,
 374                        unsigned binding_table_index,
 375                        unsigned msg_length,
 376                        unsigned response_length,
 377                        bool per_sample);
 378
 379 void brw_SAMPLE(struct brw_codegen *p,
 380                 struct brw_reg dest,
 381                 unsigned msg_reg_nr,
 382                 struct brw_reg src0,
 383                 unsigned binding_table_index,
 384                 unsigned sampler,
 385                 unsigned msg_type,
 386                 unsigned response_length,
 387                 unsigned msg_length,
 388                 unsigned header_present,
 389                 unsigned simd_mode,
 390                 unsigned return_format);
 391
 392 void brw_adjust_sampler_state_pointer(struct brw_codegen *p,
 393                                       struct brw_reg header,
 394                                       struct brw_reg sampler_index);
 395
 396 void gen4_math(struct brw_codegen *p,
 397                struct brw_reg dest,
 398                unsigned function,
 399                unsigned msg_reg_nr,
 400                struct brw_reg src,
 401                unsigned precision );
 402
 403 void gen6_math(struct brw_codegen *p,
 404                struct brw_reg dest,
 405                unsigned function,
 406                struct brw_reg src0,
 407                struct brw_reg src1);
 408
 409 void brw_oword_block_read(struct brw_codegen *p,
 410                           struct brw_reg dest,
 411                           struct brw_reg mrf,
 412                           uint32_t offset,
 413                           uint32_t bind_table_index);
 414
 415 unsigned brw_scratch_surface_idx(const struct brw_codegen *p);
 416
 417 void brw_oword_block_read_scratch(struct brw_codegen *p,
 418                                   struct brw_reg dest,
 419                                   struct brw_reg mrf,
 420                                   int num_regs,
 421                                   unsigned offset);
 422
 423 void brw_oword_block_write_scratch(struct brw_codegen *p,
 424                                    struct brw_reg mrf,
 425                                    int num_regs,
 426                                    unsigned offset);
 427
 428 void gen7_block_read_scratch(struct brw_codegen *p,
 429                              struct brw_reg dest,
 430                              int num_regs,
 431                              unsigned offset);
 432
 433 void brw_shader_time_add(struct brw_codegen *p,
 434                          struct brw_reg payload,
 435                          uint32_t surf_index);
 436
 437 /**
 438  * Return the generation-specific jump distance scaling factor.
 439  *
 440  * Given the number of instructions to jump, we need to scale by
 441  * some number to obtain the actual jump distance to program in an
 442  * instruction.
 443  */
 444 static inline unsigned
 445 brw_jump_scale(const struct gen_device_info *devinfo)
 446 {
 447    /* Broadwell measures jump targets in bytes. */
 448    if (devinfo->gen >= 8)
 449       return 16;
 450
 451    /* Ironlake and later measure jump targets in 64-bit data chunks (in order
 452     * (to support compaction), so each 128-bit instruction requires 2 chunks.
 453     */
 454    if (devinfo->gen >= 5)
 455       return 2;
 456
 457    /* Gen4 simply uses the number of 128-bit instructions. */
 458    return 1;
 459 }
 460
 461 void brw_barrier(struct brw_codegen *p, struct brw_reg src);
 462
 463 /* If/else/endif.  Works by manipulating the execution flags on each
 464  * channel.
 465  */
 466 brw_inst *brw_IF(struct brw_codegen *p, unsigned execute_size);
 467 brw_inst *gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional,
 468                   struct brw_reg src0, struct brw_reg src1);
 469
 470 void brw_ELSE(struct brw_codegen *p);
 471 void brw_ENDIF(struct brw_codegen *p);
 472
 473 /* DO/WHILE loops:
 474  */
 475 brw_inst *brw_DO(struct brw_codegen *p, unsigned execute_size);
 476
 477 brw_inst *brw_WHILE(struct brw_codegen *p);
 478
 479 brw_inst *brw_BREAK(struct brw_codegen *p);
 480 brw_inst *brw_CONT(struct brw_codegen *p);
 481 brw_inst *gen6_HALT(struct brw_codegen *p);
 482
 483 /* Forward jumps:
 484  */
 485 void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx);
 486
 487 brw_inst *brw_JMPI(struct brw_codegen *p, struct brw_reg index,
 488                    unsigned predicate_control);
 489
 490 void brw_NOP(struct brw_codegen *p);
 491
 492 void brw_WAIT(struct brw_codegen *p);
 493
 494 /* Special case: there is never a destination, execution size will be
 495  * taken from src0:
 496  */
 497 void brw_CMP(struct brw_codegen *p,
 498              struct brw_reg dest,
 499              unsigned conditional,
 500              struct brw_reg src0,
 501              struct brw_reg src1);
 502
 503 void
 504 brw_untyped_atomic(struct brw_codegen *p,
 505                    struct brw_reg dst,
 506                    struct brw_reg payload,
 507                    struct brw_reg surface,
 508                    unsigned atomic_op,
 509                    unsigned msg_length,
 510                    bool response_expected,
 511                    bool header_present);
 512
 513 void
 514 brw_untyped_surface_read(struct brw_codegen *p,
 515                          struct brw_reg dst,
 516                          struct brw_reg payload,
 517                          struct brw_reg surface,
 518                          unsigned msg_length,
 519                          unsigned num_channels);
 520
 521 void
 522 brw_untyped_surface_write(struct brw_codegen *p,
 523                           struct brw_reg payload,
 524                           struct brw_reg surface,
 525                           unsigned msg_length,
 526                           unsigned num_channels,
 527                           bool header_present);
 528
 529 void
 530 brw_typed_atomic(struct brw_codegen *p,
 531                  struct brw_reg dst,
 532                  struct brw_reg payload,
 533                  struct brw_reg surface,
 534                  unsigned atomic_op,
 535                  unsigned msg_length,
 536                  bool response_expected,
 537                  bool header_present);
 538
 539 void
 540 brw_typed_surface_read(struct brw_codegen *p,
 541                        struct brw_reg dst,
 542                        struct brw_reg payload,
 543                        struct brw_reg surface,
 544                        unsigned msg_length,
 545                        unsigned num_channels,
 546                        bool header_present);
 547
 548 void
 549 brw_typed_surface_write(struct brw_codegen *p,
 550                         struct brw_reg payload,
 551                         struct brw_reg surface,
 552                         unsigned msg_length,
 553                         unsigned num_channels,
 554                         bool header_present);
 555
 556 void
 557 brw_byte_scattered_read(struct brw_codegen *p,
 558                         struct brw_reg dst,
 559                         struct brw_reg payload,
 560                         struct brw_reg surface,
 561                         unsigned msg_length,
 562                         unsigned bit_size);
 563
 564 void
 565 brw_byte_scattered_write(struct brw_codegen *p,
 566                          struct brw_reg payload,
 567                          struct brw_reg surface,
 568                          unsigned msg_length,
 569                          unsigned bit_size,
 570                          bool header_present);
 571
 572 void
 573 brw_memory_fence(struct brw_codegen *p,
 574                  struct brw_reg dst,
 575                  enum opcode send_op);
 576
 577 void
 578 brw_pixel_interpolator_query(struct brw_codegen *p,
 579                              struct brw_reg dest,
 580                              struct brw_reg mrf,
 581                              bool noperspective,
 582                              unsigned mode,
 583                              struct brw_reg data,
 584                              unsigned msg_length,
 585                              unsigned response_length);
 586
 587 void
 588 brw_find_live_channel(struct brw_codegen *p,
 589                       struct brw_reg dst,
 590                       struct brw_reg mask);
 591
 592 void
 593 brw_broadcast(struct brw_codegen *p,
 594               struct brw_reg dst,
 595               struct brw_reg src,
 596               struct brw_reg idx);
 597
 598 void
 599 brw_rounding_mode(struct brw_codegen *p,
 600                   enum brw_rnd_mode mode);
 601
 602 /***********************************************************************
 603  * brw_eu_util.c:
 604  */
 605
 606 void brw_copy_indirect_to_indirect(struct brw_codegen *p,
 607                                    struct brw_indirect dst_ptr,
 608                                    struct brw_indirect src_ptr,
 609                                    unsigned count);
 610
 611 void brw_copy_from_indirect(struct brw_codegen *p,
 612                             struct brw_reg dst,
 613                             struct brw_indirect ptr,
 614                             unsigned count);
 615
 616 void brw_copy4(struct brw_codegen *p,
 617                struct brw_reg dst,
 618                struct brw_reg src,
 619                unsigned count);
 620
 621 void brw_copy8(struct brw_codegen *p,
 622                struct brw_reg dst,
 623                struct brw_reg src,
 624                unsigned count);
 625
 626 void brw_math_invert( struct brw_codegen *p,
 627                       struct brw_reg dst,
 628                       struct brw_reg src);
 629
 630 void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 631
 632 void brw_set_desc_ex(struct brw_codegen *p, brw_inst *insn,
 633                      unsigned desc, unsigned ex_desc);
 634
 635 static inline void
 636 brw_set_desc(struct brw_codegen *p, brw_inst *insn, unsigned desc)
 637 {
 638    brw_set_desc_ex(p, insn, desc, 0);
 639 }
 640
 641 void brw_set_uip_jip(struct brw_codegen *p, int start_offset);
 642
 643 enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
 644 enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
 645
 646 /* brw_eu_compact.c */
 647 void brw_init_compaction_tables(const struct gen_device_info *devinfo);
 648 void brw_compact_instructions(struct brw_codegen *p, int start_offset,
 649                               struct disasm_info *disasm);
 650 void brw_uncompact_instruction(const struct gen_device_info *devinfo,
 651                                brw_inst *dst, brw_compact_inst *src);
 652 bool brw_try_compact_instruction(const struct gen_device_info *devinfo,
 653                                  brw_compact_inst *dst, const brw_inst *src);
 654
 655 void brw_debug_compact_uncompact(const struct gen_device_info *devinfo,
 656                                  brw_inst *orig, brw_inst *uncompacted);
 657
 658 /* brw_eu_validate.c */
 659 bool brw_validate_instructions(const struct gen_device_info *devinfo,
 660                                const void *assembly, int start_offset, int end_offset,
 661                                struct disasm_info *disasm);
 662
 663 static inline int
 664 next_offset(const struct gen_device_info *devinfo, void *store, int offset)
 665 {
 666    brw_inst *insn = (brw_inst *)((char *)store + offset);
 667
 668    if (brw_inst_cmpt_control(devinfo, insn))
 669       return offset + 8;
 670    else
 671       return offset + 16;
 672 }
 673
 674 struct opcode_desc {
 675    /* The union is an implementation detail used by brw_opcode_desc() to handle
 676     * opcodes that have been reused for different instructions across hardware
 677     * generations.
 678     *
 679     * The gens field acts as a tag. If it is non-zero, name points to a string
 680     * containing the instruction mnemonic. If it is zero, the table field is
 681     * valid and either points to a secondary opcode_desc table with 'size'
 682     * elements or is NULL and no such instruction exists for the opcode.
 683     */
 684    union {
 685       struct {
 686          char    *name;
 687          int      nsrc;
 688       };
 689       struct {
 690          const struct opcode_desc *table;
 691          unsigned size;
 692       };
 693    };
 694    int      ndst;
 695    int      gens;
 696 };
 697
 698 const struct opcode_desc *
 699 brw_opcode_desc(const struct gen_device_info *devinfo, enum opcode opcode);
 700
 701 static inline bool
 702 is_3src(const struct gen_device_info *devinfo, enum opcode opcode)
 703 {
 704    const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
 705    return desc && desc->nsrc == 3;
 706 }
 707
 708 /** Maximum SEND message length */
 709 #define BRW_MAX_MSG_LENGTH 15
 710
 711 /** First MRF register used by pull loads */
 712 #define FIRST_SPILL_MRF(gen) ((gen) == 6 ? 21 : 13)
 713
 714 /** First MRF register used by spills */
 715 #define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13)
 716
 717 #ifdef __cplusplus
 718 }
 719 #endif
 720
 721 #endif