src/intel/compiler/brw_eu.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_EU_H
  34 #define BRW_EU_H
  35
  36 #include <stdbool.h>
  37 #include <stdio.h>
  38 #include "brw_inst.h"
  39 #include "brw_eu_defines.h"
  40 #include "brw_reg.h"
  41 #include "brw_disasm_info.h"
  42
  43 #ifdef __cplusplus
  44 extern "C" {
  45 #endif
  46
  47 #define BRW_EU_MAX_INSN_STACK 5
  48
  49 struct brw_insn_state {
  50    /* One of BRW_EXECUTE_* */
  51    unsigned exec_size:3;
  52
  53    /* Group in units of channels */
  54    unsigned group:5;
  55
  56    /* Compression control on gen4-5 */
  57    bool compressed:1;
  58
  59    /* One of BRW_MASK_* */
  60    unsigned mask_control:1;
  61
  62    bool saturate:1;
  63
  64    /* One of BRW_ALIGN_* */
  65    unsigned access_mode:1;
  66
  67    /* One of BRW_PREDICATE_* */
  68    enum brw_predicate predicate:4;
  69
  70    bool pred_inv:1;
  71
  72    /* Flag subreg.  Bottom bit is subreg, top bit is reg */
  73    unsigned flag_subreg:2;
  74
  75    bool acc_wr_control:1;
  76 };
  77
  78
  79 /* A helper for accessing the last instruction emitted.  This makes it easy
  80  * to set various bits on an instruction without having to create temporary
  81  * variable and assign the emitted instruction to those.
  82  */
  83 #define brw_last_inst (&p->store[p->nr_insn - 1])
  84
  85 struct brw_codegen {
  86    brw_inst *store;
  87    int store_size;
  88    unsigned nr_insn;
  89    unsigned int next_insn_offset;
  90
  91    void *mem_ctx;
  92
  93    /* Allow clients to push/pop instruction state:
  94     */
  95    struct brw_insn_state stack[BRW_EU_MAX_INSN_STACK];
  96    struct brw_insn_state *current;
  97
  98    /** Whether or not the user wants automatic exec sizes
  99     *
 100     * If true, codegen will try to automatically infer the exec size of an
 101     * instruction from the width of the destination register.  If false, it
 102     * will take whatever is set by brw_set_default_exec_size verbatim.
 103     *
 104     * This is set to true by default in brw_init_codegen.
 105     */
 106    bool automatic_exec_sizes;
 107
 108    bool single_program_flow;
 109    const struct gen_device_info *devinfo;
 110
 111    /* Control flow stacks:
 112     * - if_stack contains IF and ELSE instructions which must be patched
 113     *   (and popped) once the matching ENDIF instruction is encountered.
 114     *
 115     *   Just store the instruction pointer(an index).
 116     */
 117    int *if_stack;
 118    int if_stack_depth;
 119    int if_stack_array_size;
 120
 121    /**
 122     * loop_stack contains the instruction pointers of the starts of loops which
 123     * must be patched (and popped) once the matching WHILE instruction is
 124     * encountered.
 125     */
 126    int *loop_stack;
 127    /**
 128     * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
 129     * blocks they were popping out of, to fix up the mask stack.  This tracks
 130     * the IF/ENDIF nesting in each current nested loop level.
 131     */
 132    int *if_depth_in_loop;
 133    int loop_stack_depth;
 134    int loop_stack_array_size;
 135 };
 136
 137 void brw_pop_insn_state( struct brw_codegen *p );
 138 void brw_push_insn_state( struct brw_codegen *p );
 139 unsigned brw_get_default_exec_size(struct brw_codegen *p);
 140 unsigned brw_get_default_group(struct brw_codegen *p);
 141 unsigned brw_get_default_access_mode(struct brw_codegen *p);
 142 void brw_set_default_exec_size(struct brw_codegen *p, unsigned value);
 143 void brw_set_default_mask_control( struct brw_codegen *p, unsigned value );
 144 void brw_set_default_saturate( struct brw_codegen *p, bool enable );
 145 void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode );
 146 void brw_inst_set_compression(const struct gen_device_info *devinfo,
 147                               brw_inst *inst, bool on);
 148 void brw_set_default_compression(struct brw_codegen *p, bool on);
 149 void brw_inst_set_group(const struct gen_device_info *devinfo,
 150                         brw_inst *inst, unsigned group);
 151 void brw_set_default_group(struct brw_codegen *p, unsigned group);
 152 void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c);
 153 void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc );
 154 void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse);
 155 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
 156 void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value);
 157
 158 void brw_init_codegen(const struct gen_device_info *, struct brw_codegen *p,
 159                       void *mem_ctx);
 160 int brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
 161                          const struct brw_inst *inst, bool is_compacted);
 162 void brw_disassemble(const struct gen_device_info *devinfo,
 163                      const void *assembly, int start, int end, FILE *out);
 164 const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz );
 165
 166 brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
 167 void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest);
 168 void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 169
 170 void gen6_resolve_implied_move(struct brw_codegen *p,
 171                                struct brw_reg *src,
 172                                unsigned msg_reg_nr);
 173
 174 /* Helpers for regular instructions:
 175  */
 176 #define ALU1(OP)                                \
 177 brw_inst *brw_##OP(struct brw_codegen *p,       \
 178               struct brw_reg dest,              \
 179               struct brw_reg src0);
 180
 181 #define ALU2(OP)                                \
 182 brw_inst *brw_##OP(struct brw_codegen *p,       \
 183               struct brw_reg dest,              \
 184               struct brw_reg src0,              \
 185               struct brw_reg src1);
 186
 187 #define ALU3(OP)                                \
 188 brw_inst *brw_##OP(struct brw_codegen *p,       \
 189               struct brw_reg dest,              \
 190               struct brw_reg src0,              \
 191               struct brw_reg src1,              \
 192               struct brw_reg src2);
 193
 194 #define ROUND(OP) \
 195 void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0);
 196
 197 ALU1(MOV)
 198 ALU2(SEL)
 199 ALU1(NOT)
 200 ALU2(AND)
 201 ALU2(OR)
 202 ALU2(XOR)
 203 ALU2(SHR)
 204 ALU2(SHL)
 205 ALU1(DIM)
 206 ALU2(ASR)
 207 ALU3(CSEL)
 208 ALU1(F32TO16)
 209 ALU1(F16TO32)
 210 ALU2(ADD)
 211 ALU2(AVG)
 212 ALU2(MUL)
 213 ALU1(FRC)
 214 ALU1(RNDD)
 215 ALU2(MAC)
 216 ALU2(MACH)
 217 ALU1(LZD)
 218 ALU2(DP4)
 219 ALU2(DPH)
 220 ALU2(DP3)
 221 ALU2(DP2)
 222 ALU2(LINE)
 223 ALU2(PLN)
 224 ALU3(MAD)
 225 ALU3(LRP)
 226 ALU1(BFREV)
 227 ALU3(BFE)
 228 ALU2(BFI1)
 229 ALU3(BFI2)
 230 ALU1(FBH)
 231 ALU1(FBL)
 232 ALU1(CBIT)
 233 ALU2(ADDC)
 234 ALU2(SUBB)
 235 ALU2(MAC)
 236
 237 ROUND(RNDZ)
 238 ROUND(RNDE)
 239
 240 #undef ALU1
 241 #undef ALU2
 242 #undef ALU3
 243 #undef ROUND
 244
 245
 246 /* Helpers for SEND instruction:
 247  */
 248
 249 /**
 250  * Construct a message descriptor immediate with the specified common
 251  * descriptor controls.
 252  */
 253 static inline uint32_t
 254 brw_message_desc(const struct gen_device_info *devinfo,
 255                  unsigned msg_length,
 256                  unsigned response_length,
 257                  bool header_present)
 258 {
 259    if (devinfo->gen >= 5) {
 260       return (SET_BITS(msg_length, 28, 25) |
 261               SET_BITS(response_length, 24, 20) |
 262               SET_BITS(header_present, 19, 19));
 263    } else {
 264       return (SET_BITS(msg_length, 23, 20) |
 265               SET_BITS(response_length, 19, 16));
 266    }
 267 }
 268
 269 /**
 270  * Construct a message descriptor immediate with the specified sampler
 271  * function controls.
 272  */
 273 static inline uint32_t
 274 brw_sampler_desc(const struct gen_device_info *devinfo,
 275                  unsigned binding_table_index,
 276                  unsigned sampler,
 277                  unsigned msg_type,
 278                  unsigned simd_mode,
 279                  unsigned return_format)
 280 {
 281    const unsigned desc = (SET_BITS(binding_table_index, 7, 0) |
 282                           SET_BITS(sampler, 11, 8));
 283    if (devinfo->gen >= 7)
 284       return (desc | SET_BITS(msg_type, 16, 12) |
 285               SET_BITS(simd_mode, 18, 17));
 286    else if (devinfo->gen >= 5)
 287       return (desc | SET_BITS(msg_type, 15, 12) |
 288               SET_BITS(simd_mode, 17, 16));
 289    else if (devinfo->is_g4x)
 290       return desc | SET_BITS(msg_type, 15, 12);
 291    else
 292       return (desc | SET_BITS(return_format, 13, 12) |
 293               SET_BITS(msg_type, 15, 14));
 294 }
 295
 296 /**
 297  * Construct a message descriptor immediate with the specified dataport read
 298  * function controls.
 299  */
 300 static inline uint32_t
 301 brw_dp_read_desc(const struct gen_device_info *devinfo,
 302                  unsigned binding_table_index,
 303                  unsigned msg_control,
 304                  unsigned msg_type,
 305                  unsigned target_cache)
 306 {
 307    const unsigned desc = SET_BITS(binding_table_index, 7, 0);
 308    if (devinfo->gen >= 7)
 309       return (desc | SET_BITS(msg_control, 13, 8) |
 310               SET_BITS(msg_type, 17, 14));
 311    else if (devinfo->gen >= 6)
 312       return (desc | SET_BITS(msg_control, 12, 8) |
 313               SET_BITS(msg_type, 16, 13));
 314    else if (devinfo->gen >= 5 || devinfo->is_g4x)
 315       return (desc | SET_BITS(msg_control, 10, 8) |
 316               SET_BITS(msg_type, 13, 11) |
 317               SET_BITS(target_cache, 15, 14));
 318    else
 319       return (desc | SET_BITS(msg_control, 11, 8) |
 320               SET_BITS(msg_type, 13, 12) |
 321               SET_BITS(target_cache, 15, 14));
 322 }
 323
 324 /**
 325  * Construct a message descriptor immediate with the specified dataport write
 326  * function controls.
 327  */
 328 static inline uint32_t
 329 brw_dp_write_desc(const struct gen_device_info *devinfo,
 330                   unsigned binding_table_index,
 331                   unsigned msg_control,
 332                   unsigned msg_type,
 333                   unsigned last_render_target,
 334                   unsigned send_commit_msg)
 335 {
 336    const unsigned desc = SET_BITS(binding_table_index, 7, 0);
 337    if (devinfo->gen >= 7)
 338       return (desc | SET_BITS(msg_control, 13, 8) |
 339               SET_BITS(last_render_target, 12, 12) |
 340               SET_BITS(msg_type, 17, 14));
 341    else if (devinfo->gen >= 6)
 342       return (desc | SET_BITS(msg_control, 12, 8) |
 343               SET_BITS(last_render_target, 12, 12) |
 344               SET_BITS(msg_type, 16, 13) |
 345               SET_BITS(send_commit_msg, 17, 17));
 346    else
 347       return (desc | SET_BITS(msg_control, 11, 8) |
 348               SET_BITS(last_render_target, 11, 11) |
 349               SET_BITS(msg_type, 14, 12) |
 350               SET_BITS(send_commit_msg, 15, 15));
 351 }
 352
 353 /**
 354  * Construct a message descriptor immediate with the specified dataport
 355  * surface function controls.
 356  */
 357 static inline uint32_t
 358 brw_dp_surface_desc(const struct gen_device_info *devinfo,
 359                     unsigned msg_type,
 360                     unsigned msg_control)
 361 {
 362    assert(devinfo->gen >= 7);
 363    return (SET_BITS(msg_control, 13, 8) |
 364            SET_BITS(msg_type, 17, 14));
 365 }
 366
 367 /**
 368  * Construct a message descriptor immediate with the specified pixel
 369  * interpolator function controls.
 370  */
 371 static inline uint32_t
 372 brw_pixel_interp_desc(const struct gen_device_info *devinfo,
 373                       unsigned msg_type,
 374                       bool noperspective,
 375                       unsigned simd_mode,
 376                       unsigned slot_group)
 377 {
 378    return (SET_BITS(slot_group, 11, 11) |
 379            SET_BITS(msg_type, 13, 12) |
 380            SET_BITS(!!noperspective, 14, 14) |
 381            SET_BITS(simd_mode, 16, 16));
 382 }
 383
 384 void brw_urb_WRITE(struct brw_codegen *p,
 385                    struct brw_reg dest,
 386                    unsigned msg_reg_nr,
 387                    struct brw_reg src0,
 388                    enum brw_urb_write_flags flags,
 389                    unsigned msg_length,
 390                    unsigned response_length,
 391                    unsigned offset,
 392                    unsigned swizzle);
 393
 394 /**
 395  * Send message to shared unit \p sfid with a possibly indirect descriptor \p
 396  * desc.  If \p desc is not an immediate it will be transparently loaded to an
 397  * address register using an OR instruction.
 398  */
 399 void
 400 brw_send_indirect_message(struct brw_codegen *p,
 401                           unsigned sfid,
 402                           struct brw_reg dst,
 403                           struct brw_reg payload,
 404                           struct brw_reg desc,
 405                           unsigned desc_imm);
 406
 407 void brw_ff_sync(struct brw_codegen *p,
 408                    struct brw_reg dest,
 409                    unsigned msg_reg_nr,
 410                    struct brw_reg src0,
 411                    bool allocate,
 412                    unsigned response_length,
 413                    bool eot);
 414
 415 void brw_svb_write(struct brw_codegen *p,
 416                    struct brw_reg dest,
 417                    unsigned msg_reg_nr,
 418                    struct brw_reg src0,
 419                    unsigned binding_table_index,
 420                    bool   send_commit_msg);
 421
 422 brw_inst *brw_fb_WRITE(struct brw_codegen *p,
 423                        struct brw_reg payload,
 424                        struct brw_reg implied_header,
 425                        unsigned msg_control,
 426                        unsigned binding_table_index,
 427                        unsigned msg_length,
 428                        unsigned response_length,
 429                        bool eot,
 430                        bool last_render_target,
 431                        bool header_present);
 432
 433 brw_inst *gen9_fb_READ(struct brw_codegen *p,
 434                        struct brw_reg dst,
 435                        struct brw_reg payload,
 436                        unsigned binding_table_index,
 437                        unsigned msg_length,
 438                        unsigned response_length,
 439                        bool per_sample);
 440
 441 void brw_SAMPLE(struct brw_codegen *p,
 442                 struct brw_reg dest,
 443                 unsigned msg_reg_nr,
 444                 struct brw_reg src0,
 445                 unsigned binding_table_index,
 446                 unsigned sampler,
 447                 unsigned msg_type,
 448                 unsigned response_length,
 449                 unsigned msg_length,
 450                 unsigned header_present,
 451                 unsigned simd_mode,
 452                 unsigned return_format);
 453
 454 void brw_adjust_sampler_state_pointer(struct brw_codegen *p,
 455                                       struct brw_reg header,
 456                                       struct brw_reg sampler_index);
 457
 458 void gen4_math(struct brw_codegen *p,
 459                struct brw_reg dest,
 460                unsigned function,
 461                unsigned msg_reg_nr,
 462                struct brw_reg src,
 463                unsigned precision );
 464
 465 void gen6_math(struct brw_codegen *p,
 466                struct brw_reg dest,
 467                unsigned function,
 468                struct brw_reg src0,
 469                struct brw_reg src1);
 470
 471 void brw_oword_block_read(struct brw_codegen *p,
 472                           struct brw_reg dest,
 473                           struct brw_reg mrf,
 474                           uint32_t offset,
 475                           uint32_t bind_table_index);
 476
 477 unsigned brw_scratch_surface_idx(const struct brw_codegen *p);
 478
 479 void brw_oword_block_read_scratch(struct brw_codegen *p,
 480                                   struct brw_reg dest,
 481                                   struct brw_reg mrf,
 482                                   int num_regs,
 483                                   unsigned offset);
 484
 485 void brw_oword_block_write_scratch(struct brw_codegen *p,
 486                                    struct brw_reg mrf,
 487                                    int num_regs,
 488                                    unsigned offset);
 489
 490 void gen7_block_read_scratch(struct brw_codegen *p,
 491                              struct brw_reg dest,
 492                              int num_regs,
 493                              unsigned offset);
 494
 495 void brw_shader_time_add(struct brw_codegen *p,
 496                          struct brw_reg payload,
 497                          uint32_t surf_index);
 498
 499 /**
 500  * Return the generation-specific jump distance scaling factor.
 501  *
 502  * Given the number of instructions to jump, we need to scale by
 503  * some number to obtain the actual jump distance to program in an
 504  * instruction.
 505  */
 506 static inline unsigned
 507 brw_jump_scale(const struct gen_device_info *devinfo)
 508 {
 509    /* Broadwell measures jump targets in bytes. */
 510    if (devinfo->gen >= 8)
 511       return 16;
 512
 513    /* Ironlake and later measure jump targets in 64-bit data chunks (in order
 514     * (to support compaction), so each 128-bit instruction requires 2 chunks.
 515     */
 516    if (devinfo->gen >= 5)
 517       return 2;
 518
 519    /* Gen4 simply uses the number of 128-bit instructions. */
 520    return 1;
 521 }
 522
 523 void brw_barrier(struct brw_codegen *p, struct brw_reg src);
 524
 525 /* If/else/endif.  Works by manipulating the execution flags on each
 526  * channel.
 527  */
 528 brw_inst *brw_IF(struct brw_codegen *p, unsigned execute_size);
 529 brw_inst *gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional,
 530                   struct brw_reg src0, struct brw_reg src1);
 531
 532 void brw_ELSE(struct brw_codegen *p);
 533 void brw_ENDIF(struct brw_codegen *p);
 534
 535 /* DO/WHILE loops:
 536  */
 537 brw_inst *brw_DO(struct brw_codegen *p, unsigned execute_size);
 538
 539 brw_inst *brw_WHILE(struct brw_codegen *p);
 540
 541 brw_inst *brw_BREAK(struct brw_codegen *p);
 542 brw_inst *brw_CONT(struct brw_codegen *p);
 543 brw_inst *gen6_HALT(struct brw_codegen *p);
 544
 545 /* Forward jumps:
 546  */
 547 void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx);
 548
 549 brw_inst *brw_JMPI(struct brw_codegen *p, struct brw_reg index,
 550                    unsigned predicate_control);
 551
 552 void brw_NOP(struct brw_codegen *p);
 553
 554 void brw_WAIT(struct brw_codegen *p);
 555
 556 /* Special case: there is never a destination, execution size will be
 557  * taken from src0:
 558  */
 559 void brw_CMP(struct brw_codegen *p,
 560              struct brw_reg dest,
 561              unsigned conditional,
 562              struct brw_reg src0,
 563              struct brw_reg src1);
 564
 565 void
 566 brw_untyped_atomic(struct brw_codegen *p,
 567                    struct brw_reg dst,
 568                    struct brw_reg payload,
 569                    struct brw_reg surface,
 570                    unsigned atomic_op,
 571                    unsigned msg_length,
 572                    bool response_expected,
 573                    bool header_present);
 574
 575 void
 576 brw_untyped_surface_read(struct brw_codegen *p,
 577                          struct brw_reg dst,
 578                          struct brw_reg payload,
 579                          struct brw_reg surface,
 580                          unsigned msg_length,
 581                          unsigned num_channels);
 582
 583 void
 584 brw_untyped_surface_write(struct brw_codegen *p,
 585                           struct brw_reg payload,
 586                           struct brw_reg surface,
 587                           unsigned msg_length,
 588                           unsigned num_channels,
 589                           bool header_present);
 590
 591 void
 592 brw_typed_atomic(struct brw_codegen *p,
 593                  struct brw_reg dst,
 594                  struct brw_reg payload,
 595                  struct brw_reg surface,
 596                  unsigned atomic_op,
 597                  unsigned msg_length,
 598                  bool response_expected,
 599                  bool header_present);
 600
 601 void
 602 brw_typed_surface_read(struct brw_codegen *p,
 603                        struct brw_reg dst,
 604                        struct brw_reg payload,
 605                        struct brw_reg surface,
 606                        unsigned msg_length,
 607                        unsigned num_channels,
 608                        bool header_present);
 609
 610 void
 611 brw_typed_surface_write(struct brw_codegen *p,
 612                         struct brw_reg payload,
 613                         struct brw_reg surface,
 614                         unsigned msg_length,
 615                         unsigned num_channels,
 616                         bool header_present);
 617
 618 void
 619 brw_byte_scattered_read(struct brw_codegen *p,
 620                         struct brw_reg dst,
 621                         struct brw_reg payload,
 622                         struct brw_reg surface,
 623                         unsigned msg_length,
 624                         unsigned bit_size);
 625
 626 void
 627 brw_byte_scattered_write(struct brw_codegen *p,
 628                          struct brw_reg payload,
 629                          struct brw_reg surface,
 630                          unsigned msg_length,
 631                          unsigned bit_size,
 632                          bool header_present);
 633
 634 void
 635 brw_memory_fence(struct brw_codegen *p,
 636                  struct brw_reg dst,
 637                  enum opcode send_op);
 638
 639 void
 640 brw_pixel_interpolator_query(struct brw_codegen *p,
 641                              struct brw_reg dest,
 642                              struct brw_reg mrf,
 643                              bool noperspective,
 644                              unsigned mode,
 645                              struct brw_reg data,
 646                              unsigned msg_length,
 647                              unsigned response_length);
 648
 649 void
 650 brw_find_live_channel(struct brw_codegen *p,
 651                       struct brw_reg dst,
 652                       struct brw_reg mask);
 653
 654 void
 655 brw_broadcast(struct brw_codegen *p,
 656               struct brw_reg dst,
 657               struct brw_reg src,
 658               struct brw_reg idx);
 659
 660 void
 661 brw_rounding_mode(struct brw_codegen *p,
 662                   enum brw_rnd_mode mode);
 663
 664 /***********************************************************************
 665  * brw_eu_util.c:
 666  */
 667
 668 void brw_copy_indirect_to_indirect(struct brw_codegen *p,
 669                                    struct brw_indirect dst_ptr,
 670                                    struct brw_indirect src_ptr,
 671                                    unsigned count);
 672
 673 void brw_copy_from_indirect(struct brw_codegen *p,
 674                             struct brw_reg dst,
 675                             struct brw_indirect ptr,
 676                             unsigned count);
 677
 678 void brw_copy4(struct brw_codegen *p,
 679                struct brw_reg dst,
 680                struct brw_reg src,
 681                unsigned count);
 682
 683 void brw_copy8(struct brw_codegen *p,
 684                struct brw_reg dst,
 685                struct brw_reg src,
 686                unsigned count);
 687
 688 void brw_math_invert( struct brw_codegen *p,
 689                       struct brw_reg dst,
 690                       struct brw_reg src);
 691
 692 void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 693
 694 void brw_set_desc_ex(struct brw_codegen *p, brw_inst *insn,
 695                      unsigned desc, unsigned ex_desc);
 696
 697 static inline void
 698 brw_set_desc(struct brw_codegen *p, brw_inst *insn, unsigned desc)
 699 {
 700    brw_set_desc_ex(p, insn, desc, 0);
 701 }
 702
 703 void brw_set_uip_jip(struct brw_codegen *p, int start_offset);
 704
 705 enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
 706 enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
 707
 708 /* brw_eu_compact.c */
 709 void brw_init_compaction_tables(const struct gen_device_info *devinfo);
 710 void brw_compact_instructions(struct brw_codegen *p, int start_offset,
 711                               struct disasm_info *disasm);
 712 void brw_uncompact_instruction(const struct gen_device_info *devinfo,
 713                                brw_inst *dst, brw_compact_inst *src);
 714 bool brw_try_compact_instruction(const struct gen_device_info *devinfo,
 715                                  brw_compact_inst *dst, const brw_inst *src);
 716
 717 void brw_debug_compact_uncompact(const struct gen_device_info *devinfo,
 718                                  brw_inst *orig, brw_inst *uncompacted);
 719
 720 /* brw_eu_validate.c */
 721 bool brw_validate_instructions(const struct gen_device_info *devinfo,
 722                                const void *assembly, int start_offset, int end_offset,
 723                                struct disasm_info *disasm);
 724
 725 static inline int
 726 next_offset(const struct gen_device_info *devinfo, void *store, int offset)
 727 {
 728    brw_inst *insn = (brw_inst *)((char *)store + offset);
 729
 730    if (brw_inst_cmpt_control(devinfo, insn))
 731       return offset + 8;
 732    else
 733       return offset + 16;
 734 }
 735
 736 struct opcode_desc {
 737    /* The union is an implementation detail used by brw_opcode_desc() to handle
 738     * opcodes that have been reused for different instructions across hardware
 739     * generations.
 740     *
 741     * The gens field acts as a tag. If it is non-zero, name points to a string
 742     * containing the instruction mnemonic. If it is zero, the table field is
 743     * valid and either points to a secondary opcode_desc table with 'size'
 744     * elements or is NULL and no such instruction exists for the opcode.
 745     */
 746    union {
 747       struct {
 748          char    *name;
 749          int      nsrc;
 750       };
 751       struct {
 752          const struct opcode_desc *table;
 753          unsigned size;
 754       };
 755    };
 756    int      ndst;
 757    int      gens;
 758 };
 759
 760 const struct opcode_desc *
 761 brw_opcode_desc(const struct gen_device_info *devinfo, enum opcode opcode);
 762
 763 static inline bool
 764 is_3src(const struct gen_device_info *devinfo, enum opcode opcode)
 765 {
 766    const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
 767    return desc && desc->nsrc == 3;
 768 }
 769
 770 /** Maximum SEND message length */
 771 #define BRW_MAX_MSG_LENGTH 15
 772
 773 /** First MRF register used by pull loads */
 774 #define FIRST_SPILL_MRF(gen) ((gen) == 6 ? 21 : 13)
 775
 776 /** First MRF register used by spills */
 777 #define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13)
 778
 779 #ifdef __cplusplus
 780 }
 781 #endif
 782
 783 #endif