src/intel/compiler/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #ifndef BRW_FS_H
  29 #define BRW_FS_H
  30
  31 #include "brw_shader.h"
  32 #include "brw_ir_fs.h"
  33 #include "brw_fs_builder.h"
  34 #include "compiler/nir/nir.h"
  35
  36 struct bblock_t;
  37 namespace {
  38    struct acp_entry;
  39 }
  40
  41 namespace brw {
  42    class fs_live_variables;
  43 }
  44
  45 struct brw_gs_compile;
  46
  47 static inline fs_reg
  48 offset(const fs_reg &reg, const brw::fs_builder &bld, unsigned delta)
  49 {
  50    return offset(reg, bld.dispatch_width(), delta);
  51 }
  52
  53 #define UBO_START ((1 << 16) - 4)
  54
  55 struct shader_stats {
  56    const char *scheduler_mode;
  57    unsigned promoted_constants;
  58 };
  59
  60 /**
  61  * The fragment shader front-end.
  62  *
  63  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  64  */
  65 class fs_visitor : public backend_shader
  66 {
  67 public:
  68    fs_visitor(const struct brw_compiler *compiler, void *log_data,
  69               void *mem_ctx,
  70               const brw_base_prog_key *key,
  71               struct brw_stage_prog_data *prog_data,
  72               const nir_shader *shader,
  73               unsigned dispatch_width,
  74               int shader_time_index,
  75               const struct brw_vue_map *input_vue_map = NULL);
  76    fs_visitor(const struct brw_compiler *compiler, void *log_data,
  77               void *mem_ctx,
  78               struct brw_gs_compile *gs_compile,
  79               struct brw_gs_prog_data *prog_data,
  80               const nir_shader *shader,
  81               int shader_time_index);
  82    void init();
  83    ~fs_visitor();
  84
  85    fs_reg vgrf(const glsl_type *const type);
  86    void import_uniforms(fs_visitor *v);
  87
  88    void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder &bld,
  89                                    const fs_reg &dst,
  90                                    const fs_reg &surf_index,
  91                                    const fs_reg &varying_offset,
  92                                    uint32_t const_offset);
  93    void DEP_RESOLVE_MOV(const brw::fs_builder &bld, int grf);
  94
  95    bool run_fs(bool allow_spilling, bool do_rep_send);
  96    bool run_vs();
  97    bool run_tcs();
  98    bool run_tes();
  99    bool run_gs();
 100    bool run_cs(unsigned min_dispatch_width);
 101    void optimize();
 102    void allocate_registers(unsigned min_dispatch_width, bool allow_spilling);
 103    void setup_fs_payload_gen4();
 104    void setup_fs_payload_gen6();
 105    void setup_vs_payload();
 106    void setup_gs_payload();
 107    void setup_cs_payload();
 108    bool fixup_sends_duplicate_payload();
 109    void fixup_3src_null_dest();
 110    bool fixup_nomask_control_flow();
 111    void assign_curb_setup();
 112    void assign_urb_setup();
 113    void convert_attr_sources_to_hw_regs(fs_inst *inst);
 114    void assign_vs_urb_setup();
 115    void assign_tcs_urb_setup();
 116    void assign_tes_urb_setup();
 117    void assign_gs_urb_setup();
 118    bool assign_regs(bool allow_spilling, bool spill_all);
 119    void assign_regs_trivial();
 120    void calculate_payload_ranges(int payload_node_count,
 121                                  int *payload_last_use_ip);
 122    void split_virtual_grfs();
 123    bool compact_virtual_grfs();
 124    void assign_constant_locations();
 125    bool get_pull_locs(const fs_reg &src, unsigned *out_surf_index,
 126                       unsigned *out_pull_index);
 127    void lower_constant_loads();
 128    void invalidate_live_intervals();
 129    void calculate_live_intervals();
 130    void calculate_register_pressure();
 131    void validate();
 132    bool opt_algebraic();
 133    bool opt_redundant_discard_jumps();
 134    bool opt_cse();
 135    bool opt_cse_local(bblock_t *block, int &ip);
 136    bool opt_copy_propagation();
 137    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 138    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 139    bool opt_copy_propagation_local(void *mem_ctx, bblock_t *block,
 140                                    exec_list *acp);
 141    bool opt_drop_redundant_mov_to_flags();
 142    bool opt_register_renaming();
 143    bool opt_bank_conflicts();
 144    unsigned bank_conflict_cycles(const fs_inst *inst) const;
 145    bool register_coalesce();
 146    bool compute_to_mrf();
 147    bool eliminate_find_live_channel();
 148    bool dead_code_eliminate();
 149    bool remove_duplicate_mrf_writes();
 150    bool remove_extra_rounding_modes();
 151
 152    bool opt_sampler_eot();
 153    bool virtual_grf_interferes(int a, int b);
 154    void schedule_instructions(instruction_scheduler_mode mode);
 155    void insert_gen4_send_dependency_workarounds();
 156    void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
 157                                                     fs_inst *inst);
 158    void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
 159                                                      fs_inst *inst);
 160    void vfail(const char *msg, va_list args);
 161    void fail(const char *msg, ...);
 162    void limit_dispatch_width(unsigned n, const char *msg);
 163    void lower_uniform_pull_constant_loads();
 164    bool lower_load_payload();
 165    bool lower_pack();
 166    bool lower_regioning();
 167    bool lower_logical_sends();
 168    bool lower_integer_multiplication();
 169    bool lower_minmax();
 170    bool lower_simd_width();
 171    bool lower_barycentrics();
 172    bool lower_scoreboard();
 173    bool lower_sub_sat();
 174    bool opt_combine_constants();
 175
 176    void emit_dummy_fs();
 177    void emit_repclear_shader();
 178    void emit_fragcoord_interpolation(fs_reg wpos);
 179    fs_reg *emit_frontfacing_interpolation();
 180    fs_reg *emit_samplepos_setup();
 181    fs_reg *emit_sampleid_setup();
 182    fs_reg *emit_samplemaskin_setup();
 183    void emit_interpolation_setup_gen4();
 184    void emit_interpolation_setup_gen6();
 185    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 186    fs_reg emit_mcs_fetch(const fs_reg &coordinate, unsigned components,
 187                          const fs_reg &texture,
 188                          const fs_reg &texture_handle);
 189    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 190    fs_reg resolve_source_modifiers(const fs_reg &src);
 191    void emit_discard_jump();
 192    void emit_fsign(const class brw::fs_builder &, const nir_alu_instr *instr,
 193                    fs_reg result, fs_reg *op, unsigned fsign_src);
 194    void emit_shader_float_controls_execution_mode();
 195    bool opt_peephole_sel();
 196    bool opt_peephole_predicated_break();
 197    bool opt_saturate_propagation();
 198    bool opt_cmod_propagation();
 199    bool opt_zero_samples();
 200
 201    void set_tcs_invocation_id();
 202
 203    void emit_nir_code();
 204    void nir_setup_outputs();
 205    void nir_setup_uniforms();
 206    void nir_emit_system_values();
 207    void nir_emit_impl(nir_function_impl *impl);
 208    void nir_emit_cf_list(exec_list *list);
 209    void nir_emit_if(nir_if *if_stmt);
 210    void nir_emit_loop(nir_loop *loop);
 211    void nir_emit_block(nir_block *block);
 212    void nir_emit_instr(nir_instr *instr);
 213    void nir_emit_alu(const brw::fs_builder &bld, nir_alu_instr *instr,
 214                      bool need_dest);
 215    bool try_emit_b2fi_of_inot(const brw::fs_builder &bld, fs_reg result,
 216                               nir_alu_instr *instr);
 217    void nir_emit_load_const(const brw::fs_builder &bld,
 218                             nir_load_const_instr *instr);
 219    void nir_emit_vs_intrinsic(const brw::fs_builder &bld,
 220                               nir_intrinsic_instr *instr);
 221    void nir_emit_tcs_intrinsic(const brw::fs_builder &bld,
 222                                nir_intrinsic_instr *instr);
 223    void nir_emit_gs_intrinsic(const brw::fs_builder &bld,
 224                               nir_intrinsic_instr *instr);
 225    void nir_emit_fs_intrinsic(const brw::fs_builder &bld,
 226                               nir_intrinsic_instr *instr);
 227    void nir_emit_cs_intrinsic(const brw::fs_builder &bld,
 228                               nir_intrinsic_instr *instr);
 229    fs_reg get_nir_image_intrinsic_image(const brw::fs_builder &bld,
 230                                         nir_intrinsic_instr *instr);
 231    fs_reg get_nir_ssbo_intrinsic_index(const brw::fs_builder &bld,
 232                                        nir_intrinsic_instr *instr);
 233    fs_reg swizzle_nir_scratch_addr(const brw::fs_builder &bld,
 234                                    const fs_reg &addr,
 235                                    bool in_dwords);
 236    void nir_emit_intrinsic(const brw::fs_builder &bld,
 237                            nir_intrinsic_instr *instr);
 238    void nir_emit_tes_intrinsic(const brw::fs_builder &bld,
 239                                nir_intrinsic_instr *instr);
 240    void nir_emit_ssbo_atomic(const brw::fs_builder &bld,
 241                              int op, nir_intrinsic_instr *instr);
 242    void nir_emit_ssbo_atomic_float(const brw::fs_builder &bld,
 243                                    int op, nir_intrinsic_instr *instr);
 244    void nir_emit_shared_atomic(const brw::fs_builder &bld,
 245                                int op, nir_intrinsic_instr *instr);
 246    void nir_emit_shared_atomic_float(const brw::fs_builder &bld,
 247                                      int op, nir_intrinsic_instr *instr);
 248    void nir_emit_global_atomic(const brw::fs_builder &bld,
 249                                int op, nir_intrinsic_instr *instr);
 250    void nir_emit_global_atomic_float(const brw::fs_builder &bld,
 251                                      int op, nir_intrinsic_instr *instr);
 252    void nir_emit_texture(const brw::fs_builder &bld,
 253                          nir_tex_instr *instr);
 254    void nir_emit_jump(const brw::fs_builder &bld,
 255                       nir_jump_instr *instr);
 256    fs_reg get_nir_src(const nir_src &src);
 257    fs_reg get_nir_src_imm(const nir_src &src);
 258    fs_reg get_nir_dest(const nir_dest &dest);
 259    fs_reg get_indirect_offset(nir_intrinsic_instr *instr);
 260    fs_reg get_tcs_single_patch_icp_handle(const brw::fs_builder &bld,
 261                                           nir_intrinsic_instr *instr);
 262    fs_reg get_tcs_eight_patch_icp_handle(const brw::fs_builder &bld,
 263                                          nir_intrinsic_instr *instr);
 264    struct brw_reg get_tcs_output_urb_handle();
 265
 266    void emit_percomp(const brw::fs_builder &bld, const fs_inst &inst,
 267                      unsigned wr_mask);
 268
 269    bool optimize_extract_to_float(nir_alu_instr *instr,
 270                                   const fs_reg &result);
 271    bool optimize_frontfacing_ternary(nir_alu_instr *instr,
 272                                      const fs_reg &result);
 273
 274    void emit_alpha_test();
 275    fs_inst *emit_single_fb_write(const brw::fs_builder &bld,
 276                                  fs_reg color1, fs_reg color2,
 277                                  fs_reg src0_alpha, unsigned components);
 278    void emit_alpha_to_coverage_workaround(const fs_reg &src0_alpha);
 279    void emit_fb_writes();
 280    fs_inst *emit_non_coherent_fb_read(const brw::fs_builder &bld,
 281                                       const fs_reg &dst, unsigned target);
 282    void emit_urb_writes(const fs_reg &gs_vertex_count = fs_reg());
 283    void set_gs_stream_control_data_bits(const fs_reg &vertex_count,
 284                                         unsigned stream_id);
 285    void emit_gs_control_data_bits(const fs_reg &vertex_count);
 286    void emit_gs_end_primitive(const nir_src &vertex_count_nir_src);
 287    void emit_gs_vertex(const nir_src &vertex_count_nir_src,
 288                        unsigned stream_id);
 289    void emit_gs_thread_end();
 290    void emit_gs_input_load(const fs_reg &dst, const nir_src &vertex_src,
 291                            unsigned base_offset, const nir_src &offset_src,
 292                            unsigned num_components, unsigned first_component);
 293    void emit_cs_terminate();
 294    fs_reg *emit_cs_work_group_id_setup();
 295
 296    void emit_barrier();
 297
 298    void emit_shader_time_begin();
 299    void emit_shader_time_end();
 300    void SHADER_TIME_ADD(const brw::fs_builder &bld,
 301                         int shader_time_subindex,
 302                         fs_reg value);
 303
 304    fs_reg get_timestamp(const brw::fs_builder &bld);
 305
 306    fs_reg interp_reg(int location, int channel);
 307
 308    virtual void dump_instructions();
 309    virtual void dump_instructions(const char *name);
 310    void dump_instruction(backend_instruction *inst);
 311    void dump_instruction(backend_instruction *inst, FILE *file);
 312
 313    const brw_base_prog_key *const key;
 314    const struct brw_sampler_prog_key_data *key_tex;
 315
 316    struct brw_gs_compile *gs_compile;
 317
 318    struct brw_stage_prog_data *prog_data;
 319
 320    const struct brw_vue_map *input_vue_map;
 321
 322    int *virtual_grf_start;
 323    int *virtual_grf_end;
 324    brw::fs_live_variables *live_intervals;
 325
 326    int *regs_live_at_ip;
 327
 328    /** Number of uniform variable components visited. */
 329    unsigned uniforms;
 330
 331    /** Byte-offset for the next available spot in the scratch space buffer. */
 332    unsigned last_scratch;
 333
 334    /**
 335     * Array mapping UNIFORM register numbers to the pull parameter index,
 336     * or -1 if this uniform register isn't being uploaded as a pull constant.
 337     */
 338    int *pull_constant_loc;
 339
 340    /**
 341     * Array mapping UNIFORM register numbers to the push parameter index,
 342     * or -1 if this uniform register isn't being uploaded as a push constant.
 343     */
 344    int *push_constant_loc;
 345
 346    fs_reg subgroup_id;
 347    fs_reg scratch_base;
 348    fs_reg frag_depth;
 349    fs_reg frag_stencil;
 350    fs_reg sample_mask;
 351    fs_reg outputs[VARYING_SLOT_MAX];
 352    fs_reg dual_src_output;
 353    int first_non_payload_grf;
 354    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 355    unsigned max_grf;
 356
 357    fs_reg *nir_locals;
 358    fs_reg *nir_ssa_values;
 359    fs_reg *nir_system_values;
 360
 361    bool failed;
 362    char *fail_msg;
 363
 364    /** Register numbers for thread payload fields. */
 365    struct thread_payload {
 366       uint8_t subspan_coord_reg[2];
 367       uint8_t source_depth_reg[2];
 368       uint8_t source_w_reg[2];
 369       uint8_t aa_dest_stencil_reg[2];
 370       uint8_t dest_depth_reg[2];
 371       uint8_t sample_pos_reg[2];
 372       uint8_t sample_mask_in_reg[2];
 373       uint8_t barycentric_coord_reg[BRW_BARYCENTRIC_MODE_COUNT][2];
 374       uint8_t local_invocation_id_reg[2];
 375
 376       /** The number of thread payload registers the hardware will supply. */
 377       uint8_t num_regs;
 378    } payload;
 379
 380    bool source_depth_to_render_target;
 381    bool runtime_check_aads_emit;
 382
 383    fs_reg pixel_x;
 384    fs_reg pixel_y;
 385    fs_reg wpos_w;
 386    fs_reg pixel_w;
 387    fs_reg delta_xy[BRW_BARYCENTRIC_MODE_COUNT];
 388    fs_reg shader_start_time;
 389    fs_reg final_gs_vertex_count;
 390    fs_reg control_data_bits;
 391    fs_reg invocation_id;
 392
 393    unsigned grf_used;
 394    bool spilled_any_registers;
 395
 396    const unsigned dispatch_width; /**< 8, 16 or 32 */
 397    unsigned max_dispatch_width;
 398
 399    int shader_time_index;
 400
 401    struct shader_stats shader_stats;
 402
 403    brw::fs_builder bld;
 404
 405 private:
 406    fs_reg prepare_alu_destination_and_sources(const brw::fs_builder &bld,
 407                                               nir_alu_instr *instr,
 408                                               fs_reg *op,
 409                                               bool need_dest);
 410
 411    void resolve_inot_sources(const brw::fs_builder &bld, nir_alu_instr *instr,
 412                              fs_reg *op);
 413    void lower_mul_dword_inst(fs_inst *inst, bblock_t *block);
 414    void lower_mul_qword_inst(fs_inst *inst, bblock_t *block);
 415    void lower_mulh_inst(fs_inst *inst, bblock_t *block);
 416
 417    unsigned workgroup_size() const;
 418 };
 419
 420 /**
 421  * Return the flag register used in fragment shaders to keep track of live
 422  * samples.  On Gen7+ we use f1.0-f1.1 to allow discard jumps in SIMD32
 423  * dispatch mode, while earlier generations are constrained to f0.1, which
 424  * limits the dispatch width to SIMD16 for fragment shaders that use discard.
 425  */
 426 static inline unsigned
 427 sample_mask_flag_subreg(const fs_visitor *shader)
 428 {
 429    assert(shader->stage == MESA_SHADER_FRAGMENT);
 430    return shader->devinfo->gen >= 7 ? 2 : 1;
 431 }
 432
 433 /**
 434  * The fragment shader code generator.
 435  *
 436  * Translates FS IR to actual i965 assembly code.
 437  */
 438 class fs_generator
 439 {
 440 public:
 441    fs_generator(const struct brw_compiler *compiler, void *log_data,
 442                 void *mem_ctx,
 443                 struct brw_stage_prog_data *prog_data,
 444                 struct shader_stats shader_stats,
 445                 bool runtime_check_aads_emit,
 446                 gl_shader_stage stage);
 447    ~fs_generator();
 448
 449    void enable_debug(const char *shader_name);
 450    int generate_code(const cfg_t *cfg, int dispatch_width,
 451                      struct brw_compile_stats *stats);
 452    const unsigned *get_assembly();
 453
 454 private:
 455    void fire_fb_write(fs_inst *inst,
 456                       struct brw_reg payload,
 457                       struct brw_reg implied_header,
 458                       GLuint nr);
 459    void generate_send(fs_inst *inst,
 460                       struct brw_reg dst,
 461                       struct brw_reg desc,
 462                       struct brw_reg ex_desc,
 463                       struct brw_reg payload,
 464                       struct brw_reg payload2);
 465    void generate_fb_write(fs_inst *inst, struct brw_reg payload);
 466    void generate_fb_read(fs_inst *inst, struct brw_reg dst,
 467                          struct brw_reg payload);
 468    void generate_urb_read(fs_inst *inst, struct brw_reg dst, struct brw_reg payload);
 469    void generate_urb_write(fs_inst *inst, struct brw_reg payload);
 470    void generate_cs_terminate(fs_inst *inst, struct brw_reg payload);
 471    void generate_barrier(fs_inst *inst, struct brw_reg src);
 472    bool generate_linterp(fs_inst *inst, struct brw_reg dst,
 473                          struct brw_reg *src);
 474    void generate_tex(fs_inst *inst, struct brw_reg dst,
 475                      struct brw_reg surface_index,
 476                      struct brw_reg sampler_index);
 477    void generate_get_buffer_size(fs_inst *inst, struct brw_reg dst,
 478                                  struct brw_reg src,
 479                                  struct brw_reg surf_index);
 480    void generate_ddx(const fs_inst *inst,
 481                      struct brw_reg dst, struct brw_reg src);
 482    void generate_ddy(const fs_inst *inst,
 483                      struct brw_reg dst, struct brw_reg src);
 484    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 485    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 486    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 487    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 488                                             struct brw_reg index,
 489                                             struct brw_reg offset);
 490    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 491                                                  struct brw_reg dst,
 492                                                  struct brw_reg surf_index,
 493                                                  struct brw_reg payload);
 494    void generate_varying_pull_constant_load_gen4(fs_inst *inst,
 495                                                  struct brw_reg dst,
 496                                                  struct brw_reg index);
 497    void generate_mov_dispatch_to_flags(fs_inst *inst);
 498
 499    void generate_pixel_interpolator_query(fs_inst *inst,
 500                                           struct brw_reg dst,
 501                                           struct brw_reg src,
 502                                           struct brw_reg msg_data,
 503                                           unsigned msg_type);
 504
 505    void generate_set_sample_id(fs_inst *inst,
 506                                struct brw_reg dst,
 507                                struct brw_reg src0,
 508                                struct brw_reg src1);
 509
 510    void generate_discard_jump(fs_inst *inst);
 511
 512    void generate_pack_half_2x16_split(fs_inst *inst,
 513                                       struct brw_reg dst,
 514                                       struct brw_reg x,
 515                                       struct brw_reg y);
 516
 517    void generate_shader_time_add(fs_inst *inst,
 518                                  struct brw_reg payload,
 519                                  struct brw_reg offset,
 520                                  struct brw_reg value);
 521
 522    void generate_mov_indirect(fs_inst *inst,
 523                               struct brw_reg dst,
 524                               struct brw_reg reg,
 525                               struct brw_reg indirect_byte_offset);
 526
 527    void generate_shuffle(fs_inst *inst,
 528                          struct brw_reg dst,
 529                          struct brw_reg src,
 530                          struct brw_reg idx);
 531
 532    void generate_quad_swizzle(const fs_inst *inst,
 533                               struct brw_reg dst, struct brw_reg src,
 534                               unsigned swiz);
 535
 536    bool patch_discard_jumps_to_fb_writes();
 537
 538    const struct brw_compiler *compiler;
 539    void *log_data; /* Passed to compiler->*_log functions */
 540
 541    const struct gen_device_info *devinfo;
 542
 543    struct brw_codegen *p;
 544    struct brw_stage_prog_data * const prog_data;
 545
 546    unsigned dispatch_width; /**< 8, 16 or 32 */
 547
 548    exec_list discard_halt_patches;
 549    struct shader_stats shader_stats;
 550    bool runtime_check_aads_emit;
 551    bool debug_flag;
 552    const char *shader_name;
 553    gl_shader_stage stage;
 554    void *mem_ctx;
 555 };
 556
 557 namespace brw {
 558    inline fs_reg
 559    fetch_payload_reg(const brw::fs_builder &bld, uint8_t regs[2],
 560                      brw_reg_type type = BRW_REGISTER_TYPE_F)
 561    {
 562       if (!regs[0])
 563          return fs_reg();
 564
 565       if (bld.dispatch_width() > 16) {
 566          const fs_reg tmp = bld.vgrf(type);
 567          const brw::fs_builder hbld = bld.exec_all().group(16, 0);
 568          const unsigned m = bld.dispatch_width() / hbld.dispatch_width();
 569          fs_reg *const components = new fs_reg[m];
 570
 571          for (unsigned g = 0; g < m; g++)
 572                components[g] = retype(brw_vec8_grf(regs[g], 0), type);
 573
 574          hbld.LOAD_PAYLOAD(tmp, components, m, 0);
 575
 576          delete[] components;
 577          return tmp;
 578
 579       } else {
 580          return fs_reg(retype(brw_vec8_grf(regs[0], 0), type));
 581       }
 582    }
 583
 584    inline fs_reg
 585    fetch_barycentric_reg(const brw::fs_builder &bld, uint8_t regs[2])
 586    {
 587       if (!regs[0])
 588          return fs_reg();
 589
 590       const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_F, 2);
 591       const brw::fs_builder hbld = bld.exec_all().group(8, 0);
 592       const unsigned m = bld.dispatch_width() / hbld.dispatch_width();
 593       fs_reg *const components = new fs_reg[2 * m];
 594
 595       for (unsigned c = 0; c < 2; c++) {
 596          for (unsigned g = 0; g < m; g++)
 597             components[c * m + g] = offset(brw_vec8_grf(regs[g / 2], 0),
 598                                            hbld, c + 2 * (g % 2));
 599       }
 600
 601       hbld.LOAD_PAYLOAD(tmp, components, 2 * m, 0);
 602
 603       delete[] components;
 604       return tmp;
 605    }
 606
 607    bool
 608    lower_src_modifiers(fs_visitor *v, bblock_t *block, fs_inst *inst, unsigned i);
 609 }
 610
 611 void shuffle_from_32bit_read(const brw::fs_builder &bld,
 612                              const fs_reg &dst,
 613                              const fs_reg &src,
 614                              uint32_t first_component,
 615                              uint32_t components);
 616
 617 fs_reg setup_imm_df(const brw::fs_builder &bld,
 618                     double v);
 619
 620 fs_reg setup_imm_b(const brw::fs_builder &bld,
 621                    int8_t v);
 622
 623 fs_reg setup_imm_ub(const brw::fs_builder &bld,
 624                    uint8_t v);
 625
 626 enum brw_barycentric_mode brw_barycentric_mode(enum glsl_interp_mode mode,
 627                                                nir_intrinsic_op op);
 628
 629 uint32_t brw_fb_write_msg_control(const fs_inst *inst,
 630                                   const struct brw_wm_prog_data *prog_data);
 631
 632
 633 #endif /* BRW_FS_H */