2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
31 #include "brw_shader.h"
32 #include "brw_ir_fs.h"
33 #include "brw_fs_builder.h"
34 #include "compiler/nir/nir.h"
42 class fs_live_variables
;
45 struct brw_gs_compile
;
48 offset(const fs_reg
®
, const brw::fs_builder
&bld
, unsigned delta
)
50 return offset(reg
, bld
.dispatch_width(), delta
);
53 #define UBO_START ((1 << 16) - 4)
56 * The fragment shader front-end.
58 * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
60 class fs_visitor
: public backend_shader
63 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
65 const brw_base_prog_key
*key
,
66 struct brw_stage_prog_data
*prog_data
,
67 struct gl_program
*prog
,
68 const nir_shader
*shader
,
69 unsigned dispatch_width
,
70 int shader_time_index
,
71 const struct brw_vue_map
*input_vue_map
= NULL
);
72 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
74 struct brw_gs_compile
*gs_compile
,
75 struct brw_gs_prog_data
*prog_data
,
76 const nir_shader
*shader
,
77 int shader_time_index
);
81 fs_reg
vgrf(const glsl_type
*const type
);
82 void import_uniforms(fs_visitor
*v
);
84 void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder
&bld
,
86 const fs_reg
&surf_index
,
87 const fs_reg
&varying_offset
,
88 uint32_t const_offset
);
89 void DEP_RESOLVE_MOV(const brw::fs_builder
&bld
, int grf
);
91 bool run_fs(bool allow_spilling
, bool do_rep_send
);
96 bool run_cs(unsigned min_dispatch_width
);
98 void allocate_registers(unsigned min_dispatch_width
, bool allow_spilling
);
99 void setup_fs_payload_gen4();
100 void setup_fs_payload_gen6();
101 void setup_vs_payload();
102 void setup_gs_payload();
103 void setup_cs_payload();
104 bool fixup_sends_duplicate_payload();
105 void fixup_3src_null_dest();
106 void assign_curb_setup();
107 void assign_urb_setup();
108 void convert_attr_sources_to_hw_regs(fs_inst
*inst
);
109 void assign_vs_urb_setup();
110 void assign_tcs_urb_setup();
111 void assign_tes_urb_setup();
112 void assign_gs_urb_setup();
113 bool assign_regs(bool allow_spilling
, bool spill_all
);
114 void assign_regs_trivial();
115 void calculate_payload_ranges(int payload_node_count
,
116 int *payload_last_use_ip
);
117 void split_virtual_grfs();
118 bool compact_virtual_grfs();
119 void assign_constant_locations();
120 bool get_pull_locs(const fs_reg
&src
, unsigned *out_surf_index
,
121 unsigned *out_pull_index
);
122 void lower_constant_loads();
123 void invalidate_live_intervals();
124 void calculate_live_intervals();
125 void calculate_register_pressure();
127 bool opt_algebraic();
128 bool opt_redundant_discard_jumps();
130 bool opt_cse_local(bblock_t
*block
);
131 bool opt_copy_propagation();
132 bool try_copy_propagate(fs_inst
*inst
, int arg
, acp_entry
*entry
);
133 bool try_constant_propagate(fs_inst
*inst
, acp_entry
*entry
);
134 bool opt_copy_propagation_local(void *mem_ctx
, bblock_t
*block
,
136 bool opt_drop_redundant_mov_to_flags();
137 bool opt_register_renaming();
138 bool opt_bank_conflicts();
139 unsigned bank_conflict_cycles(const fs_inst
*inst
) const;
140 bool register_coalesce();
141 bool compute_to_mrf();
142 bool eliminate_find_live_channel();
143 bool dead_code_eliminate();
144 bool remove_duplicate_mrf_writes();
145 bool remove_extra_rounding_modes();
147 bool opt_sampler_eot();
148 bool virtual_grf_interferes(int a
, int b
);
149 void schedule_instructions(instruction_scheduler_mode mode
);
150 void insert_gen4_send_dependency_workarounds();
151 void insert_gen4_pre_send_dependency_workarounds(bblock_t
*block
,
153 void insert_gen4_post_send_dependency_workarounds(bblock_t
*block
,
155 void vfail(const char *msg
, va_list args
);
156 void fail(const char *msg
, ...);
157 void limit_dispatch_width(unsigned n
, const char *msg
);
158 void lower_uniform_pull_constant_loads();
159 bool lower_load_payload();
161 bool lower_regioning();
162 bool lower_logical_sends();
163 bool lower_integer_multiplication();
165 bool lower_simd_width();
166 bool opt_combine_constants();
168 void emit_dummy_fs();
169 void emit_repclear_shader();
170 void emit_fragcoord_interpolation(fs_reg wpos
);
171 fs_reg
*emit_frontfacing_interpolation();
172 fs_reg
*emit_samplepos_setup();
173 fs_reg
*emit_sampleid_setup();
174 fs_reg
*emit_samplemaskin_setup();
175 void emit_interpolation_setup_gen4();
176 void emit_interpolation_setup_gen6();
177 void compute_sample_position(fs_reg dst
, fs_reg int_sample_pos
);
178 fs_reg
emit_mcs_fetch(const fs_reg
&coordinate
, unsigned components
,
179 const fs_reg
&texture
,
180 const fs_reg
&texture_handle
);
181 void emit_gen6_gather_wa(uint8_t wa
, fs_reg dst
);
182 fs_reg
resolve_source_modifiers(const fs_reg
&src
);
183 void emit_discard_jump();
184 void emit_fsign(const class brw::fs_builder
&, const nir_alu_instr
*instr
,
185 fs_reg result
, fs_reg
*op
, unsigned fsign_src
);
186 bool opt_peephole_sel();
187 bool opt_peephole_csel();
188 bool opt_peephole_predicated_break();
189 bool opt_saturate_propagation();
190 bool opt_cmod_propagation();
191 bool opt_zero_samples();
193 void set_tcs_invocation_id();
195 void emit_nir_code();
196 void nir_setup_outputs();
197 void nir_setup_uniforms();
198 void nir_emit_system_values();
199 void nir_emit_impl(nir_function_impl
*impl
);
200 void nir_emit_cf_list(exec_list
*list
);
201 void nir_emit_if(nir_if
*if_stmt
);
202 void nir_emit_loop(nir_loop
*loop
);
203 void nir_emit_block(nir_block
*block
);
204 void nir_emit_instr(nir_instr
*instr
);
205 void nir_emit_alu(const brw::fs_builder
&bld
, nir_alu_instr
*instr
,
207 bool try_emit_b2fi_of_inot(const brw::fs_builder
&bld
, fs_reg result
,
208 nir_alu_instr
*instr
);
209 void nir_emit_load_const(const brw::fs_builder
&bld
,
210 nir_load_const_instr
*instr
);
211 void nir_emit_vs_intrinsic(const brw::fs_builder
&bld
,
212 nir_intrinsic_instr
*instr
);
213 void nir_emit_tcs_intrinsic(const brw::fs_builder
&bld
,
214 nir_intrinsic_instr
*instr
);
215 void nir_emit_gs_intrinsic(const brw::fs_builder
&bld
,
216 nir_intrinsic_instr
*instr
);
217 void nir_emit_fs_intrinsic(const brw::fs_builder
&bld
,
218 nir_intrinsic_instr
*instr
);
219 void nir_emit_cs_intrinsic(const brw::fs_builder
&bld
,
220 nir_intrinsic_instr
*instr
);
221 fs_reg
get_nir_image_intrinsic_image(const brw::fs_builder
&bld
,
222 nir_intrinsic_instr
*instr
);
223 fs_reg
get_nir_ssbo_intrinsic_index(const brw::fs_builder
&bld
,
224 nir_intrinsic_instr
*instr
);
225 void nir_emit_intrinsic(const brw::fs_builder
&bld
,
226 nir_intrinsic_instr
*instr
);
227 void nir_emit_tes_intrinsic(const brw::fs_builder
&bld
,
228 nir_intrinsic_instr
*instr
);
229 void nir_emit_ssbo_atomic(const brw::fs_builder
&bld
,
230 int op
, nir_intrinsic_instr
*instr
);
231 void nir_emit_ssbo_atomic_float(const brw::fs_builder
&bld
,
232 int op
, nir_intrinsic_instr
*instr
);
233 void nir_emit_shared_atomic(const brw::fs_builder
&bld
,
234 int op
, nir_intrinsic_instr
*instr
);
235 void nir_emit_shared_atomic_float(const brw::fs_builder
&bld
,
236 int op
, nir_intrinsic_instr
*instr
);
237 void nir_emit_global_atomic(const brw::fs_builder
&bld
,
238 int op
, nir_intrinsic_instr
*instr
);
239 void nir_emit_global_atomic_float(const brw::fs_builder
&bld
,
240 int op
, nir_intrinsic_instr
*instr
);
241 void nir_emit_texture(const brw::fs_builder
&bld
,
242 nir_tex_instr
*instr
);
243 void nir_emit_jump(const brw::fs_builder
&bld
,
244 nir_jump_instr
*instr
);
245 fs_reg
get_nir_src(const nir_src
&src
);
246 fs_reg
get_nir_src_imm(const nir_src
&src
);
247 fs_reg
get_nir_dest(const nir_dest
&dest
);
248 fs_reg
get_indirect_offset(nir_intrinsic_instr
*instr
);
249 fs_reg
get_tcs_single_patch_icp_handle(const brw::fs_builder
&bld
,
250 nir_intrinsic_instr
*instr
);
251 fs_reg
get_tcs_eight_patch_icp_handle(const brw::fs_builder
&bld
,
252 nir_intrinsic_instr
*instr
);
253 struct brw_reg
get_tcs_output_urb_handle();
255 void emit_percomp(const brw::fs_builder
&bld
, const fs_inst
&inst
,
258 bool optimize_extract_to_float(nir_alu_instr
*instr
,
259 const fs_reg
&result
);
260 bool optimize_frontfacing_ternary(nir_alu_instr
*instr
,
261 const fs_reg
&result
);
263 void emit_alpha_test();
264 fs_inst
*emit_single_fb_write(const brw::fs_builder
&bld
,
265 fs_reg color1
, fs_reg color2
,
266 fs_reg src0_alpha
, unsigned components
);
267 void emit_alpha_to_coverage_workaround(const fs_reg
&src0_alpha
);
268 void emit_fb_writes();
269 fs_inst
*emit_non_coherent_fb_read(const brw::fs_builder
&bld
,
270 const fs_reg
&dst
, unsigned target
);
271 void emit_urb_writes(const fs_reg
&gs_vertex_count
= fs_reg());
272 void set_gs_stream_control_data_bits(const fs_reg
&vertex_count
,
274 void emit_gs_control_data_bits(const fs_reg
&vertex_count
);
275 void emit_gs_end_primitive(const nir_src
&vertex_count_nir_src
);
276 void emit_gs_vertex(const nir_src
&vertex_count_nir_src
,
278 void emit_gs_thread_end();
279 void emit_gs_input_load(const fs_reg
&dst
, const nir_src
&vertex_src
,
280 unsigned base_offset
, const nir_src
&offset_src
,
281 unsigned num_components
, unsigned first_component
);
282 void emit_cs_terminate();
283 fs_reg
*emit_cs_work_group_id_setup();
287 void emit_shader_time_begin();
288 void emit_shader_time_end();
289 void SHADER_TIME_ADD(const brw::fs_builder
&bld
,
290 int shader_time_subindex
,
293 fs_reg
get_timestamp(const brw::fs_builder
&bld
);
295 fs_reg
interp_reg(int location
, int channel
);
297 int implied_mrf_writes(fs_inst
*inst
) const;
299 virtual void dump_instructions();
300 virtual void dump_instructions(const char *name
);
301 void dump_instruction(backend_instruction
*inst
);
302 void dump_instruction(backend_instruction
*inst
, FILE *file
);
304 const brw_base_prog_key
*const key
;
305 const struct brw_sampler_prog_key_data
*key_tex
;
307 struct brw_gs_compile
*gs_compile
;
309 struct brw_stage_prog_data
*prog_data
;
310 struct gl_program
*prog
;
312 const struct brw_vue_map
*input_vue_map
;
314 int *virtual_grf_start
;
315 int *virtual_grf_end
;
316 brw::fs_live_variables
*live_intervals
;
318 int *regs_live_at_ip
;
320 /** Number of uniform variable components visited. */
323 /** Byte-offset for the next available spot in the scratch space buffer. */
324 unsigned last_scratch
;
327 * Array mapping UNIFORM register numbers to the pull parameter index,
328 * or -1 if this uniform register isn't being uploaded as a pull constant.
330 int *pull_constant_loc
;
333 * Array mapping UNIFORM register numbers to the push parameter index,
334 * or -1 if this uniform register isn't being uploaded as a push constant.
336 int *push_constant_loc
;
342 fs_reg outputs
[VARYING_SLOT_MAX
];
343 fs_reg dual_src_output
;
344 int first_non_payload_grf
;
345 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
349 fs_reg
*nir_ssa_values
;
350 fs_reg
*nir_system_values
;
355 /** Register numbers for thread payload fields. */
356 struct thread_payload
{
357 uint8_t subspan_coord_reg
[2];
358 uint8_t source_depth_reg
[2];
359 uint8_t source_w_reg
[2];
360 uint8_t aa_dest_stencil_reg
[2];
361 uint8_t dest_depth_reg
[2];
362 uint8_t sample_pos_reg
[2];
363 uint8_t sample_mask_in_reg
[2];
364 uint8_t barycentric_coord_reg
[BRW_BARYCENTRIC_MODE_COUNT
][2];
365 uint8_t local_invocation_id_reg
[2];
367 /** The number of thread payload registers the hardware will supply. */
371 bool source_depth_to_render_target
;
372 bool runtime_check_aads_emit
;
378 fs_reg delta_xy
[BRW_BARYCENTRIC_MODE_COUNT
];
379 fs_reg shader_start_time
;
380 fs_reg final_gs_vertex_count
;
381 fs_reg control_data_bits
;
382 fs_reg invocation_id
;
385 bool spilled_any_registers
;
387 const unsigned dispatch_width
; /**< 8, 16 or 32 */
388 unsigned max_dispatch_width
;
390 int shader_time_index
;
392 unsigned promoted_constants
;
396 fs_reg
prepare_alu_destination_and_sources(const brw::fs_builder
&bld
,
397 nir_alu_instr
*instr
,
401 void resolve_inot_sources(const brw::fs_builder
&bld
, nir_alu_instr
*instr
,
406 * The fragment shader code generator.
408 * Translates FS IR to actual i965 assembly code.
413 fs_generator(const struct brw_compiler
*compiler
, void *log_data
,
415 struct brw_stage_prog_data
*prog_data
,
416 unsigned promoted_constants
,
417 bool runtime_check_aads_emit
,
418 gl_shader_stage stage
);
421 void enable_debug(const char *shader_name
);
422 int generate_code(const cfg_t
*cfg
, int dispatch_width
);
423 const unsigned *get_assembly();
426 void fire_fb_write(fs_inst
*inst
,
427 struct brw_reg payload
,
428 struct brw_reg implied_header
,
430 void generate_send(fs_inst
*inst
,
433 struct brw_reg ex_desc
,
434 struct brw_reg payload
,
435 struct brw_reg payload2
);
436 void generate_fb_write(fs_inst
*inst
, struct brw_reg payload
);
437 void generate_fb_read(fs_inst
*inst
, struct brw_reg dst
,
438 struct brw_reg payload
);
439 void generate_urb_read(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg payload
);
440 void generate_urb_write(fs_inst
*inst
, struct brw_reg payload
);
441 void generate_cs_terminate(fs_inst
*inst
, struct brw_reg payload
);
442 void generate_barrier(fs_inst
*inst
, struct brw_reg src
);
443 bool generate_linterp(fs_inst
*inst
, struct brw_reg dst
,
444 struct brw_reg
*src
);
445 void generate_tex(fs_inst
*inst
, struct brw_reg dst
,
446 struct brw_reg surface_index
,
447 struct brw_reg sampler_index
);
448 void generate_get_buffer_size(fs_inst
*inst
, struct brw_reg dst
,
450 struct brw_reg surf_index
);
451 void generate_ddx(const fs_inst
*inst
,
452 struct brw_reg dst
, struct brw_reg src
);
453 void generate_ddy(const fs_inst
*inst
,
454 struct brw_reg dst
, struct brw_reg src
);
455 void generate_scratch_write(fs_inst
*inst
, struct brw_reg src
);
456 void generate_scratch_read(fs_inst
*inst
, struct brw_reg dst
);
457 void generate_scratch_read_gen7(fs_inst
*inst
, struct brw_reg dst
);
458 void generate_uniform_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
459 struct brw_reg index
,
460 struct brw_reg offset
);
461 void generate_uniform_pull_constant_load_gen7(fs_inst
*inst
,
463 struct brw_reg surf_index
,
464 struct brw_reg payload
);
465 void generate_varying_pull_constant_load_gen4(fs_inst
*inst
,
467 struct brw_reg index
);
468 void generate_mov_dispatch_to_flags(fs_inst
*inst
);
470 void generate_pixel_interpolator_query(fs_inst
*inst
,
473 struct brw_reg msg_data
,
476 void generate_set_sample_id(fs_inst
*inst
,
479 struct brw_reg src1
);
481 void generate_discard_jump(fs_inst
*inst
);
483 void generate_pack_half_2x16_split(fs_inst
*inst
,
488 void generate_shader_time_add(fs_inst
*inst
,
489 struct brw_reg payload
,
490 struct brw_reg offset
,
491 struct brw_reg value
);
493 void generate_mov_indirect(fs_inst
*inst
,
496 struct brw_reg indirect_byte_offset
);
498 void generate_shuffle(fs_inst
*inst
,
503 void generate_quad_swizzle(const fs_inst
*inst
,
504 struct brw_reg dst
, struct brw_reg src
,
507 bool patch_discard_jumps_to_fb_writes();
509 const struct brw_compiler
*compiler
;
510 void *log_data
; /* Passed to compiler->*_log functions */
512 const struct gen_device_info
*devinfo
;
514 struct brw_codegen
*p
;
515 struct brw_stage_prog_data
* const prog_data
;
517 unsigned dispatch_width
; /**< 8, 16 or 32 */
519 exec_list discard_halt_patches
;
520 unsigned promoted_constants
;
521 bool runtime_check_aads_emit
;
523 const char *shader_name
;
524 gl_shader_stage stage
;
530 fetch_payload_reg(const brw::fs_builder
&bld
, uint8_t regs
[2],
531 brw_reg_type type
= BRW_REGISTER_TYPE_F
, unsigned n
= 1)
536 if (bld
.dispatch_width() > 16) {
537 const fs_reg tmp
= bld
.vgrf(type
, n
);
538 const brw::fs_builder hbld
= bld
.exec_all().group(16, 0);
539 const unsigned m
= bld
.dispatch_width() / hbld
.dispatch_width();
540 fs_reg
*const components
= new fs_reg
[n
* m
];
542 for (unsigned c
= 0; c
< n
; c
++) {
543 for (unsigned g
= 0; g
< m
; g
++) {
544 components
[c
* m
+ g
] =
545 offset(retype(brw_vec8_grf(regs
[g
], 0), type
), hbld
, c
);
549 hbld
.LOAD_PAYLOAD(tmp
, components
, n
* m
, 0);
555 return fs_reg(retype(brw_vec8_grf(regs
[0], 0), type
));
560 lower_src_modifiers(fs_visitor
*v
, bblock_t
*block
, fs_inst
*inst
, unsigned i
);
563 void shuffle_from_32bit_read(const brw::fs_builder
&bld
,
566 uint32_t first_component
,
567 uint32_t components
);
569 fs_reg
shuffle_for_32bit_write(const brw::fs_builder
&bld
,
571 uint32_t first_component
,
572 uint32_t components
);
574 fs_reg
setup_imm_df(const brw::fs_builder
&bld
,
577 fs_reg
setup_imm_b(const brw::fs_builder
&bld
,
580 fs_reg
setup_imm_ub(const brw::fs_builder
&bld
,
583 enum brw_barycentric_mode
brw_barycentric_mode(enum glsl_interp_mode mode
,
584 nir_intrinsic_op op
);
586 #endif /* BRW_FS_H */