intel/nir: Stop using nir_lower_vars_to_scratch
[mesa.git] / src / intel / compiler / brw_fs_live_variables.cpp
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #include "brw_fs.h"
29 #include "brw_fs_live_variables.h"
30
31 using namespace brw;
32
33 #define MAX_INSTRUCTION (1 << 30)
34
35 /** @file brw_fs_live_variables.cpp
36 *
37 * Support for calculating liveness information about virtual GRFs.
38 *
39 * This produces a live interval for each whole virtual GRF. We could
40 * choose to expose per-component live intervals for VGRFs of size > 1,
41 * but we currently do not. It is easier for the consumers of this
42 * information to work with whole VGRFs.
43 *
44 * However, we internally track use/def information at the per-GRF level for
45 * greater accuracy. Large VGRFs may be accessed piecemeal over many
46 * (possibly non-adjacent) instructions. In this case, examining a single
47 * instruction is insufficient to decide whether a whole VGRF is ultimately
48 * used or defined. Tracking individual components allows us to easily
49 * assemble this information.
50 *
51 * See Muchnick's Advanced Compiler Design and Implementation, section
52 * 14.1 (p444).
53 */
54
55 void
56 fs_live_variables::setup_one_read(struct block_data *bd,
57 int ip, const fs_reg &reg)
58 {
59 int var = var_from_reg(reg);
60 assert(var < num_vars);
61
62 start[var] = MIN2(start[var], ip);
63 end[var] = MAX2(end[var], ip);
64
65 /* The use[] bitset marks when the block makes use of a variable (VGRF
66 * channel) without having completely defined that variable within the
67 * block.
68 */
69 if (!BITSET_TEST(bd->def, var))
70 BITSET_SET(bd->use, var);
71 }
72
73 void
74 fs_live_variables::setup_one_write(struct block_data *bd, fs_inst *inst,
75 int ip, const fs_reg &reg)
76 {
77 int var = var_from_reg(reg);
78 assert(var < num_vars);
79
80 start[var] = MIN2(start[var], ip);
81 end[var] = MAX2(end[var], ip);
82
83 /* The def[] bitset marks when an initialization in a block completely
84 * screens off previous updates of that variable (VGRF channel).
85 */
86 if (inst->dst.file == VGRF) {
87 if (!inst->is_partial_write() && !BITSET_TEST(bd->use, var))
88 BITSET_SET(bd->def, var);
89
90 BITSET_SET(bd->defout, var);
91 }
92 }
93
94 /**
95 * Sets up the use[] and def[] bitsets.
96 *
97 * The basic-block-level live variable analysis needs to know which
98 * variables get used before they're completely defined, and which
99 * variables are completely defined before they're used.
100 *
101 * These are tracked at the per-component level, rather than whole VGRFs.
102 */
103 void
104 fs_live_variables::setup_def_use()
105 {
106 int ip = 0;
107
108 foreach_block (block, cfg) {
109 assert(ip == block->start_ip);
110 if (block->num > 0)
111 assert(cfg->blocks[block->num - 1]->end_ip == ip - 1);
112
113 struct block_data *bd = &block_data[block->num];
114
115 foreach_inst_in_block(fs_inst, inst, block) {
116 /* Set use[] for this instruction */
117 for (unsigned int i = 0; i < inst->sources; i++) {
118 fs_reg reg = inst->src[i];
119
120 if (reg.file != VGRF)
121 continue;
122
123 for (unsigned j = 0; j < regs_read(inst, i); j++) {
124 setup_one_read(bd, ip, reg);
125 reg.offset += REG_SIZE;
126 }
127 }
128
129 bd->flag_use[0] |= inst->flags_read(devinfo) & ~bd->flag_def[0];
130
131 /* Set def[] for this instruction */
132 if (inst->dst.file == VGRF) {
133 fs_reg reg = inst->dst;
134 for (unsigned j = 0; j < regs_written(inst); j++) {
135 setup_one_write(bd, inst, ip, reg);
136 reg.offset += REG_SIZE;
137 }
138 }
139
140 if (!inst->predicate && inst->exec_size >= 8)
141 bd->flag_def[0] |= inst->flags_written() & ~bd->flag_use[0];
142
143 ip++;
144 }
145 }
146 }
147
148 /**
149 * The algorithm incrementally sets bits in liveout and livein,
150 * propagating it through control flow. It will eventually terminate
151 * because it only ever adds bits, and stops when no bits are added in
152 * a pass.
153 */
154 void
155 fs_live_variables::compute_live_variables()
156 {
157 bool cont = true;
158
159 while (cont) {
160 cont = false;
161
162 foreach_block_reverse (block, cfg) {
163 struct block_data *bd = &block_data[block->num];
164
165 /* Update liveout */
166 foreach_list_typed(bblock_link, child_link, link, &block->children) {
167 struct block_data *child_bd = &block_data[child_link->block->num];
168
169 for (int i = 0; i < bitset_words; i++) {
170 BITSET_WORD new_liveout = (child_bd->livein[i] &
171 ~bd->liveout[i]);
172 if (new_liveout) {
173 bd->liveout[i] |= new_liveout;
174 cont = true;
175 }
176 }
177 BITSET_WORD new_liveout = (child_bd->flag_livein[0] &
178 ~bd->flag_liveout[0]);
179 if (new_liveout) {
180 bd->flag_liveout[0] |= new_liveout;
181 cont = true;
182 }
183 }
184
185 /* Update livein */
186 for (int i = 0; i < bitset_words; i++) {
187 BITSET_WORD new_livein = (bd->use[i] |
188 (bd->liveout[i] &
189 ~bd->def[i]));
190 if (new_livein & ~bd->livein[i]) {
191 bd->livein[i] |= new_livein;
192 cont = true;
193 }
194 }
195 BITSET_WORD new_livein = (bd->flag_use[0] |
196 (bd->flag_liveout[0] &
197 ~bd->flag_def[0]));
198 if (new_livein & ~bd->flag_livein[0]) {
199 bd->flag_livein[0] |= new_livein;
200 cont = true;
201 }
202 }
203 }
204
205 /* Propagate defin and defout down the CFG to calculate the union of live
206 * variables potentially defined along any possible control flow path.
207 */
208 do {
209 cont = false;
210
211 foreach_block (block, cfg) {
212 const struct block_data *bd = &block_data[block->num];
213
214 foreach_list_typed(bblock_link, child_link, link, &block->children) {
215 struct block_data *child_bd = &block_data[child_link->block->num];
216
217 for (int i = 0; i < bitset_words; i++) {
218 const BITSET_WORD new_def = bd->defout[i] & ~child_bd->defin[i];
219 child_bd->defin[i] |= new_def;
220 child_bd->defout[i] |= new_def;
221 cont |= new_def;
222 }
223 }
224 }
225 } while (cont);
226 }
227
228 /**
229 * Extend the start/end ranges for each variable to account for the
230 * new information calculated from control flow.
231 */
232 void
233 fs_live_variables::compute_start_end()
234 {
235 foreach_block (block, cfg) {
236 struct block_data *bd = &block_data[block->num];
237
238 for (int w = 0; w < bitset_words; w++) {
239 BITSET_WORD livedefin = bd->livein[w] & bd->defin[w];
240 BITSET_WORD livedefout = bd->liveout[w] & bd->defout[w];
241 BITSET_WORD livedefinout = livedefin | livedefout;
242 while (livedefinout) {
243 unsigned b = u_bit_scan(&livedefinout);
244 unsigned i = w * BITSET_WORDBITS + b;
245 if (livedefin & (1u << b)) {
246 start[i] = MIN2(start[i], block->start_ip);
247 end[i] = MAX2(end[i], block->start_ip);
248 }
249 if (livedefout & (1u << b)) {
250 start[i] = MIN2(start[i], block->end_ip);
251 end[i] = MAX2(end[i], block->end_ip);
252 }
253 }
254 }
255 }
256 }
257
258 fs_live_variables::fs_live_variables(const backend_shader *s)
259 : devinfo(s->devinfo), cfg(s->cfg)
260 {
261 mem_ctx = ralloc_context(NULL);
262
263 num_vgrfs = s->alloc.count;
264 num_vars = 0;
265 var_from_vgrf = rzalloc_array(mem_ctx, int, num_vgrfs);
266 for (int i = 0; i < num_vgrfs; i++) {
267 var_from_vgrf[i] = num_vars;
268 num_vars += s->alloc.sizes[i];
269 }
270
271 vgrf_from_var = rzalloc_array(mem_ctx, int, num_vars);
272 for (int i = 0; i < num_vgrfs; i++) {
273 for (unsigned j = 0; j < s->alloc.sizes[i]; j++) {
274 vgrf_from_var[var_from_vgrf[i] + j] = i;
275 }
276 }
277
278 start = ralloc_array(mem_ctx, int, num_vars);
279 end = rzalloc_array(mem_ctx, int, num_vars);
280 for (int i = 0; i < num_vars; i++) {
281 start[i] = MAX_INSTRUCTION;
282 end[i] = -1;
283 }
284
285 vgrf_start = ralloc_array(mem_ctx, int, num_vgrfs);
286 vgrf_end = ralloc_array(mem_ctx, int, num_vgrfs);
287 for (int i = 0; i < num_vgrfs; i++) {
288 vgrf_start[i] = MAX_INSTRUCTION;
289 vgrf_end[i] = -1;
290 }
291
292 block_data = rzalloc_array(mem_ctx, struct block_data, cfg->num_blocks);
293
294 bitset_words = BITSET_WORDS(num_vars);
295 for (int i = 0; i < cfg->num_blocks; i++) {
296 block_data[i].def = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
297 block_data[i].use = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
298 block_data[i].livein = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
299 block_data[i].liveout = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
300 block_data[i].defin = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
301 block_data[i].defout = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
302
303 block_data[i].flag_def[0] = 0;
304 block_data[i].flag_use[0] = 0;
305 block_data[i].flag_livein[0] = 0;
306 block_data[i].flag_liveout[0] = 0;
307 }
308
309 setup_def_use();
310 compute_live_variables();
311 compute_start_end();
312
313 /* Merge the per-component live ranges to whole VGRF live ranges. */
314 for (int i = 0; i < num_vars; i++) {
315 const unsigned vgrf = vgrf_from_var[i];
316 vgrf_start[vgrf] = MIN2(vgrf_start[vgrf], start[i]);
317 vgrf_end[vgrf] = MAX2(vgrf_end[vgrf], end[i]);
318 }
319 }
320
321 fs_live_variables::~fs_live_variables()
322 {
323 ralloc_free(mem_ctx);
324 }
325
326 static bool
327 check_register_live_range(const fs_live_variables *live, int ip,
328 const fs_reg &reg, unsigned n)
329 {
330 const unsigned var = live->var_from_reg(reg);
331
332 if (var + n > unsigned(live->num_vars) ||
333 live->vgrf_start[reg.nr] > ip || live->vgrf_end[reg.nr] < ip)
334 return false;
335
336 for (unsigned j = 0; j < n; j++) {
337 if (live->start[var + j] > ip || live->end[var + j] < ip)
338 return false;
339 }
340
341 return true;
342 }
343
344 bool
345 fs_live_variables::validate(const backend_shader *s) const
346 {
347 int ip = 0;
348
349 foreach_block_and_inst(block, fs_inst, inst, s->cfg) {
350 for (unsigned i = 0; i < inst->sources; i++) {
351 if (inst->src[i].file == VGRF &&
352 !check_register_live_range(this, ip,
353 inst->src[i], regs_read(inst, i)))
354 return false;
355 }
356
357 if (inst->dst.file == VGRF &&
358 !check_register_live_range(this, ip, inst->dst, regs_written(inst)))
359 return false;
360
361 ip++;
362 }
363
364 return true;
365 }
366
367 bool
368 fs_live_variables::vars_interfere(int a, int b) const
369 {
370 return !(end[b] <= start[a] ||
371 end[a] <= start[b]);
372 }
373
374 bool
375 fs_live_variables::vgrfs_interfere(int a, int b) const
376 {
377 return !(vgrf_end[a] <= vgrf_start[b] ||
378 vgrf_end[b] <= vgrf_start[a]);
379 }