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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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24 #include "compiler/nir/nir_builder.h"
28 * We need to compute alpha to coverage dithering manually in shader
29 * and replace sample mask store with the bitwise-AND of sample mask and
30 * alpha to coverage dithering.
32 * The following formula is used to compute final sample mask:
33 * m = int(16.0 * clamp(src0_alpha, 0.0, 1.0))
34 * dither_mask = 0x1111 * ((0xfea80 >> (m & ~3)) & 0xf) |
35 * 0x0808 * (m & 2) | 0x0100 * (m & 1)
36 * sample_mask = sample_mask & dither_mask
38 * It gives a number of ones proportional to the alpha for 2, 4, 8 or 16
39 * least significant bits of the result:
40 * 0.0000 0000000000000000
41 * 0.0625 0000000100000000
42 * 0.1250 0001000000010000
43 * 0.1875 0001000100010000
44 * 0.2500 1000100010001000
45 * 0.3125 1000100110001000
46 * 0.3750 1001100010011000
47 * 0.4375 1001100110011000
48 * 0.5000 1010101010101010
49 * 0.5625 1010101110101010
50 * 0.6250 1011101010111010
51 * 0.6875 1011101110111010
52 * 0.7500 1110111011101110
53 * 0.8125 1110111111101110
54 * 0.8750 1111111011111110
55 * 0.9375 1111111111111110
56 * 1.0000 1111111111111111
59 build_dither_mask(nir_builder
*b
, nir_ssa_def
*color
)
61 assert(color
->num_components
== 4);
62 nir_ssa_def
*alpha
= nir_channel(b
, color
, 3);
65 nir_f2i32(b
, nir_fmul_imm(b
, nir_fsat(b
, alpha
), 16.0));
71 nir_imm_int(b
, 0xfea80),
72 nir_iand(b
, m
, nir_imm_int(b
, ~3))));
74 nir_ssa_def
*part_b
= nir_iand(b
, m
, nir_imm_int(b
, 2));
76 nir_ssa_def
*part_c
= nir_iand(b
, m
, nir_imm_int(b
, 1));
79 nir_imul_imm(b
, part_a
, 0x1111),
81 nir_imul_imm(b
, part_b
, 0x0808),
82 nir_imul_imm(b
, part_c
, 0x0100)));
86 brw_nir_lower_alpha_to_coverage(nir_shader
*shader
)
88 assert(shader
->info
.stage
== MESA_SHADER_FRAGMENT
);
89 nir_function_impl
*impl
= nir_shader_get_entrypoint(shader
);
91 const uint64_t outputs_written
= shader
->info
.outputs_written
;
92 if (!(outputs_written
& BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK
)) ||
93 !(outputs_written
& (BITFIELD64_BIT(FRAG_RESULT_COLOR
) |
94 BITFIELD64_BIT(FRAG_RESULT_DATA0
))))
97 nir_intrinsic_instr
*sample_mask_write
= NULL
;
98 nir_intrinsic_instr
*color0_write
= NULL
;
99 bool sample_mask_write_first
= false;
101 nir_foreach_block(block
, impl
) {
102 nir_foreach_instr_safe(instr
, block
) {
103 if (instr
->type
!= nir_instr_type_intrinsic
)
106 nir_intrinsic_instr
*intrin
= nir_instr_as_intrinsic(instr
);
107 if (intrin
->intrinsic
!= nir_intrinsic_store_output
)
110 /* We call nir_lower_io_to_temporaries to lower FS outputs to
111 * temporaries with a copy at the end so this should be the last
112 * block in the shader.
114 assert(block
->cf_node
.parent
== &impl
->cf_node
);
115 assert(nir_cf_node_is_last(&block
->cf_node
));
117 /* See store_output in fs_visitor::nir_emit_fs_intrinsic */
118 const unsigned store_offset
= nir_src_as_uint(intrin
->src
[1]);
119 const unsigned driver_location
= nir_intrinsic_base(intrin
) +
120 SET_FIELD(store_offset
, BRW_NIR_FRAG_OUTPUT_LOCATION
);
122 /* Extract the FRAG_RESULT */
123 const unsigned location
=
124 GET_FIELD(driver_location
, BRW_NIR_FRAG_OUTPUT_LOCATION
);
126 if (location
== FRAG_RESULT_SAMPLE_MASK
) {
127 assert(sample_mask_write
== NULL
);
128 sample_mask_write
= intrin
;
129 sample_mask_write_first
= (color0_write
== NULL
);
132 if (location
== FRAG_RESULT_COLOR
||
133 location
== FRAG_RESULT_DATA0
) {
134 assert(color0_write
== NULL
);
135 color0_write
= intrin
;
140 /* It's possible that shader_info may be out-of-date and the writes to
141 * either gl_SampleMask or the first color value may have been removed.
142 * This can happen if, for instance a nir_ssa_undef is written to the
143 * color value. In that case, just bail and don't do anything rather
146 if (color0_write
== NULL
|| sample_mask_write
== NULL
)
149 /* It's possible that the color value isn't actually a vec4. In this case,
150 * assuming an alpha of 1.0 and letting the sample mask pass through
151 * unaltered seems like the kindest thing to do to apps.
153 assert(color0_write
->src
[0].is_ssa
);
154 nir_ssa_def
*color0
= color0_write
->src
[0].ssa
;
155 if (color0
->num_components
< 4)
158 assert(sample_mask_write
->src
[0].is_ssa
);
159 nir_ssa_def
*sample_mask
= sample_mask_write
->src
[0].ssa
;
161 if (sample_mask_write_first
) {
162 /* If the sample mask write comes before the write to color0, we need
163 * to move it because it's going to use the value from color0 to
164 * compute the sample mask.
166 nir_instr_remove(&sample_mask_write
->instr
);
167 nir_instr_insert(nir_after_instr(&color0_write
->instr
),
168 &sample_mask_write
->instr
);
172 nir_builder_init(&b
, impl
);
174 /* Combine dither_mask and the gl_SampleMask value */
175 b
.cursor
= nir_before_instr(&sample_mask_write
->instr
);
176 nir_ssa_def
*dither_mask
= build_dither_mask(&b
, color0
);
177 dither_mask
= nir_iand(&b
, sample_mask
, dither_mask
);
178 nir_instr_rewrite_src(&sample_mask_write
->instr
,
179 &sample_mask_write
->src
[0],
180 nir_src_for_ssa(dither_mask
));
182 nir_metadata_preserve(impl
, nir_metadata_block_index
|
183 nir_metadata_dominance
);
187 nir_metadata_preserve(impl
, nir_metadata_all
);