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11 * The above copyright notice and this permission notice (including the next
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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24 #include "compiler/nir/nir_builder.h"
28 * We need to compute alpha to coverage dithering manually in shader
29 * and replace sample mask store with the bitwise-AND of sample mask and
30 * alpha to coverage dithering.
32 * The following formula is used to compute final sample mask:
33 * m = int(16.0 * clamp(src0_alpha, 0.0, 1.0))
34 * dither_mask = 0x1111 * ((0xfea80 >> (m & ~3)) & 0xf) |
35 * 0x0808 * (m & 2) | 0x0100 * (m & 1)
36 * sample_mask = sample_mask & dither_mask
38 * It gives a number of ones proportional to the alpha for 2, 4, 8 or 16
39 * least significant bits of the result:
40 * 0.0000 0000000000000000
41 * 0.0625 0000000100000000
42 * 0.1250 0001000000010000
43 * 0.1875 0001000100010000
44 * 0.2500 1000100010001000
45 * 0.3125 1000100110001000
46 * 0.3750 1001100010011000
47 * 0.4375 1001100110011000
48 * 0.5000 1010101010101010
49 * 0.5625 1010101110101010
50 * 0.6250 1011101010111010
51 * 0.6875 1011101110111010
52 * 0.7500 1110111011101110
53 * 0.8125 1110111111101110
54 * 0.8750 1111111011111110
55 * 0.9375 1111111111111110
56 * 1.0000 1111111111111111
59 build_dither_mask(nir_builder
*b
, nir_ssa_def
*color
)
61 assert(color
->num_components
== 4);
62 nir_ssa_def
*alpha
= nir_channel(b
, color
, 3);
65 nir_f2i32(b
, nir_fmul_imm(b
, nir_fsat(b
, alpha
), 16.0));
68 nir_iand_imm(b
, nir_ushr(b
, nir_imm_int(b
, 0xfea80),
69 nir_iand_imm(b
, m
, ~3)),
72 nir_ssa_def
*part_b
= nir_iand_imm(b
, m
, 2);
73 nir_ssa_def
*part_c
= nir_iand_imm(b
, m
, 1);
75 return nir_ior(b
, nir_imul_imm(b
, part_a
, 0x1111),
76 nir_ior(b
, nir_imul_imm(b
, part_b
, 0x0808),
77 nir_imul_imm(b
, part_c
, 0x0100)));
81 brw_nir_lower_alpha_to_coverage(nir_shader
*shader
)
83 assert(shader
->info
.stage
== MESA_SHADER_FRAGMENT
);
84 nir_function_impl
*impl
= nir_shader_get_entrypoint(shader
);
86 const uint64_t outputs_written
= shader
->info
.outputs_written
;
87 if (!(outputs_written
& BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK
)) ||
88 !(outputs_written
& (BITFIELD64_BIT(FRAG_RESULT_COLOR
) |
89 BITFIELD64_BIT(FRAG_RESULT_DATA0
))))
92 nir_intrinsic_instr
*sample_mask_write
= NULL
;
93 nir_intrinsic_instr
*color0_write
= NULL
;
94 bool sample_mask_write_first
= false;
96 nir_foreach_block(block
, impl
) {
97 nir_foreach_instr_safe(instr
, block
) {
98 if (instr
->type
!= nir_instr_type_intrinsic
)
101 nir_intrinsic_instr
*intrin
= nir_instr_as_intrinsic(instr
);
102 if (intrin
->intrinsic
!= nir_intrinsic_store_output
)
105 /* We call nir_lower_io_to_temporaries to lower FS outputs to
106 * temporaries with a copy at the end so this should be the last
107 * block in the shader.
109 assert(block
->cf_node
.parent
== &impl
->cf_node
);
110 assert(nir_cf_node_is_last(&block
->cf_node
));
112 /* See store_output in fs_visitor::nir_emit_fs_intrinsic */
113 const unsigned store_offset
= nir_src_as_uint(intrin
->src
[1]);
114 const unsigned driver_location
= nir_intrinsic_base(intrin
) +
115 SET_FIELD(store_offset
, BRW_NIR_FRAG_OUTPUT_LOCATION
);
117 /* Extract the FRAG_RESULT */
118 const unsigned location
=
119 GET_FIELD(driver_location
, BRW_NIR_FRAG_OUTPUT_LOCATION
);
121 if (location
== FRAG_RESULT_SAMPLE_MASK
) {
122 assert(sample_mask_write
== NULL
);
123 sample_mask_write
= intrin
;
124 sample_mask_write_first
= (color0_write
== NULL
);
127 if (location
== FRAG_RESULT_COLOR
||
128 location
== FRAG_RESULT_DATA0
) {
129 assert(color0_write
== NULL
);
130 color0_write
= intrin
;
135 /* It's possible that shader_info may be out-of-date and the writes to
136 * either gl_SampleMask or the first color value may have been removed.
137 * This can happen if, for instance a nir_ssa_undef is written to the
138 * color value. In that case, just bail and don't do anything rather
141 if (color0_write
== NULL
|| sample_mask_write
== NULL
)
144 /* It's possible that the color value isn't actually a vec4. In this case,
145 * assuming an alpha of 1.0 and letting the sample mask pass through
146 * unaltered seems like the kindest thing to do to apps.
148 assert(color0_write
->src
[0].is_ssa
);
149 nir_ssa_def
*color0
= color0_write
->src
[0].ssa
;
150 if (color0
->num_components
< 4)
153 assert(sample_mask_write
->src
[0].is_ssa
);
154 nir_ssa_def
*sample_mask
= sample_mask_write
->src
[0].ssa
;
156 if (sample_mask_write_first
) {
157 /* If the sample mask write comes before the write to color0, we need
158 * to move it because it's going to use the value from color0 to
159 * compute the sample mask.
161 nir_instr_remove(&sample_mask_write
->instr
);
162 nir_instr_insert(nir_after_instr(&color0_write
->instr
),
163 &sample_mask_write
->instr
);
167 nir_builder_init(&b
, impl
);
169 /* Combine dither_mask and the gl_SampleMask value */
170 b
.cursor
= nir_before_instr(&sample_mask_write
->instr
);
171 nir_ssa_def
*dither_mask
= build_dither_mask(&b
, color0
);
172 dither_mask
= nir_iand(&b
, sample_mask
, dither_mask
);
173 nir_instr_rewrite_src(&sample_mask_write
->instr
,
174 &sample_mask_write
->src
[0],
175 nir_src_for_ssa(dither_mask
));
177 nir_metadata_preserve(impl
, nir_metadata_block_index
|
178 nir_metadata_dominance
);
182 nir_metadata_preserve(impl
, nir_metadata_all
);