src/intel/compiler/brw_vec4_gs_nir.cpp

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_vec4_gs_visitor.h"
  25
  26 namespace brw {
  27
  28 void
  29 vec4_gs_visitor::nir_setup_inputs()
  30 {
  31 }
  32
  33 void
  34 vec4_gs_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
  35 {
  36    dst_reg dest;
  37    src_reg src;
  38
  39    switch (instr->intrinsic) {
  40    case nir_intrinsic_load_per_vertex_input: {
  41       assert(nir_dest_bit_size(instr->dest) == 32);
  42       /* The EmitNoIndirectInput flag guarantees our vertex index will
  43        * be constant.  We should handle indirects someday.
  44        */
  45       const unsigned vertex = nir_src_as_uint(instr->src[0]);
  46       const unsigned offset_reg = nir_src_as_uint(instr->src[1]);
  47
  48       const unsigned input_array_stride = prog_data->urb_read_length * 2;
  49
  50       /* Make up a type...we have no way of knowing... */
  51       const glsl_type *const type = glsl_type::ivec(instr->num_components);
  52
  53       src = src_reg(ATTR, input_array_stride * vertex +
  54                     instr->const_index[0] + offset_reg,
  55                     type);
  56       src.swizzle = BRW_SWZ_COMP_INPUT(nir_intrinsic_component(instr));
  57
  58       dest = get_nir_dest(instr->dest, src.type);
  59       dest.writemask = brw_writemask_for_size(instr->num_components);
  60       emit(MOV(dest, src));
  61       break;
  62    }
  63
  64    case nir_intrinsic_load_input:
  65       unreachable("nir_lower_io should have produced per_vertex intrinsics");
  66
  67    case nir_intrinsic_emit_vertex_with_counter: {
  68       this->vertex_count =
  69          retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD);
  70       int stream_id = instr->const_index[0];
  71       gs_emit_vertex(stream_id);
  72       break;
  73    }
  74
  75    case nir_intrinsic_end_primitive_with_counter:
  76       this->vertex_count =
  77          retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD);
  78       gs_end_primitive();
  79       break;
  80
  81    case nir_intrinsic_set_vertex_count:
  82       this->vertex_count =
  83          retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD);
  84       break;
  85
  86    case nir_intrinsic_load_primitive_id:
  87       assert(gs_prog_data->include_primitive_id);
  88       dest = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_D);
  89       emit(MOV(dest, retype(brw_vec4_grf(1, 0), BRW_REGISTER_TYPE_D)));
  90       break;
  91
  92    case nir_intrinsic_load_invocation_id: {
  93       dest = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_D);
  94       if (gs_prog_data->invocations > 1)
  95          emit(GS_OPCODE_GET_INSTANCE_ID, dest);
  96       else
  97          emit(MOV(dest, brw_imm_ud(0)));
  98       break;
  99    }
 100
 101    default:
 102       vec4_visitor::nir_emit_intrinsic(instr);
 103    }
 104 }
 105 }