src/intel/compiler/brw_vec4_tcs.h

   1 /*
   2  * Copyright © 2013 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 /**
  25  * \file brw_vec4_tcs.h
  26  *
  27  * The vec4-mode tessellation control shader compiler backend.
  28  */
  29
  30 #ifndef BRW_VEC4_TCS_H
  31 #define BRW_VEC4_TCS_H
  32
  33 #include "brw_compiler.h"
  34 #include "brw_vec4.h"
  35
  36 #ifdef __cplusplus
  37 namespace brw {
  38
  39 class vec4_tcs_visitor : public vec4_visitor
  40 {
  41 public:
  42    vec4_tcs_visitor(const struct brw_compiler *compiler,
  43                     void *log_data,
  44                     const struct brw_tcs_prog_key *key,
  45                     struct brw_tcs_prog_data *prog_data,
  46                     const nir_shader *nir,
  47                     void *mem_ctx,
  48                     int shader_time_index,
  49                     const struct brw_vue_map *input_vue_map);
  50
  51 protected:
  52    virtual dst_reg *make_reg_for_system_value(int location);
  53    virtual void nir_setup_system_value_intrinsic(nir_intrinsic_instr *instr);
  54    virtual void setup_payload();
  55    virtual void emit_prolog();
  56    virtual void emit_thread_end();
  57
  58    virtual void nir_emit_intrinsic(nir_intrinsic_instr *instr);
  59
  60    void emit_input_urb_read(const dst_reg &dst,
  61                             const src_reg &vertex_index,
  62                             unsigned base_offset,
  63                             unsigned first_component,
  64                             const src_reg &indirect_offset);
  65    void emit_output_urb_read(const dst_reg &dst,
  66                              unsigned base_offset,
  67                              unsigned first_component,
  68                              const src_reg &indirect_offset);
  69
  70    void emit_urb_write(const src_reg &value, unsigned writemask,
  71                        unsigned base_offset, const src_reg &indirect_offset);
  72
  73    /* we do not use the normal end-of-shader URB write mechanism -- but every vec4 stage
  74     * must provide implementations of these:
  75     */
  76    virtual void emit_urb_write_header(int mrf) {}
  77    virtual vec4_instruction *emit_urb_write_opcode(bool complete) { return NULL; }
  78
  79    const struct brw_vue_map *input_vue_map;
  80
  81    const struct brw_tcs_prog_key *key;
  82    src_reg invocation_id;
  83 };
  84
  85 } /* namespace brw */
  86 #endif /* __cplusplus */
  87
  88 #endif /* BRW_VEC4_TCS_H */