i965: Move the back-end compiler to src/intel/compiler
[mesa.git] / src / intel / compiler / brw_vue_map.c
1 /*
2 * Copyright © 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 /**
25 * @file brw_vue_map.c
26 *
27 * This file computes the "VUE map" for a (non-fragment) shader stage, which
28 * describes the layout of its output varyings. The VUE map is used to match
29 * outputs from one stage with the inputs of the next.
30 *
31 * Largely, varyings can be placed however we like - producers/consumers simply
32 * have to agree on the layout. However, there is also a "VUE Header" that
33 * prescribes a fixed-layout for items that interact with fixed function
34 * hardware, such as the clipper and rasterizer.
35 *
36 * Authors:
37 * Paul Berry <stereotype441@gmail.com>
38 * Chris Forbes <chrisf@ijw.co.nz>
39 * Eric Anholt <eric@anholt.net>
40 */
41
42
43 #include "brw_compiler.h"
44 #include "common/gen_debug.h"
45
46 static inline void
47 assign_vue_slot(struct brw_vue_map *vue_map, int varying, int slot)
48 {
49 /* Make sure this varying hasn't been assigned a slot already */
50 assert (vue_map->varying_to_slot[varying] == -1);
51
52 vue_map->varying_to_slot[varying] = slot;
53 vue_map->slot_to_varying[slot] = varying;
54 }
55
56 /**
57 * Compute the VUE map for a shader stage.
58 */
59 void
60 brw_compute_vue_map(const struct gen_device_info *devinfo,
61 struct brw_vue_map *vue_map,
62 uint64_t slots_valid,
63 bool separate)
64 {
65 /* Keep using the packed/contiguous layout on old hardware - we only need
66 * the SSO layout when using geometry/tessellation shaders or 32 FS input
67 * varyings, which only exist on Gen >= 6. It's also a bit more efficient.
68 */
69 if (devinfo->gen < 6)
70 separate = false;
71
72 if (separate) {
73 /* In SSO mode, we don't know whether the adjacent stage will
74 * read/write gl_ClipDistance, which has a fixed slot location.
75 * We have to assume the worst and reserve a slot for it, or else
76 * the rest of our varyings will be off by a slot.
77 *
78 * Note that we don't have to worry about COL/BFC, as those built-in
79 * variables only exist in legacy GL, which only supports VS and FS.
80 */
81 slots_valid |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0);
82 slots_valid |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1);
83 }
84
85 vue_map->slots_valid = slots_valid;
86 vue_map->separate = separate;
87
88 /* gl_Layer and gl_ViewportIndex don't get their own varying slots -- they
89 * are stored in the first VUE slot (VARYING_SLOT_PSIZ).
90 */
91 slots_valid &= ~(VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT);
92
93 /* Make sure that the values we store in vue_map->varying_to_slot and
94 * vue_map->slot_to_varying won't overflow the signed chars that are used
95 * to store them. Note that since vue_map->slot_to_varying sometimes holds
96 * values equal to BRW_VARYING_SLOT_COUNT, we need to ensure that
97 * BRW_VARYING_SLOT_COUNT is <= 127, not 128.
98 */
99 STATIC_ASSERT(BRW_VARYING_SLOT_COUNT <= 127);
100
101 for (int i = 0; i < BRW_VARYING_SLOT_COUNT; ++i) {
102 vue_map->varying_to_slot[i] = -1;
103 vue_map->slot_to_varying[i] = BRW_VARYING_SLOT_PAD;
104 }
105
106 int slot = 0;
107
108 /* VUE header: format depends on chip generation and whether clipping is
109 * enabled.
110 *
111 * See the Sandybridge PRM, Volume 2 Part 1, section 1.5.1 (page 30),
112 * "Vertex URB Entry (VUE) Formats" which describes the VUE header layout.
113 */
114 if (devinfo->gen < 6) {
115 /* There are 8 dwords in VUE header pre-Ironlake:
116 * dword 0-3 is indices, point width, clip flags.
117 * dword 4-7 is ndc position
118 * dword 8-11 is the first vertex data.
119 *
120 * On Ironlake the VUE header is nominally 20 dwords, but the hardware
121 * will accept the same header layout as Gen4 [and should be a bit faster]
122 */
123 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++);
124 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++);
125 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++);
126 } else {
127 /* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
128 * dword 0-3 of the header is indices, point width, clip flags.
129 * dword 4-7 is the 4D space position
130 * dword 8-15 of the vertex header is the user clip distance if
131 * enabled.
132 * dword 8-11 or 16-19 is the first vertex element data we fill.
133 */
134 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++);
135 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++);
136 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0))
137 assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0, slot++);
138 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1))
139 assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1, slot++);
140
141 /* front and back colors need to be consecutive so that we can use
142 * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
143 * two-sided color.
144 */
145 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL0))
146 assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++);
147 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC0))
148 assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++);
149 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL1))
150 assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++);
151 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC1))
152 assign_vue_slot(vue_map, VARYING_SLOT_BFC1, slot++);
153 }
154
155 /* The hardware doesn't care about the rest of the vertex outputs, so we
156 * can assign them however we like. For normal programs, we simply assign
157 * them contiguously.
158 *
159 * For separate shader pipelines, we first assign built-in varyings
160 * contiguous slots. This works because ARB_separate_shader_objects
161 * requires that all shaders have matching built-in varying interface
162 * blocks. Next, we assign generic varyings based on their location
163 * (either explicit or linker assigned). This guarantees a fixed layout.
164 *
165 * We generally don't need to assign a slot for VARYING_SLOT_CLIP_VERTEX,
166 * since it's encoded as the clip distances by emit_clip_distances().
167 * However, it may be output by transform feedback, and we'd rather not
168 * recompute state when TF changes, so we just always include it.
169 */
170 uint64_t builtins = slots_valid & BITFIELD64_MASK(VARYING_SLOT_VAR0);
171 while (builtins != 0) {
172 const int varying = ffsll(builtins) - 1;
173 if (vue_map->varying_to_slot[varying] == -1) {
174 assign_vue_slot(vue_map, varying, slot++);
175 }
176 builtins &= ~BITFIELD64_BIT(varying);
177 }
178
179 const int first_generic_slot = slot;
180 uint64_t generics = slots_valid & ~BITFIELD64_MASK(VARYING_SLOT_VAR0);
181 while (generics != 0) {
182 const int varying = ffsll(generics) - 1;
183 if (separate) {
184 slot = first_generic_slot + varying - VARYING_SLOT_VAR0;
185 }
186 assign_vue_slot(vue_map, varying, slot++);
187 generics &= ~BITFIELD64_BIT(varying);
188 }
189
190 vue_map->num_slots = slot;
191 vue_map->num_per_vertex_slots = 0;
192 vue_map->num_per_patch_slots = 0;
193 }
194
195 /**
196 * Compute the VUE map for tessellation control shader outputs and
197 * tessellation evaluation shader inputs.
198 */
199 void
200 brw_compute_tess_vue_map(struct brw_vue_map *vue_map,
201 uint64_t vertex_slots,
202 uint32_t patch_slots)
203 {
204 /* I don't think anything actually uses this... */
205 vue_map->slots_valid = vertex_slots;
206
207 /* separate isn't really meaningful, but make sure it's initialized */
208 vue_map->separate = false;
209
210 vertex_slots &= ~(VARYING_BIT_TESS_LEVEL_OUTER |
211 VARYING_BIT_TESS_LEVEL_INNER);
212
213 /* Make sure that the values we store in vue_map->varying_to_slot and
214 * vue_map->slot_to_varying won't overflow the signed chars that are used
215 * to store them. Note that since vue_map->slot_to_varying sometimes holds
216 * values equal to VARYING_SLOT_TESS_MAX , we need to ensure that
217 * VARYING_SLOT_TESS_MAX is <= 127, not 128.
218 */
219 STATIC_ASSERT(VARYING_SLOT_TESS_MAX <= 127);
220
221 for (int i = 0; i < VARYING_SLOT_TESS_MAX ; ++i) {
222 vue_map->varying_to_slot[i] = -1;
223 vue_map->slot_to_varying[i] = BRW_VARYING_SLOT_PAD;
224 }
225
226 int slot = 0;
227
228 /* The first 8 DWords are reserved for the "Patch Header".
229 *
230 * VARYING_SLOT_TESS_LEVEL_OUTER / INNER live here, but the exact layout
231 * depends on the domain type. They might not be in slots 0 and 1 as
232 * described here, but pretending they're separate allows us to uniquely
233 * identify them by distinct slot locations.
234 */
235 assign_vue_slot(vue_map, VARYING_SLOT_TESS_LEVEL_INNER, slot++);
236 assign_vue_slot(vue_map, VARYING_SLOT_TESS_LEVEL_OUTER, slot++);
237
238 /* first assign per-patch varyings */
239 while (patch_slots != 0) {
240 const int varying = ffsll(patch_slots) - 1;
241 if (vue_map->varying_to_slot[varying + VARYING_SLOT_PATCH0] == -1) {
242 assign_vue_slot(vue_map, varying + VARYING_SLOT_PATCH0, slot++);
243 }
244 patch_slots &= ~BITFIELD64_BIT(varying);
245 }
246
247 /* apparently, including the patch header... */
248 vue_map->num_per_patch_slots = slot;
249
250 /* then assign per-vertex varyings for each vertex in our patch */
251 while (vertex_slots != 0) {
252 const int varying = ffsll(vertex_slots) - 1;
253 if (vue_map->varying_to_slot[varying] == -1) {
254 assign_vue_slot(vue_map, varying, slot++);
255 }
256 vertex_slots &= ~BITFIELD64_BIT(varying);
257 }
258
259 vue_map->num_per_vertex_slots = slot - vue_map->num_per_patch_slots;
260 vue_map->num_slots = slot;
261 }
262
263 static const char *
264 varying_name(brw_varying_slot slot)
265 {
266 assume(slot < BRW_VARYING_SLOT_COUNT);
267
268 if (slot < VARYING_SLOT_MAX)
269 return gl_varying_slot_name(slot);
270
271 static const char *brw_names[] = {
272 [BRW_VARYING_SLOT_NDC - VARYING_SLOT_MAX] = "BRW_VARYING_SLOT_NDC",
273 [BRW_VARYING_SLOT_PAD - VARYING_SLOT_MAX] = "BRW_VARYING_SLOT_PAD",
274 [BRW_VARYING_SLOT_PNTC - VARYING_SLOT_MAX] = "BRW_VARYING_SLOT_PNTC",
275 };
276
277 return brw_names[slot - VARYING_SLOT_MAX];
278 }
279
280 void
281 brw_print_vue_map(FILE *fp, const struct brw_vue_map *vue_map)
282 {
283 if (vue_map->num_per_vertex_slots > 0 || vue_map->num_per_patch_slots > 0) {
284 fprintf(fp, "PUE map (%d slots, %d/patch, %d/vertex, %s)\n",
285 vue_map->num_slots,
286 vue_map->num_per_patch_slots,
287 vue_map->num_per_vertex_slots,
288 vue_map->separate ? "SSO" : "non-SSO");
289 for (int i = 0; i < vue_map->num_slots; i++) {
290 if (vue_map->slot_to_varying[i] >= VARYING_SLOT_PATCH0) {
291 fprintf(fp, " [%d] VARYING_SLOT_PATCH%d\n", i,
292 vue_map->slot_to_varying[i] - VARYING_SLOT_PATCH0);
293 } else {
294 fprintf(fp, " [%d] %s\n", i,
295 varying_name(vue_map->slot_to_varying[i]));
296 }
297 }
298 } else {
299 fprintf(fp, "VUE map (%d slots, %s)\n",
300 vue_map->num_slots, vue_map->separate ? "SSO" : "non-SSO");
301 for (int i = 0; i < vue_map->num_slots; i++) {
302 fprintf(fp, " [%d] %s\n", i,
303 varying_name(vue_map->slot_to_varying[i]));
304 }
305 }
306 fprintf(fp, "\n");
307 }