2 * Copyright © 2019 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include <gtest/gtest.h>
27 #include "program/program.h"
31 class scoreboard_test
: public ::testing::Test
{
35 struct brw_compiler
*compiler
;
36 struct gen_device_info
*devinfo
;
37 struct gl_context
*ctx
;
38 struct brw_wm_prog_data
*prog_data
;
39 struct gl_shader_program
*shader_prog
;
43 void scoreboard_test::SetUp()
45 ctx
= (struct gl_context
*)calloc(1, sizeof(*ctx
));
46 compiler
= (struct brw_compiler
*)calloc(1, sizeof(*compiler
));
47 devinfo
= (struct gen_device_info
*)calloc(1, sizeof(*devinfo
));
48 compiler
->devinfo
= devinfo
;
50 prog_data
= ralloc(NULL
, struct brw_wm_prog_data
);
52 nir_shader_create(NULL
, MESA_SHADER_FRAGMENT
, NULL
, NULL
);
54 v
= new fs_visitor(compiler
, NULL
, NULL
, NULL
, &prog_data
->base
, shader
, 8, -1);
60 instruction(bblock_t
*block
, int num
)
62 fs_inst
*inst
= (fs_inst
*)block
->start();
63 for (int i
= 0; i
< num
; i
++) {
64 inst
= (fs_inst
*)inst
->next
;
70 lower_scoreboard(fs_visitor
*v
)
72 const bool print
= getenv("TEST_DEBUG");
75 fprintf(stderr
, "= Before =\n");
79 v
->lower_scoreboard();
82 fprintf(stderr
, "\n= After =\n");
88 emit_SEND(const fs_builder
&bld
, const fs_reg
&dst
,
89 const fs_reg
&desc
, const fs_reg
&payload
)
91 fs_inst
*inst
= bld
.emit(SHADER_OPCODE_SEND
, dst
, desc
, desc
, payload
);
96 bool operator ==(const tgl_swsb
&a
, const tgl_swsb
&b
)
98 return a
.mode
== b
.mode
&&
99 a
.regdist
== b
.regdist
&&
100 (a
.mode
== TGL_SBID_NULL
|| a
.sbid
== b
.sbid
);
103 std::ostream
&operator<<(std::ostream
&os
, const tgl_swsb
&swsb
) {
105 os
<< "@" << swsb
.regdist
;
110 os
<< "$" << swsb
.sbid
;
111 if (swsb
.mode
& TGL_SBID_DST
)
113 if (swsb
.mode
& TGL_SBID_SRC
)
120 TEST_F(scoreboard_test
, RAW_inorder_inorder
)
122 const fs_builder
&bld
= v
->bld
;
124 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
125 g
[i
] = v
->vgrf(glsl_type::int_type
);
127 fs_reg x
= v
->vgrf(glsl_type::int_type
);
128 fs_reg y
= v
->vgrf(glsl_type::int_type
);
129 bld
.ADD( x
, g
[1], g
[2]);
130 bld
.MUL( y
, g
[3], g
[4]);
134 bblock_t
*block0
= v
->cfg
->blocks
[0];
135 ASSERT_EQ(0, block0
->start_ip
);
136 ASSERT_EQ(2, block0
->end_ip
);
139 ASSERT_EQ(0, block0
->start_ip
);
140 ASSERT_EQ(2, block0
->end_ip
);
142 EXPECT_EQ(instruction(block0
, 0)->sched
, tgl_swsb_null());
143 EXPECT_EQ(instruction(block0
, 1)->sched
, tgl_swsb_null());
144 EXPECT_EQ(instruction(block0
, 2)->sched
, tgl_swsb_regdist(1));
147 TEST_F(scoreboard_test
, RAW_inorder_outoforder
)
149 const fs_builder
&bld
= v
->bld
;
151 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
152 g
[i
] = v
->vgrf(glsl_type::int_type
);
154 fs_reg x
= v
->vgrf(glsl_type::int_type
);
155 bld
.ADD( x
, g
[1], g
[2]);
156 bld
.MUL( g
[3], g
[4], g
[5]);
157 emit_SEND(bld
, g
[6], g
[7], x
);
160 bblock_t
*block0
= v
->cfg
->blocks
[0];
161 ASSERT_EQ(0, block0
->start_ip
);
162 ASSERT_EQ(2, block0
->end_ip
);
165 ASSERT_EQ(0, block0
->start_ip
);
166 ASSERT_EQ(2, block0
->end_ip
);
168 EXPECT_EQ(instruction(block0
, 0)->sched
, tgl_swsb_null());
169 EXPECT_EQ(instruction(block0
, 1)->sched
, tgl_swsb_null());
170 EXPECT_EQ(instruction(block0
, 2)->sched
,
171 (tgl_swsb
{ .regdist
= 2, .sbid
= 0, .mode
= TGL_SBID_SET
}));
174 TEST_F(scoreboard_test
, RAW_outoforder_inorder
)
176 const fs_builder
&bld
= v
->bld
;
178 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
179 g
[i
] = v
->vgrf(glsl_type::int_type
);
181 fs_reg x
= v
->vgrf(glsl_type::int_type
);
182 fs_reg y
= v
->vgrf(glsl_type::int_type
);
183 emit_SEND(bld
, x
, g
[1], g
[2]);
184 bld
.MUL( y
, g
[3], g
[4]);
185 bld
.AND( g
[5], x
, y
);
188 bblock_t
*block0
= v
->cfg
->blocks
[0];
189 ASSERT_EQ(0, block0
->start_ip
);
190 ASSERT_EQ(2, block0
->end_ip
);
193 ASSERT_EQ(0, block0
->start_ip
);
194 ASSERT_EQ(2, block0
->end_ip
);
196 EXPECT_EQ(instruction(block0
, 0)->sched
, tgl_swsb_sbid(TGL_SBID_SET
, 0));
197 EXPECT_EQ(instruction(block0
, 1)->sched
, tgl_swsb_null());
198 EXPECT_EQ(instruction(block0
, 2)->sched
,
199 (tgl_swsb
{ .regdist
= 1, .sbid
= 0, .mode
= TGL_SBID_DST
}));
202 TEST_F(scoreboard_test
, RAW_outoforder_outoforder
)
204 const fs_builder
&bld
= v
->bld
;
206 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
207 g
[i
] = v
->vgrf(glsl_type::int_type
);
209 /* The second SEND depends on the first, and would need to refer to two
210 * SBIDs. Since it is not possible we expect a SYNC instruction to be
213 fs_reg x
= v
->vgrf(glsl_type::int_type
);
214 emit_SEND(bld
, x
, g
[1], g
[2]);
215 emit_SEND(bld
, g
[3], x
, g
[4])->sfid
++;
218 bblock_t
*block0
= v
->cfg
->blocks
[0];
219 ASSERT_EQ(0, block0
->start_ip
);
220 ASSERT_EQ(1, block0
->end_ip
);
223 ASSERT_EQ(0, block0
->start_ip
);
224 ASSERT_EQ(2, block0
->end_ip
);
226 EXPECT_EQ(instruction(block0
, 0)->sched
, tgl_swsb_sbid(TGL_SBID_SET
, 0));
228 fs_inst
*sync
= instruction(block0
, 1);
229 EXPECT_EQ(sync
->opcode
, BRW_OPCODE_SYNC
);
230 EXPECT_EQ(sync
->sched
, tgl_swsb_sbid(TGL_SBID_DST
, 0));
232 EXPECT_EQ(instruction(block0
, 2)->sched
, tgl_swsb_sbid(TGL_SBID_SET
, 1));
235 TEST_F(scoreboard_test
, WAR_inorder_inorder
)
237 const fs_builder
&bld
= v
->bld
;
239 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
240 g
[i
] = v
->vgrf(glsl_type::int_type
);
242 fs_reg x
= v
->vgrf(glsl_type::int_type
);
243 bld
.ADD(g
[1], x
, g
[2]);
244 bld
.MUL(g
[3], g
[4], g
[5]);
245 bld
.AND( x
, g
[6], g
[7]);
248 bblock_t
*block0
= v
->cfg
->blocks
[0];
249 ASSERT_EQ(0, block0
->start_ip
);
250 ASSERT_EQ(2, block0
->end_ip
);
253 ASSERT_EQ(0, block0
->start_ip
);
254 ASSERT_EQ(2, block0
->end_ip
);
256 EXPECT_EQ(instruction(block0
, 0)->sched
, tgl_swsb_null());
257 EXPECT_EQ(instruction(block0
, 1)->sched
, tgl_swsb_null());
258 EXPECT_EQ(instruction(block0
, 2)->sched
, tgl_swsb_null());
261 TEST_F(scoreboard_test
, WAR_inorder_outoforder
)
263 const fs_builder
&bld
= v
->bld
;
265 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
266 g
[i
] = v
->vgrf(glsl_type::int_type
);
268 fs_reg x
= v
->vgrf(glsl_type::int_type
);
269 bld
.ADD( g
[1], x
, g
[2]);
270 bld
.MUL( g
[3], g
[4], g
[5]);
271 emit_SEND(bld
, x
, g
[6], g
[7]);
274 bblock_t
*block0
= v
->cfg
->blocks
[0];
275 ASSERT_EQ(0, block0
->start_ip
);
276 ASSERT_EQ(2, block0
->end_ip
);
279 ASSERT_EQ(0, block0
->start_ip
);
280 ASSERT_EQ(2, block0
->end_ip
);
282 EXPECT_EQ(instruction(block0
, 0)->sched
, tgl_swsb_null());
283 EXPECT_EQ(instruction(block0
, 1)->sched
, tgl_swsb_null());
284 EXPECT_EQ(instruction(block0
, 2)->sched
,
285 (tgl_swsb
{ .regdist
= 2, .sbid
= 0, .mode
= TGL_SBID_SET
}));
288 TEST_F(scoreboard_test
, WAR_outoforder_inorder
)
290 const fs_builder
&bld
= v
->bld
;
292 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
293 g
[i
] = v
->vgrf(glsl_type::int_type
);
295 fs_reg x
= v
->vgrf(glsl_type::int_type
);
296 emit_SEND(bld
, g
[1], g
[2], x
);
297 bld
.MUL( g
[4], g
[5], g
[6]);
298 bld
.AND( x
, g
[7], g
[8]);
301 bblock_t
*block0
= v
->cfg
->blocks
[0];
302 ASSERT_EQ(0, block0
->start_ip
);
303 ASSERT_EQ(2, block0
->end_ip
);
306 ASSERT_EQ(0, block0
->start_ip
);
307 ASSERT_EQ(2, block0
->end_ip
);
309 EXPECT_EQ(instruction(block0
, 0)->sched
, tgl_swsb_sbid(TGL_SBID_SET
, 0));
310 EXPECT_EQ(instruction(block0
, 1)->sched
, tgl_swsb_null());
311 EXPECT_EQ(instruction(block0
, 2)->sched
, tgl_swsb_sbid(TGL_SBID_SRC
, 0));
314 TEST_F(scoreboard_test
, WAR_outoforder_outoforder
)
316 const fs_builder
&bld
= v
->bld
;
318 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
319 g
[i
] = v
->vgrf(glsl_type::int_type
);
321 fs_reg x
= v
->vgrf(glsl_type::int_type
);
322 emit_SEND(bld
, g
[1], g
[2], x
);
323 emit_SEND(bld
, x
, g
[3], g
[4])->sfid
++;
326 bblock_t
*block0
= v
->cfg
->blocks
[0];
327 ASSERT_EQ(0, block0
->start_ip
);
328 ASSERT_EQ(1, block0
->end_ip
);
331 ASSERT_EQ(0, block0
->start_ip
);
332 ASSERT_EQ(2, block0
->end_ip
);
334 EXPECT_EQ(instruction(block0
, 0)->sched
, tgl_swsb_sbid(TGL_SBID_SET
, 0));
336 fs_inst
*sync
= instruction(block0
, 1);
337 EXPECT_EQ(sync
->opcode
, BRW_OPCODE_SYNC
);
338 EXPECT_EQ(sync
->sched
, tgl_swsb_sbid(TGL_SBID_SRC
, 0));
340 EXPECT_EQ(instruction(block0
, 2)->sched
, tgl_swsb_sbid(TGL_SBID_SET
, 1));
343 TEST_F(scoreboard_test
, WAW_inorder_inorder
)
345 const fs_builder
&bld
= v
->bld
;
347 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
348 g
[i
] = v
->vgrf(glsl_type::int_type
);
350 fs_reg x
= v
->vgrf(glsl_type::int_type
);
351 bld
.ADD( x
, g
[1], g
[2]);
352 bld
.MUL(g
[3], g
[4], g
[5]);
353 bld
.AND( x
, g
[6], g
[7]);
356 bblock_t
*block0
= v
->cfg
->blocks
[0];
357 ASSERT_EQ(0, block0
->start_ip
);
358 ASSERT_EQ(2, block0
->end_ip
);
361 ASSERT_EQ(0, block0
->start_ip
);
362 ASSERT_EQ(2, block0
->end_ip
);
364 EXPECT_EQ(instruction(block0
, 0)->sched
, tgl_swsb_null());
365 EXPECT_EQ(instruction(block0
, 1)->sched
, tgl_swsb_null());
367 /* NOTE: We only need this RegDist if a long instruction is followed by a
368 * short one. The pass is currently conservative about this and adding the
371 EXPECT_EQ(instruction(block0
, 2)->sched
, tgl_swsb_regdist(2));
374 TEST_F(scoreboard_test
, WAW_inorder_outoforder
)
376 const fs_builder
&bld
= v
->bld
;
378 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
379 g
[i
] = v
->vgrf(glsl_type::int_type
);
381 fs_reg x
= v
->vgrf(glsl_type::int_type
);
382 bld
.ADD( x
, g
[1], g
[2]);
383 bld
.MUL( g
[3], g
[4], g
[5]);
384 emit_SEND(bld
, x
, g
[6], g
[7]);
387 bblock_t
*block0
= v
->cfg
->blocks
[0];
388 ASSERT_EQ(0, block0
->start_ip
);
389 ASSERT_EQ(2, block0
->end_ip
);
392 ASSERT_EQ(0, block0
->start_ip
);
393 ASSERT_EQ(2, block0
->end_ip
);
395 EXPECT_EQ(instruction(block0
, 0)->sched
, tgl_swsb_null());
396 EXPECT_EQ(instruction(block0
, 1)->sched
, tgl_swsb_null());
397 EXPECT_EQ(instruction(block0
, 2)->sched
,
398 (tgl_swsb
{ .regdist
= 2, .sbid
= 0, .mode
= TGL_SBID_SET
}));
401 TEST_F(scoreboard_test
, WAW_outoforder_inorder
)
403 const fs_builder
&bld
= v
->bld
;
405 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
406 g
[i
] = v
->vgrf(glsl_type::int_type
);
408 fs_reg x
= v
->vgrf(glsl_type::int_type
);
409 emit_SEND(bld
, x
, g
[1], g
[2]);
410 bld
.MUL( g
[3], g
[4], g
[5]);
411 bld
.AND( x
, g
[6], g
[7]);
414 bblock_t
*block0
= v
->cfg
->blocks
[0];
415 ASSERT_EQ(0, block0
->start_ip
);
416 ASSERT_EQ(2, block0
->end_ip
);
419 ASSERT_EQ(0, block0
->start_ip
);
420 ASSERT_EQ(2, block0
->end_ip
);
422 EXPECT_EQ(instruction(block0
, 0)->sched
, tgl_swsb_sbid(TGL_SBID_SET
, 0));
423 EXPECT_EQ(instruction(block0
, 1)->sched
, tgl_swsb_null());
424 EXPECT_EQ(instruction(block0
, 2)->sched
, tgl_swsb_sbid(TGL_SBID_DST
, 0));
427 TEST_F(scoreboard_test
, WAW_outoforder_outoforder
)
429 const fs_builder
&bld
= v
->bld
;
431 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
432 g
[i
] = v
->vgrf(glsl_type::int_type
);
434 fs_reg x
= v
->vgrf(glsl_type::int_type
);
435 emit_SEND(bld
, x
, g
[1], g
[2]);
436 emit_SEND(bld
, x
, g
[3], g
[4])->sfid
++;
439 bblock_t
*block0
= v
->cfg
->blocks
[0];
440 ASSERT_EQ(0, block0
->start_ip
);
441 ASSERT_EQ(1, block0
->end_ip
);
444 ASSERT_EQ(0, block0
->start_ip
);
445 ASSERT_EQ(2, block0
->end_ip
);
447 EXPECT_EQ(instruction(block0
, 0)->sched
, tgl_swsb_sbid(TGL_SBID_SET
, 0));
449 fs_inst
*sync
= instruction(block0
, 1);
450 EXPECT_EQ(sync
->opcode
, BRW_OPCODE_SYNC
);
451 EXPECT_EQ(sync
->sched
, tgl_swsb_sbid(TGL_SBID_DST
, 0));
453 EXPECT_EQ(instruction(block0
, 2)->sched
, tgl_swsb_sbid(TGL_SBID_SET
, 1));
457 TEST_F(scoreboard_test
, loop1
)
459 const fs_builder
&bld
= v
->bld
;
461 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
462 g
[i
] = v
->vgrf(glsl_type::int_type
);
464 fs_reg x
= v
->vgrf(glsl_type::int_type
);
465 bld
.XOR( x
, g
[1], g
[2]);
467 bld
.emit(BRW_OPCODE_DO
);
469 bld
.ADD( x
, g
[1], g
[2]);
470 bld
.emit(BRW_OPCODE_WHILE
)->predicate
= BRW_PREDICATE_NORMAL
;
472 bld
.MUL( x
, g
[1], g
[2]);
477 bblock_t
*body
= v
->cfg
->blocks
[2];
478 fs_inst
*add
= instruction(body
, 0);
479 EXPECT_EQ(add
->opcode
, BRW_OPCODE_ADD
);
480 EXPECT_EQ(add
->sched
, tgl_swsb_regdist(1));
482 bblock_t
*last_block
= v
->cfg
->blocks
[3];
483 fs_inst
*mul
= instruction(last_block
, 0);
484 EXPECT_EQ(mul
->opcode
, BRW_OPCODE_MUL
);
485 EXPECT_EQ(mul
->sched
, tgl_swsb_regdist(1));
488 TEST_F(scoreboard_test
, loop2
)
490 const fs_builder
&bld
= v
->bld
;
492 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
493 g
[i
] = v
->vgrf(glsl_type::int_type
);
495 fs_reg x
= v
->vgrf(glsl_type::int_type
);
496 bld
.XOR( x
, g
[1], g
[2]);
497 bld
.XOR(g
[3], g
[1], g
[2]);
498 bld
.XOR(g
[4], g
[1], g
[2]);
499 bld
.XOR(g
[5], g
[1], g
[2]);
501 bld
.emit(BRW_OPCODE_DO
);
503 bld
.ADD( x
, g
[1], g
[2]);
504 bld
.emit(BRW_OPCODE_WHILE
)->predicate
= BRW_PREDICATE_NORMAL
;
506 bld
.MUL( x
, g
[1], g
[2]);
511 /* Now the write in ADD has the tightest RegDist for both ADD and MUL. */
513 bblock_t
*body
= v
->cfg
->blocks
[2];
514 fs_inst
*add
= instruction(body
, 0);
515 EXPECT_EQ(add
->opcode
, BRW_OPCODE_ADD
);
516 EXPECT_EQ(add
->sched
, tgl_swsb_regdist(2));
518 bblock_t
*last_block
= v
->cfg
->blocks
[3];
519 fs_inst
*mul
= instruction(last_block
, 0);
520 EXPECT_EQ(mul
->opcode
, BRW_OPCODE_MUL
);
521 EXPECT_EQ(mul
->sched
, tgl_swsb_regdist(2));
524 TEST_F(scoreboard_test
, loop3
)
526 const fs_builder
&bld
= v
->bld
;
528 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
529 g
[i
] = v
->vgrf(glsl_type::int_type
);
531 fs_reg x
= v
->vgrf(glsl_type::int_type
);
532 bld
.XOR( x
, g
[1], g
[2]);
534 bld
.emit(BRW_OPCODE_DO
);
536 /* For the ADD in the loop body this extra distance will always apply. */
537 bld
.XOR(g
[3], g
[1], g
[2]);
538 bld
.XOR(g
[4], g
[1], g
[2]);
539 bld
.XOR(g
[5], g
[1], g
[2]);
540 bld
.XOR(g
[6], g
[1], g
[2]);
542 bld
.ADD( x
, g
[1], g
[2]);
543 bld
.emit(BRW_OPCODE_WHILE
)->predicate
= BRW_PREDICATE_NORMAL
;
545 bld
.MUL( x
, g
[1], g
[2]);
550 bblock_t
*body
= v
->cfg
->blocks
[2];
551 fs_inst
*add
= instruction(body
, 4);
552 EXPECT_EQ(add
->opcode
, BRW_OPCODE_ADD
);
553 EXPECT_EQ(add
->sched
, tgl_swsb_regdist(5));
555 bblock_t
*last_block
= v
->cfg
->blocks
[3];
556 fs_inst
*mul
= instruction(last_block
, 0);
557 EXPECT_EQ(mul
->opcode
, BRW_OPCODE_MUL
);
558 EXPECT_EQ(mul
->sched
, tgl_swsb_regdist(1));
562 TEST_F(scoreboard_test
, conditional1
)
564 const fs_builder
&bld
= v
->bld
;
566 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
567 g
[i
] = v
->vgrf(glsl_type::int_type
);
569 fs_reg x
= v
->vgrf(glsl_type::int_type
);
570 bld
.XOR( x
, g
[1], g
[2]);
571 bld
.emit(BRW_OPCODE_IF
);
573 bld
.ADD( x
, g
[1], g
[2]);
575 bld
.emit(BRW_OPCODE_ENDIF
);
576 bld
.MUL( x
, g
[1], g
[2]);
581 bblock_t
*body
= v
->cfg
->blocks
[1];
582 fs_inst
*add
= instruction(body
, 0);
583 EXPECT_EQ(add
->opcode
, BRW_OPCODE_ADD
);
584 EXPECT_EQ(add
->sched
, tgl_swsb_regdist(2));
586 bblock_t
*last_block
= v
->cfg
->blocks
[2];
587 fs_inst
*mul
= instruction(last_block
, 1);
588 EXPECT_EQ(mul
->opcode
, BRW_OPCODE_MUL
);
589 EXPECT_EQ(mul
->sched
, tgl_swsb_regdist(2));
592 TEST_F(scoreboard_test
, conditional2
)
594 const fs_builder
&bld
= v
->bld
;
596 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
597 g
[i
] = v
->vgrf(glsl_type::int_type
);
599 fs_reg x
= v
->vgrf(glsl_type::int_type
);
600 bld
.XOR( x
, g
[1], g
[2]);
601 bld
.XOR(g
[3], g
[1], g
[2]);
602 bld
.XOR(g
[4], g
[1], g
[2]);
603 bld
.XOR(g
[5], g
[1], g
[2]);
604 bld
.emit(BRW_OPCODE_IF
);
606 bld
.ADD( x
, g
[1], g
[2]);
608 bld
.emit(BRW_OPCODE_ENDIF
);
609 bld
.MUL( x
, g
[1], g
[2]);
614 bblock_t
*body
= v
->cfg
->blocks
[1];
615 fs_inst
*add
= instruction(body
, 0);
616 EXPECT_EQ(add
->opcode
, BRW_OPCODE_ADD
);
617 EXPECT_EQ(add
->sched
, tgl_swsb_regdist(5));
619 bblock_t
*last_block
= v
->cfg
->blocks
[2];
620 fs_inst
*mul
= instruction(last_block
, 1);
621 EXPECT_EQ(mul
->opcode
, BRW_OPCODE_MUL
);
622 EXPECT_EQ(mul
->sched
, tgl_swsb_regdist(2));
625 TEST_F(scoreboard_test
, conditional3
)
627 const fs_builder
&bld
= v
->bld
;
629 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
630 g
[i
] = v
->vgrf(glsl_type::int_type
);
632 fs_reg x
= v
->vgrf(glsl_type::int_type
);
633 bld
.XOR( x
, g
[1], g
[2]);
634 bld
.emit(BRW_OPCODE_IF
);
636 bld
.XOR(g
[3], g
[1], g
[2]);
637 bld
.XOR(g
[4], g
[1], g
[2]);
638 bld
.XOR(g
[5], g
[1], g
[2]);
639 bld
.ADD( x
, g
[1], g
[2]);
641 bld
.emit(BRW_OPCODE_ENDIF
);
642 bld
.MUL( x
, g
[1], g
[2]);
647 bblock_t
*body
= v
->cfg
->blocks
[1];
648 fs_inst
*add
= instruction(body
, 3);
649 EXPECT_EQ(add
->opcode
, BRW_OPCODE_ADD
);
650 EXPECT_EQ(add
->sched
, tgl_swsb_regdist(5));
652 bblock_t
*last_block
= v
->cfg
->blocks
[2];
653 fs_inst
*mul
= instruction(last_block
, 1);
654 EXPECT_EQ(mul
->opcode
, BRW_OPCODE_MUL
);
655 EXPECT_EQ(mul
->sched
, tgl_swsb_regdist(2));
658 TEST_F(scoreboard_test
, conditional4
)
660 const fs_builder
&bld
= v
->bld
;
662 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
663 g
[i
] = v
->vgrf(glsl_type::int_type
);
665 fs_reg x
= v
->vgrf(glsl_type::int_type
);
666 bld
.XOR( x
, g
[1], g
[2]);
667 bld
.emit(BRW_OPCODE_IF
);
669 bld
.ADD( x
, g
[1], g
[2]);
670 bld
.XOR(g
[3], g
[1], g
[2]);
671 bld
.XOR(g
[4], g
[1], g
[2]);
672 bld
.XOR(g
[5], g
[1], g
[2]);
674 bld
.emit(BRW_OPCODE_ENDIF
);
675 bld
.MUL( x
, g
[1], g
[2]);
680 bblock_t
*body
= v
->cfg
->blocks
[1];
681 fs_inst
*add
= instruction(body
, 0);
682 EXPECT_EQ(add
->opcode
, BRW_OPCODE_ADD
);
683 EXPECT_EQ(add
->sched
, tgl_swsb_regdist(2));
685 bblock_t
*last_block
= v
->cfg
->blocks
[2];
686 fs_inst
*mul
= instruction(last_block
, 1);
687 EXPECT_EQ(mul
->opcode
, BRW_OPCODE_MUL
);
688 EXPECT_EQ(mul
->sched
, tgl_swsb_regdist(3));
691 TEST_F(scoreboard_test
, conditional5
)
693 const fs_builder
&bld
= v
->bld
;
695 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
696 g
[i
] = v
->vgrf(glsl_type::int_type
);
698 fs_reg x
= v
->vgrf(glsl_type::int_type
);
699 bld
.XOR( x
, g
[1], g
[2]);
700 bld
.emit(BRW_OPCODE_IF
);
702 bld
.ADD( x
, g
[1], g
[2]);
703 bld
.emit(BRW_OPCODE_ELSE
);
705 bld
.ROL( x
, g
[1], g
[2]);
707 bld
.emit(BRW_OPCODE_ENDIF
);
708 bld
.MUL( x
, g
[1], g
[2]);
713 bblock_t
*then_body
= v
->cfg
->blocks
[1];
714 fs_inst
*add
= instruction(then_body
, 0);
715 EXPECT_EQ(add
->opcode
, BRW_OPCODE_ADD
);
716 EXPECT_EQ(add
->sched
, tgl_swsb_regdist(2));
718 bblock_t
*else_body
= v
->cfg
->blocks
[2];
719 fs_inst
*rol
= instruction(else_body
, 0);
720 EXPECT_EQ(rol
->opcode
, BRW_OPCODE_ROL
);
721 EXPECT_EQ(rol
->sched
, tgl_swsb_regdist(2));
723 bblock_t
*last_block
= v
->cfg
->blocks
[3];
724 fs_inst
*mul
= instruction(last_block
, 1);
725 EXPECT_EQ(mul
->opcode
, BRW_OPCODE_MUL
);
726 EXPECT_EQ(mul
->sched
, tgl_swsb_regdist(2));
729 TEST_F(scoreboard_test
, conditional6
)
731 const fs_builder
&bld
= v
->bld
;
733 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
734 g
[i
] = v
->vgrf(glsl_type::int_type
);
736 fs_reg x
= v
->vgrf(glsl_type::int_type
);
737 bld
.XOR( x
, g
[1], g
[2]);
738 bld
.emit(BRW_OPCODE_IF
);
740 bld
.XOR(g
[3], g
[1], g
[2]);
741 bld
.XOR(g
[4], g
[1], g
[2]);
742 bld
.XOR(g
[5], g
[1], g
[2]);
743 bld
.ADD( x
, g
[1], g
[2]);
744 bld
.emit(BRW_OPCODE_ELSE
);
746 bld
.XOR(g
[6], g
[1], g
[2]);
747 bld
.XOR(g
[7], g
[1], g
[2]);
748 bld
.XOR(g
[8], g
[1], g
[2]);
749 bld
.XOR(g
[9], g
[1], g
[2]);
750 bld
.ROL( x
, g
[1], g
[2]);
752 bld
.emit(BRW_OPCODE_ENDIF
);
753 bld
.MUL( x
, g
[1], g
[2]);
758 bblock_t
*then_body
= v
->cfg
->blocks
[1];
759 fs_inst
*add
= instruction(then_body
, 3);
760 EXPECT_EQ(add
->opcode
, BRW_OPCODE_ADD
);
761 EXPECT_EQ(add
->sched
, tgl_swsb_regdist(5));
763 bblock_t
*else_body
= v
->cfg
->blocks
[2];
764 fs_inst
*rol
= instruction(else_body
, 4);
765 EXPECT_EQ(rol
->opcode
, BRW_OPCODE_ROL
);
766 EXPECT_EQ(rol
->sched
, tgl_swsb_regdist(6));
768 bblock_t
*last_block
= v
->cfg
->blocks
[3];
769 fs_inst
*mul
= instruction(last_block
, 1);
770 EXPECT_EQ(mul
->opcode
, BRW_OPCODE_MUL
);
771 EXPECT_EQ(mul
->sched
, tgl_swsb_regdist(2));
774 TEST_F(scoreboard_test
, conditional7
)
776 const fs_builder
&bld
= v
->bld
;
778 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
779 g
[i
] = v
->vgrf(glsl_type::int_type
);
781 fs_reg x
= v
->vgrf(glsl_type::int_type
);
782 bld
.XOR( x
, g
[1], g
[2]);
783 bld
.emit(BRW_OPCODE_IF
);
785 bld
.ADD( x
, g
[1], g
[2]);
786 bld
.XOR(g
[3], g
[1], g
[2]);
787 bld
.XOR(g
[4], g
[1], g
[2]);
788 bld
.XOR(g
[5], g
[1], g
[2]);
789 bld
.emit(BRW_OPCODE_ELSE
);
791 bld
.ROL( x
, g
[1], g
[2]);
792 bld
.XOR(g
[6], g
[1], g
[2]);
793 bld
.XOR(g
[7], g
[1], g
[2]);
794 bld
.XOR(g
[8], g
[1], g
[2]);
795 bld
.XOR(g
[9], g
[1], g
[2]);
797 bld
.emit(BRW_OPCODE_ENDIF
);
798 bld
.MUL( x
, g
[1], g
[2]);
803 bblock_t
*then_body
= v
->cfg
->blocks
[1];
804 fs_inst
*add
= instruction(then_body
, 0);
805 EXPECT_EQ(add
->opcode
, BRW_OPCODE_ADD
);
806 EXPECT_EQ(add
->sched
, tgl_swsb_regdist(2));
808 bblock_t
*else_body
= v
->cfg
->blocks
[2];
809 fs_inst
*rol
= instruction(else_body
, 0);
810 EXPECT_EQ(rol
->opcode
, BRW_OPCODE_ROL
);
811 EXPECT_EQ(rol
->sched
, tgl_swsb_regdist(2));
813 bblock_t
*last_block
= v
->cfg
->blocks
[3];
814 fs_inst
*mul
= instruction(last_block
, 1);
815 EXPECT_EQ(mul
->opcode
, BRW_OPCODE_MUL
);
816 EXPECT_EQ(mul
->sched
, tgl_swsb_regdist(6));
819 TEST_F(scoreboard_test
, conditional8
)
821 const fs_builder
&bld
= v
->bld
;
823 for (unsigned i
= 0; i
< ARRAY_SIZE(g
); i
++)
824 g
[i
] = v
->vgrf(glsl_type::int_type
);
826 fs_reg x
= v
->vgrf(glsl_type::int_type
);
827 bld
.XOR( x
, g
[1], g
[2]);
828 bld
.XOR(g
[3], g
[1], g
[2]);
829 bld
.XOR(g
[4], g
[1], g
[2]);
830 bld
.XOR(g
[5], g
[1], g
[2]);
831 bld
.XOR(g
[6], g
[1], g
[2]);
832 bld
.XOR(g
[7], g
[1], g
[2]);
833 bld
.emit(BRW_OPCODE_IF
);
835 bld
.ADD( x
, g
[1], g
[2]);
836 bld
.emit(BRW_OPCODE_ELSE
);
838 bld
.ROL( x
, g
[1], g
[2]);
840 bld
.emit(BRW_OPCODE_ENDIF
);
841 bld
.MUL( x
, g
[1], g
[2]);
846 bblock_t
*then_body
= v
->cfg
->blocks
[1];
847 fs_inst
*add
= instruction(then_body
, 0);
848 EXPECT_EQ(add
->opcode
, BRW_OPCODE_ADD
);
849 EXPECT_EQ(add
->sched
, tgl_swsb_regdist(7));
851 /* Note that the ROL will have RegDist 2 and not 7, illustrating the
852 * physical CFG edge between the then-block and the else-block.
854 bblock_t
*else_body
= v
->cfg
->blocks
[2];
855 fs_inst
*rol
= instruction(else_body
, 0);
856 EXPECT_EQ(rol
->opcode
, BRW_OPCODE_ROL
);
857 EXPECT_EQ(rol
->sched
, tgl_swsb_regdist(2));
859 bblock_t
*last_block
= v
->cfg
->blocks
[3];
860 fs_inst
*mul
= instruction(last_block
, 1);
861 EXPECT_EQ(mul
->opcode
, BRW_OPCODE_MUL
);
862 EXPECT_EQ(mul
->sched
, tgl_swsb_regdist(2));