intel/compiler: Allow MESA_SHADER_KERNEL
[mesa.git] / src / intel / compiler / test_vec4_dead_code_eliminate.cpp
1 /*
2 * Copyright © 2018 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <gtest/gtest.h>
25 #include "brw_vec4.h"
26 #include "program/program.h"
27
28 using namespace brw;
29
30 class dead_code_eliminate_test : public ::testing::Test {
31 virtual void SetUp();
32
33 public:
34 struct brw_compiler *compiler;
35 struct gen_device_info *devinfo;
36 struct gl_context *ctx;
37 struct gl_shader_program *shader_prog;
38 struct brw_vue_prog_data *prog_data;
39 vec4_visitor *v;
40 };
41
42 class dead_code_eliminate_vec4_visitor : public vec4_visitor
43 {
44 public:
45 dead_code_eliminate_vec4_visitor(struct brw_compiler *compiler,
46 nir_shader *shader,
47 struct brw_vue_prog_data *prog_data)
48 : vec4_visitor(compiler, NULL, NULL, prog_data, shader, NULL,
49 false /* no_spills */, -1)
50 {
51 prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT;
52 }
53
54 protected:
55 virtual dst_reg *make_reg_for_system_value(int /* location */)
56 {
57 unreachable("Not reached");
58 }
59
60 virtual void setup_payload()
61 {
62 unreachable("Not reached");
63 }
64
65 virtual void emit_prolog()
66 {
67 unreachable("Not reached");
68 }
69
70 virtual void emit_thread_end()
71 {
72 unreachable("Not reached");
73 }
74
75 virtual void emit_urb_write_header(int /* mrf */)
76 {
77 unreachable("Not reached");
78 }
79
80 virtual vec4_instruction *emit_urb_write_opcode(bool /* complete */)
81 {
82 unreachable("Not reached");
83 }
84 };
85
86
87 void dead_code_eliminate_test::SetUp()
88 {
89 ctx = (struct gl_context *)calloc(1, sizeof(*ctx));
90 compiler = (struct brw_compiler *)calloc(1, sizeof(*compiler));
91 devinfo = (struct gen_device_info *)calloc(1, sizeof(*devinfo));
92 prog_data = (struct brw_vue_prog_data *)calloc(1, sizeof(*prog_data));
93 compiler->devinfo = devinfo;
94
95 nir_shader *shader =
96 nir_shader_create(NULL, MESA_SHADER_VERTEX, NULL, NULL);
97
98 v = new dead_code_eliminate_vec4_visitor(compiler, shader, prog_data);
99
100 devinfo->gen = 4;
101 }
102
103 static void
104 dead_code_eliminate(vec4_visitor *v)
105 {
106 bool print = false;
107
108 if (print) {
109 fprintf(stderr, "instructions before:\n");
110 v->dump_instructions();
111 }
112
113 v->calculate_cfg();
114 v->dead_code_eliminate();
115
116 if (print) {
117 fprintf(stderr, "instructions after:\n");
118 v->dump_instructions();
119 }
120 }
121
122 TEST_F(dead_code_eliminate_test, some_dead_channels_all_flags_used)
123 {
124 const vec4_builder bld = vec4_builder(v).at_end();
125 src_reg r1 = src_reg(v, glsl_type::vec4_type);
126 src_reg r2 = src_reg(v, glsl_type::vec4_type);
127 src_reg r3 = src_reg(v, glsl_type::vec4_type);
128 src_reg r4 = src_reg(v, glsl_type::vec4_type);
129 src_reg r5 = src_reg(v, glsl_type::vec4_type);
130 src_reg r6 = src_reg(v, glsl_type::vec4_type);
131
132 /* Sequence like the following should not be modified by DCE.
133 *
134 * cmp.l.f0(8) g4<1>F g2<4,4,1>.wF g1<4,4,1>.xF
135 * mov(8) g5<1>.xF g4<4,4,1>.xF
136 * (+f0.x) sel(8) g6<1>UD g3<4>UD g6<4>UD
137 */
138 vec4_instruction *test_cmp =
139 bld.CMP(dst_reg(r4), r2, r1, BRW_CONDITIONAL_L);
140
141 test_cmp->src[0].swizzle = BRW_SWIZZLE_WWWW;
142 test_cmp->src[1].swizzle = BRW_SWIZZLE_XXXX;
143
144 vec4_instruction *test_mov =
145 bld.MOV(dst_reg(r5), r4);
146
147 test_mov->dst.writemask = WRITEMASK_X;
148 test_mov->src[0].swizzle = BRW_SWIZZLE_XXXX;
149
150 vec4_instruction *test_sel =
151 bld.SEL(dst_reg(r6), r3, r6);
152
153 set_predicate(BRW_PREDICATE_NORMAL, test_sel);
154
155 /* The scratch write is here just to make r5 and r6 be live so that the
156 * whole program doesn't get eliminated by DCE.
157 */
158 v->emit(v->SCRATCH_WRITE(dst_reg(r4), r6, r5));
159
160 dead_code_eliminate(v);
161
162 EXPECT_EQ(test_cmp->dst.writemask, WRITEMASK_XYZW);
163 }