src/intel/perf/gen_perf.c

   1 /*
   2  * Copyright © 2018 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <dirent.h>
  25
  26 #include <sys/types.h>
  27 #include <sys/stat.h>
  28 #include <fcntl.h>
  29 #include <unistd.h>
  30 #include <errno.h>
  31
  32 #include <drm-uapi/i915_drm.h>
  33
  34 #include "common/gen_gem.h"
  35 #include "gen_perf.h"
  36 #include "perf/gen_perf_mdapi.h"
  37 #include "perf/gen_perf_metrics.h"
  38
  39 #include "dev/gen_debug.h"
  40 #include "dev/gen_device_info.h"
  41 #include "util/bitscan.h"
  42
  43 #define FILE_DEBUG_FLAG DEBUG_PERFMON
  44
  45 static bool
  46 get_sysfs_dev_dir(struct gen_perf_config *perf, int fd)
  47 {
  48    struct stat sb;
  49    int min, maj;
  50    DIR *drmdir;
  51    struct dirent *drm_entry;
  52    int len;
  53
  54    perf->sysfs_dev_dir[0] = '\0';
  55
  56    if (fstat(fd, &sb)) {
  57       DBG("Failed to stat DRM fd\n");
  58       return false;
  59    }
  60
  61    maj = major(sb.st_rdev);
  62    min = minor(sb.st_rdev);
  63
  64    if (!S_ISCHR(sb.st_mode)) {
  65       DBG("DRM fd is not a character device as expected\n");
  66       return false;
  67    }
  68
  69    len = snprintf(perf->sysfs_dev_dir,
  70                   sizeof(perf->sysfs_dev_dir),
  71                   "/sys/dev/char/%d:%d/device/drm", maj, min);
  72    if (len < 0 || len >= sizeof(perf->sysfs_dev_dir)) {
  73       DBG("Failed to concatenate sysfs path to drm device\n");
  74       return false;
  75    }
  76
  77    drmdir = opendir(perf->sysfs_dev_dir);
  78    if (!drmdir) {
  79       DBG("Failed to open %s: %m\n", perf->sysfs_dev_dir);
  80       return false;
  81    }
  82
  83    while ((drm_entry = readdir(drmdir))) {
  84       if ((drm_entry->d_type == DT_DIR ||
  85            drm_entry->d_type == DT_LNK) &&
  86           strncmp(drm_entry->d_name, "card", 4) == 0)
  87       {
  88          len = snprintf(perf->sysfs_dev_dir,
  89                         sizeof(perf->sysfs_dev_dir),
  90                         "/sys/dev/char/%d:%d/device/drm/%s",
  91                         maj, min, drm_entry->d_name);
  92          closedir(drmdir);
  93          if (len < 0 || len >= sizeof(perf->sysfs_dev_dir))
  94             return false;
  95          else
  96             return true;
  97       }
  98    }
  99
 100    closedir(drmdir);
 101
 102    DBG("Failed to find cardX directory under /sys/dev/char/%d:%d/device/drm\n",
 103        maj, min);
 104
 105    return false;
 106 }
 107
 108 static bool
 109 read_file_uint64(const char *file, uint64_t *val)
 110 {
 111     char buf[32];
 112     int fd, n;
 113
 114     fd = open(file, 0);
 115     if (fd < 0)
 116        return false;
 117     while ((n = read(fd, buf, sizeof (buf) - 1)) < 0 &&
 118            errno == EINTR);
 119     close(fd);
 120     if (n < 0)
 121        return false;
 122
 123     buf[n] = '\0';
 124     *val = strtoull(buf, NULL, 0);
 125
 126     return true;
 127 }
 128
 129 static bool
 130 read_sysfs_drm_device_file_uint64(struct gen_perf_config *perf,
 131                                   const char *file,
 132                                   uint64_t *value)
 133 {
 134    char buf[512];
 135    int len;
 136
 137    len = snprintf(buf, sizeof(buf), "%s/%s", perf->sysfs_dev_dir, file);
 138    if (len < 0 || len >= sizeof(buf)) {
 139       DBG("Failed to concatenate sys filename to read u64 from\n");
 140       return false;
 141    }
 142
 143    return read_file_uint64(buf, value);
 144 }
 145
 146 static void
 147 register_oa_config(struct gen_perf_config *perf,
 148                    const struct gen_perf_query_info *query,
 149                    uint64_t config_id)
 150 {
 151    struct gen_perf_query_info *registred_query =
 152       gen_perf_query_append_query_info(perf, 0);
 153
 154    *registred_query = *query;
 155    registred_query->oa_metrics_set_id = config_id;
 156    DBG("metric set registred: id = %" PRIu64", guid = %s\n",
 157        registred_query->oa_metrics_set_id, query->guid);
 158 }
 159
 160 static void
 161 enumerate_sysfs_metrics(struct gen_perf_config *perf)
 162 {
 163    DIR *metricsdir = NULL;
 164    struct dirent *metric_entry;
 165    char buf[256];
 166    int len;
 167
 168    len = snprintf(buf, sizeof(buf), "%s/metrics", perf->sysfs_dev_dir);
 169    if (len < 0 || len >= sizeof(buf)) {
 170       DBG("Failed to concatenate path to sysfs metrics/ directory\n");
 171       return;
 172    }
 173
 174    metricsdir = opendir(buf);
 175    if (!metricsdir) {
 176       DBG("Failed to open %s: %m\n", buf);
 177       return;
 178    }
 179
 180    while ((metric_entry = readdir(metricsdir))) {
 181       struct hash_entry *entry;
 182
 183       if ((metric_entry->d_type != DT_DIR &&
 184            metric_entry->d_type != DT_LNK) ||
 185           metric_entry->d_name[0] == '.')
 186          continue;
 187
 188       DBG("metric set: %s\n", metric_entry->d_name);
 189       entry = _mesa_hash_table_search(perf->oa_metrics_table,
 190                                       metric_entry->d_name);
 191       if (entry) {
 192          uint64_t id;
 193
 194          len = snprintf(buf, sizeof(buf), "%s/metrics/%s/id",
 195                         perf->sysfs_dev_dir, metric_entry->d_name);
 196          if (len < 0 || len >= sizeof(buf)) {
 197             DBG("Failed to concatenate path to sysfs metric id file\n");
 198             continue;
 199          }
 200
 201          if (!read_file_uint64(buf, &id)) {
 202             DBG("Failed to read metric set id from %s: %m", buf);
 203             continue;
 204          }
 205
 206          register_oa_config(perf, (const struct gen_perf_query_info *)entry->data, id);
 207       } else
 208          DBG("metric set not known by mesa (skipping)\n");
 209    }
 210
 211    closedir(metricsdir);
 212 }
 213
 214 static bool
 215 kernel_has_dynamic_config_support(struct gen_perf_config *perf, int fd)
 216 {
 217    uint64_t invalid_config_id = UINT64_MAX;
 218
 219    return gen_ioctl(fd, DRM_IOCTL_I915_PERF_REMOVE_CONFIG,
 220                     &invalid_config_id) < 0 && errno == ENOENT;
 221 }
 222
 223 bool
 224 gen_perf_load_metric_id(struct gen_perf_config *perf, const char *guid,
 225                         uint64_t *metric_id)
 226 {
 227    char config_path[280];
 228
 229    snprintf(config_path, sizeof(config_path), "%s/metrics/%s/id",
 230             perf->sysfs_dev_dir, guid);
 231
 232    /* Don't recreate already loaded configs. */
 233    return read_file_uint64(config_path, metric_id);
 234 }
 235
 236 static void
 237 init_oa_configs(struct gen_perf_config *perf, int fd)
 238 {
 239    hash_table_foreach(perf->oa_metrics_table, entry) {
 240       const struct gen_perf_query_info *query = entry->data;
 241       struct drm_i915_perf_oa_config config;
 242       uint64_t config_id;
 243       int ret;
 244
 245       if (gen_perf_load_metric_id(perf, query->guid, &config_id)) {
 246          DBG("metric set: %s (already loaded)\n", query->guid);
 247          register_oa_config(perf, query, config_id);
 248          continue;
 249       }
 250
 251       memset(&config, 0, sizeof(config));
 252
 253       memcpy(config.uuid, query->guid, sizeof(config.uuid));
 254
 255       config.n_mux_regs = query->n_mux_regs;
 256       config.mux_regs_ptr = (uintptr_t) query->mux_regs;
 257
 258       config.n_boolean_regs = query->n_b_counter_regs;
 259       config.boolean_regs_ptr = (uintptr_t) query->b_counter_regs;
 260
 261       config.n_flex_regs = query->n_flex_regs;
 262       config.flex_regs_ptr = (uintptr_t) query->flex_regs;
 263
 264       ret = gen_ioctl(fd, DRM_IOCTL_I915_PERF_ADD_CONFIG, &config);
 265       if (ret < 0) {
 266          DBG("Failed to load \"%s\" (%s) metrics set in kernel: %s\n",
 267              query->name, query->guid, strerror(errno));
 268          continue;
 269       }
 270
 271       register_oa_config(perf, query, ret);
 272       DBG("metric set: %s (added)\n", query->guid);
 273    }
 274 }
 275
 276 static void
 277 compute_topology_builtins(struct gen_perf_config *perf,
 278                           const struct gen_device_info *devinfo)
 279 {
 280    perf->sys_vars.slice_mask = devinfo->slice_masks;
 281    perf->sys_vars.n_eu_slices = devinfo->num_slices;
 282
 283    for (int i = 0; i < sizeof(devinfo->subslice_masks[i]); i++) {
 284       perf->sys_vars.n_eu_sub_slices +=
 285          __builtin_popcount(devinfo->subslice_masks[i]);
 286    }
 287
 288    for (int i = 0; i < sizeof(devinfo->eu_masks); i++)
 289       perf->sys_vars.n_eus += __builtin_popcount(devinfo->eu_masks[i]);
 290
 291    perf->sys_vars.eu_threads_count = devinfo->num_thread_per_eu;
 292
 293    /* The subslice mask builtin contains bits for all slices. Prior to Gen11
 294     * it had groups of 3bits for each slice, on Gen11 it's 8bits for each
 295     * slice.
 296     *
 297     * Ideally equations would be updated to have a slice/subslice query
 298     * function/operator.
 299     */
 300    perf->sys_vars.subslice_mask = 0;
 301
 302    int bits_per_subslice = devinfo->gen == 11 ? 8 : 3;
 303
 304    for (int s = 0; s < util_last_bit(devinfo->slice_masks); s++) {
 305       for (int ss = 0; ss < (devinfo->subslice_slice_stride * 8); ss++) {
 306          if (gen_device_info_subslice_available(devinfo, s, ss))
 307             perf->sys_vars.subslice_mask |= 1ULL << (s * bits_per_subslice + ss);
 308       }
 309    }
 310 }
 311
 312 static bool
 313 init_oa_sys_vars(struct gen_perf_config *perf, const struct gen_device_info *devinfo)
 314 {
 315    uint64_t min_freq_mhz = 0, max_freq_mhz = 0;
 316
 317    if (!read_sysfs_drm_device_file_uint64(perf, "gt_min_freq_mhz", &min_freq_mhz))
 318       return false;
 319
 320    if (!read_sysfs_drm_device_file_uint64(perf,  "gt_max_freq_mhz", &max_freq_mhz))
 321       return false;
 322
 323    memset(&perf->sys_vars, 0, sizeof(perf->sys_vars));
 324    perf->sys_vars.gt_min_freq = min_freq_mhz * 1000000;
 325    perf->sys_vars.gt_max_freq = max_freq_mhz * 1000000;
 326    perf->sys_vars.timestamp_frequency = devinfo->timestamp_frequency;
 327    perf->sys_vars.revision = devinfo->revision;
 328    compute_topology_builtins(perf, devinfo);
 329
 330    return true;
 331 }
 332
 333 typedef void (*perf_register_oa_queries_t)(struct gen_perf_config *);
 334
 335 static perf_register_oa_queries_t
 336 get_register_queries_function(const struct gen_device_info *devinfo)
 337 {
 338    if (devinfo->is_haswell)
 339       return gen_oa_register_queries_hsw;
 340    if (devinfo->is_cherryview)
 341       return gen_oa_register_queries_chv;
 342    if (devinfo->is_broadwell)
 343       return gen_oa_register_queries_bdw;
 344    if (devinfo->is_broxton)
 345       return gen_oa_register_queries_bxt;
 346    if (devinfo->is_skylake) {
 347       if (devinfo->gt == 2)
 348          return gen_oa_register_queries_sklgt2;
 349       if (devinfo->gt == 3)
 350          return gen_oa_register_queries_sklgt3;
 351       if (devinfo->gt == 4)
 352          return gen_oa_register_queries_sklgt4;
 353    }
 354    if (devinfo->is_kabylake) {
 355       if (devinfo->gt == 2)
 356          return gen_oa_register_queries_kblgt2;
 357       if (devinfo->gt == 3)
 358          return gen_oa_register_queries_kblgt3;
 359    }
 360    if (devinfo->is_geminilake)
 361       return gen_oa_register_queries_glk;
 362    if (devinfo->is_coffeelake) {
 363       if (devinfo->gt == 2)
 364          return gen_oa_register_queries_cflgt2;
 365       if (devinfo->gt == 3)
 366          return gen_oa_register_queries_cflgt3;
 367    }
 368    if (devinfo->is_cannonlake)
 369       return gen_oa_register_queries_cnl;
 370    if (devinfo->gen == 11)
 371       return gen_oa_register_queries_icl;
 372
 373    return NULL;
 374 }
 375
 376 bool
 377 gen_perf_load_oa_metrics(struct gen_perf_config *perf, int fd,
 378                          const struct gen_device_info *devinfo)
 379 {
 380    perf_register_oa_queries_t oa_register = get_register_queries_function(devinfo);
 381    bool i915_perf_oa_available = false;
 382    struct stat sb;
 383
 384    /* The existence of this sysctl parameter implies the kernel supports
 385     * the i915 perf interface.
 386     */
 387    if (stat("/proc/sys/dev/i915/perf_stream_paranoid", &sb) == 0) {
 388
 389       /* If _paranoid == 1 then on Gen8+ we won't be able to access OA
 390        * metrics unless running as root.
 391        */
 392       if (devinfo->is_haswell)
 393          i915_perf_oa_available = true;
 394       else {
 395          uint64_t paranoid = 1;
 396
 397          read_file_uint64("/proc/sys/dev/i915/perf_stream_paranoid", &paranoid);
 398
 399          if (paranoid == 0 || geteuid() == 0)
 400             i915_perf_oa_available = true;
 401       }
 402    }
 403
 404    if (!i915_perf_oa_available ||
 405        !oa_register ||
 406        !get_sysfs_dev_dir(perf, fd) ||
 407        !init_oa_sys_vars(perf, devinfo))
 408       return false;
 409
 410    perf->oa_metrics_table =
 411       _mesa_hash_table_create(perf, _mesa_key_hash_string,
 412                               _mesa_key_string_equal);
 413
 414    /* Index all the metric sets mesa knows about before looking to see what
 415     * the kernel is advertising.
 416     */
 417    oa_register(perf);
 418
 419    if (likely((INTEL_DEBUG & DEBUG_NO_OACONFIG) == 0) &&
 420        kernel_has_dynamic_config_support(perf, fd))
 421       init_oa_configs(perf, fd);
 422    else
 423       enumerate_sysfs_metrics(perf);
 424
 425    return true;
 426 }
 427
 428 /* Accumulate 32bits OA counters */
 429 static inline void
 430 accumulate_uint32(const uint32_t *report0,
 431                   const uint32_t *report1,
 432                   uint64_t *accumulator)
 433 {
 434    *accumulator += (uint32_t)(*report1 - *report0);
 435 }
 436
 437 /* Accumulate 40bits OA counters */
 438 static inline void
 439 accumulate_uint40(int a_index,
 440                   const uint32_t *report0,
 441                   const uint32_t *report1,
 442                   uint64_t *accumulator)
 443 {
 444    const uint8_t *high_bytes0 = (uint8_t *)(report0 + 40);
 445    const uint8_t *high_bytes1 = (uint8_t *)(report1 + 40);
 446    uint64_t high0 = (uint64_t)(high_bytes0[a_index]) << 32;
 447    uint64_t high1 = (uint64_t)(high_bytes1[a_index]) << 32;
 448    uint64_t value0 = report0[a_index + 4] | high0;
 449    uint64_t value1 = report1[a_index + 4] | high1;
 450    uint64_t delta;
 451
 452    if (value0 > value1)
 453       delta = (1ULL << 40) + value1 - value0;
 454    else
 455       delta = value1 - value0;
 456
 457    *accumulator += delta;
 458 }
 459
 460 static void
 461 gen8_read_report_clock_ratios(const uint32_t *report,
 462                               uint64_t *slice_freq_hz,
 463                               uint64_t *unslice_freq_hz)
 464 {
 465    /* The lower 16bits of the RPT_ID field of the OA reports contains a
 466     * snapshot of the bits coming from the RP_FREQ_NORMAL register and is
 467     * divided this way :
 468     *
 469     * RPT_ID[31:25]: RP_FREQ_NORMAL[20:14] (low squashed_slice_clock_frequency)
 470     * RPT_ID[10:9]:  RP_FREQ_NORMAL[22:21] (high squashed_slice_clock_frequency)
 471     * RPT_ID[8:0]:   RP_FREQ_NORMAL[31:23] (squashed_unslice_clock_frequency)
 472     *
 473     * RP_FREQ_NORMAL[31:23]: Software Unslice Ratio Request
 474     *                        Multiple of 33.33MHz 2xclk (16 MHz 1xclk)
 475     *
 476     * RP_FREQ_NORMAL[22:14]: Software Slice Ratio Request
 477     *                        Multiple of 33.33MHz 2xclk (16 MHz 1xclk)
 478     */
 479
 480    uint32_t unslice_freq = report[0] & 0x1ff;
 481    uint32_t slice_freq_low = (report[0] >> 25) & 0x7f;
 482    uint32_t slice_freq_high = (report[0] >> 9) & 0x3;
 483    uint32_t slice_freq = slice_freq_low | (slice_freq_high << 7);
 484
 485    *slice_freq_hz = slice_freq * 16666667ULL;
 486    *unslice_freq_hz = unslice_freq * 16666667ULL;
 487 }
 488
 489 void
 490 gen_perf_query_result_read_frequencies(struct gen_perf_query_result *result,
 491                                        const struct gen_device_info *devinfo,
 492                                        const uint32_t *start,
 493                                        const uint32_t *end)
 494 {
 495    /* Slice/Unslice frequency is only available in the OA reports when the
 496     * "Disable OA reports due to clock ratio change" field in
 497     * OA_DEBUG_REGISTER is set to 1. This is how the kernel programs this
 498     * global register (see drivers/gpu/drm/i915/i915_perf.c)
 499     *
 500     * Documentation says this should be available on Gen9+ but experimentation
 501     * shows that Gen8 reports similar values, so we enable it there too.
 502     */
 503    if (devinfo->gen < 8)
 504       return;
 505
 506    gen8_read_report_clock_ratios(start,
 507                                  &result->slice_frequency[0],
 508                                  &result->unslice_frequency[0]);
 509    gen8_read_report_clock_ratios(end,
 510                                  &result->slice_frequency[1],
 511                                  &result->unslice_frequency[1]);
 512 }
 513
 514 void
 515 gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
 516                                  const struct gen_perf_query_info *query,
 517                                  const uint32_t *start,
 518                                  const uint32_t *end)
 519 {
 520    int i, idx = 0;
 521
 522    result->hw_id = start[2];
 523    result->reports_accumulated++;
 524
 525    switch (query->oa_format) {
 526    case I915_OA_FORMAT_A32u40_A4u32_B8_C8:
 527       accumulate_uint32(start + 1, end + 1, result->accumulator + idx++); /* timestamp */
 528       accumulate_uint32(start + 3, end + 3, result->accumulator + idx++); /* clock */
 529
 530       /* 32x 40bit A counters... */
 531       for (i = 0; i < 32; i++)
 532          accumulate_uint40(i, start, end, result->accumulator + idx++);
 533
 534       /* 4x 32bit A counters... */
 535       for (i = 0; i < 4; i++)
 536          accumulate_uint32(start + 36 + i, end + 36 + i, result->accumulator + idx++);
 537
 538       /* 8x 32bit B counters + 8x 32bit C counters... */
 539       for (i = 0; i < 16; i++)
 540          accumulate_uint32(start + 48 + i, end + 48 + i, result->accumulator + idx++);
 541       break;
 542
 543    case I915_OA_FORMAT_A45_B8_C8:
 544       accumulate_uint32(start + 1, end + 1, result->accumulator); /* timestamp */
 545
 546       for (i = 0; i < 61; i++)
 547          accumulate_uint32(start + 3 + i, end + 3 + i, result->accumulator + 1 + i);
 548       break;
 549
 550    default:
 551       unreachable("Can't accumulate OA counters in unknown format");
 552    }
 553
 554 }
 555
 556 void
 557 gen_perf_query_result_clear(struct gen_perf_query_result *result)
 558 {
 559    memset(result, 0, sizeof(*result));
 560    result->hw_id = 0xffffffff; /* invalid */
 561 }
 562
 563 static void
 564 fill_mdapi_perf_query_counter(struct gen_perf_query_info *query,
 565                               const char *name,
 566                               uint32_t data_offset,
 567                               uint32_t data_size,
 568                               enum gen_perf_counter_data_type data_type)
 569 {
 570    struct gen_perf_query_counter *counter = &query->counters[query->n_counters];
 571
 572    assert(query->n_counters <= query->max_counters);
 573
 574    counter->name = name;
 575    counter->desc = "Raw counter value";
 576    counter->type = GEN_PERF_COUNTER_TYPE_RAW;
 577    counter->data_type = data_type;
 578    counter->offset = data_offset;
 579
 580    query->n_counters++;
 581
 582    assert(counter->offset + gen_perf_query_counter_get_size(counter) <= query->data_size);
 583 }
 584
 585 #define MDAPI_QUERY_ADD_COUNTER(query, struct_name, field_name, type_name) \
 586    fill_mdapi_perf_query_counter(query, #field_name,                    \
 587                                  (uint8_t *) &struct_name.field_name -  \
 588                                  (uint8_t *) &struct_name,              \
 589                                  sizeof(struct_name.field_name),        \
 590                                  GEN_PERF_COUNTER_DATA_TYPE_##type_name)
 591 #define MDAPI_QUERY_ADD_ARRAY_COUNTER(ctx, query, struct_name, field_name, idx, type_name) \
 592    fill_mdapi_perf_query_counter(query,                                 \
 593                                  ralloc_asprintf(ctx, "%s%i", #field_name, idx), \
 594                                  (uint8_t *) &struct_name.field_name[idx] - \
 595                                  (uint8_t *) &struct_name,              \
 596                                  sizeof(struct_name.field_name[0]),     \
 597                                  GEN_PERF_COUNTER_DATA_TYPE_##type_name)
 598
 599 void
 600 gen_perf_query_register_mdapi_oa_query(const struct gen_device_info *devinfo,
 601                                        struct gen_perf_config *perf)
 602 {
 603    struct gen_perf_query_info *query = NULL;
 604
 605    /* MDAPI requires different structures for pretty much every generation
 606     * (right now we have definitions for gen 7 to 11).
 607     */
 608    if (!(devinfo->gen >= 7 && devinfo->gen <= 11))
 609       return;
 610
 611    switch (devinfo->gen) {
 612    case 7: {
 613       query = gen_perf_query_append_query_info(perf, 1 + 45 + 16 + 7);
 614       query->oa_format = I915_OA_FORMAT_A45_B8_C8;
 615
 616       struct gen7_mdapi_metrics metric_data;
 617       query->data_size = sizeof(metric_data);
 618
 619       MDAPI_QUERY_ADD_COUNTER(query, metric_data, TotalTime, UINT64);
 620       for (int i = 0; i < ARRAY_SIZE(metric_data.ACounters); i++) {
 621          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 622                                        metric_data, ACounters, i, UINT64);
 623       }
 624       for (int i = 0; i < ARRAY_SIZE(metric_data.NOACounters); i++) {
 625          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 626                                        metric_data, NOACounters, i, UINT64);
 627       }
 628       MDAPI_QUERY_ADD_COUNTER(query, metric_data, PerfCounter1, UINT64);
 629       MDAPI_QUERY_ADD_COUNTER(query, metric_data, PerfCounter2, UINT64);
 630       MDAPI_QUERY_ADD_COUNTER(query, metric_data, SplitOccured, BOOL32);
 631       MDAPI_QUERY_ADD_COUNTER(query, metric_data, CoreFrequencyChanged, BOOL32);
 632       MDAPI_QUERY_ADD_COUNTER(query, metric_data, CoreFrequency, UINT64);
 633       MDAPI_QUERY_ADD_COUNTER(query, metric_data, ReportId, UINT32);
 634       MDAPI_QUERY_ADD_COUNTER(query, metric_data, ReportsCount, UINT32);
 635       break;
 636    }
 637    case 8: {
 638       query = gen_perf_query_append_query_info(perf, 2 + 36 + 16 + 16);
 639       query->oa_format = I915_OA_FORMAT_A32u40_A4u32_B8_C8;
 640
 641       struct gen8_mdapi_metrics metric_data;
 642       query->data_size = sizeof(metric_data);
 643
 644       MDAPI_QUERY_ADD_COUNTER(query, metric_data, TotalTime, UINT64);
 645       MDAPI_QUERY_ADD_COUNTER(query, metric_data, GPUTicks, UINT64);
 646       for (int i = 0; i < ARRAY_SIZE(metric_data.OaCntr); i++) {
 647          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 648                                        metric_data, OaCntr, i, UINT64);
 649       }
 650       for (int i = 0; i < ARRAY_SIZE(metric_data.NoaCntr); i++) {
 651          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 652                                        metric_data, NoaCntr, i, UINT64);
 653       }
 654       MDAPI_QUERY_ADD_COUNTER(query, metric_data, BeginTimestamp, UINT64);
 655       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved1, UINT64);
 656       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved2, UINT64);
 657       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved3, UINT32);
 658       MDAPI_QUERY_ADD_COUNTER(query, metric_data, OverrunOccured, BOOL32);
 659       MDAPI_QUERY_ADD_COUNTER(query, metric_data, MarkerUser, UINT64);
 660       MDAPI_QUERY_ADD_COUNTER(query, metric_data, MarkerDriver, UINT64);
 661       MDAPI_QUERY_ADD_COUNTER(query, metric_data, SliceFrequency, UINT64);
 662       MDAPI_QUERY_ADD_COUNTER(query, metric_data, UnsliceFrequency, UINT64);
 663       MDAPI_QUERY_ADD_COUNTER(query, metric_data, PerfCounter1, UINT64);
 664       MDAPI_QUERY_ADD_COUNTER(query, metric_data, PerfCounter2, UINT64);
 665       MDAPI_QUERY_ADD_COUNTER(query, metric_data, SplitOccured, BOOL32);
 666       MDAPI_QUERY_ADD_COUNTER(query, metric_data, CoreFrequencyChanged, BOOL32);
 667       MDAPI_QUERY_ADD_COUNTER(query, metric_data, CoreFrequency, UINT64);
 668       MDAPI_QUERY_ADD_COUNTER(query, metric_data, ReportId, UINT32);
 669       MDAPI_QUERY_ADD_COUNTER(query, metric_data, ReportsCount, UINT32);
 670       break;
 671    }
 672    case 9:
 673    case 10:
 674    case 11: {
 675       query = gen_perf_query_append_query_info(perf, 2 + 36 + 16 + 16 + 16 + 2);
 676       query->oa_format = I915_OA_FORMAT_A32u40_A4u32_B8_C8;
 677
 678       struct gen9_mdapi_metrics metric_data;
 679       query->data_size = sizeof(metric_data);
 680
 681       MDAPI_QUERY_ADD_COUNTER(query, metric_data, TotalTime, UINT64);
 682       MDAPI_QUERY_ADD_COUNTER(query, metric_data, GPUTicks, UINT64);
 683       for (int i = 0; i < ARRAY_SIZE(metric_data.OaCntr); i++) {
 684          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 685                                        metric_data, OaCntr, i, UINT64);
 686       }
 687       for (int i = 0; i < ARRAY_SIZE(metric_data.NoaCntr); i++) {
 688          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 689                                        metric_data, NoaCntr, i, UINT64);
 690       }
 691       MDAPI_QUERY_ADD_COUNTER(query, metric_data, BeginTimestamp, UINT64);
 692       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved1, UINT64);
 693       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved2, UINT64);
 694       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved3, UINT32);
 695       MDAPI_QUERY_ADD_COUNTER(query, metric_data, OverrunOccured, BOOL32);
 696       MDAPI_QUERY_ADD_COUNTER(query, metric_data, MarkerUser, UINT64);
 697       MDAPI_QUERY_ADD_COUNTER(query, metric_data, MarkerDriver, UINT64);
 698       MDAPI_QUERY_ADD_COUNTER(query, metric_data, SliceFrequency, UINT64);
 699       MDAPI_QUERY_ADD_COUNTER(query, metric_data, UnsliceFrequency, UINT64);
 700       MDAPI_QUERY_ADD_COUNTER(query, metric_data, PerfCounter1, UINT64);
 701       MDAPI_QUERY_ADD_COUNTER(query, metric_data, PerfCounter2, UINT64);
 702       MDAPI_QUERY_ADD_COUNTER(query, metric_data, SplitOccured, BOOL32);
 703       MDAPI_QUERY_ADD_COUNTER(query, metric_data, CoreFrequencyChanged, BOOL32);
 704       MDAPI_QUERY_ADD_COUNTER(query, metric_data, CoreFrequency, UINT64);
 705       MDAPI_QUERY_ADD_COUNTER(query, metric_data, ReportId, UINT32);
 706       MDAPI_QUERY_ADD_COUNTER(query, metric_data, ReportsCount, UINT32);
 707       for (int i = 0; i < ARRAY_SIZE(metric_data.UserCntr); i++) {
 708          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 709                                        metric_data, UserCntr, i, UINT64);
 710       }
 711       MDAPI_QUERY_ADD_COUNTER(query, metric_data, UserCntrCfgId, UINT32);
 712       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved4, UINT32);
 713       break;
 714    }
 715    default:
 716       unreachable("Unsupported gen");
 717       break;
 718    }
 719
 720    query->kind = GEN_PERF_QUERY_TYPE_RAW;
 721    query->name = "Intel_Raw_Hardware_Counters_Set_0_Query";
 722    query->guid = GEN_PERF_QUERY_GUID_MDAPI;
 723
 724    {
 725       /* Accumulation buffer offsets copied from an actual query... */
 726       const struct gen_perf_query_info *copy_query =
 727          &perf->queries[0];
 728
 729       query->gpu_time_offset = copy_query->gpu_time_offset;
 730       query->gpu_clock_offset = copy_query->gpu_clock_offset;
 731       query->a_offset = copy_query->a_offset;
 732       query->b_offset = copy_query->b_offset;
 733       query->c_offset = copy_query->c_offset;
 734    }
 735 }
 736
 737 void
 738 gen_perf_query_register_mdapi_statistic_query(const struct gen_device_info *devinfo,
 739                                               struct gen_perf_config *perf)
 740 {
 741    if (!(devinfo->gen >= 7 && devinfo->gen <= 11))
 742       return;
 743
 744    struct gen_perf_query_info *query =
 745       gen_perf_query_append_query_info(perf, MAX_STAT_COUNTERS);
 746
 747    query->kind = GEN_PERF_QUERY_TYPE_PIPELINE;
 748    query->name = "Intel_Raw_Pipeline_Statistics_Query";
 749
 750    /* The order has to match mdapi_pipeline_metrics. */
 751    gen_perf_query_info_add_basic_stat_reg(query, IA_VERTICES_COUNT,
 752                                           "N vertices submitted");
 753    gen_perf_query_info_add_basic_stat_reg(query, IA_PRIMITIVES_COUNT,
 754                                           "N primitives submitted");
 755    gen_perf_query_info_add_basic_stat_reg(query, VS_INVOCATION_COUNT,
 756                                           "N vertex shader invocations");
 757    gen_perf_query_info_add_basic_stat_reg(query, GS_INVOCATION_COUNT,
 758                                           "N geometry shader invocations");
 759    gen_perf_query_info_add_basic_stat_reg(query, GS_PRIMITIVES_COUNT,
 760                                           "N geometry shader primitives emitted");
 761    gen_perf_query_info_add_basic_stat_reg(query, CL_INVOCATION_COUNT,
 762                                           "N primitives entering clipping");
 763    gen_perf_query_info_add_basic_stat_reg(query, CL_PRIMITIVES_COUNT,
 764                                           "N primitives leaving clipping");
 765    if (devinfo->is_haswell || devinfo->gen == 8) {
 766       gen_perf_query_info_add_stat_reg(query, PS_INVOCATION_COUNT, 1, 4,
 767                                        "N fragment shader invocations",
 768                                        "N fragment shader invocations");
 769    } else {
 770       gen_perf_query_info_add_basic_stat_reg(query, PS_INVOCATION_COUNT,
 771                                              "N fragment shader invocations");
 772    }
 773    gen_perf_query_info_add_basic_stat_reg(query, HS_INVOCATION_COUNT,
 774                                           "N TCS shader invocations");
 775    gen_perf_query_info_add_basic_stat_reg(query, DS_INVOCATION_COUNT,
 776                                           "N TES shader invocations");
 777    if (devinfo->gen >= 7) {
 778       gen_perf_query_info_add_basic_stat_reg(query, CS_INVOCATION_COUNT,
 779                                              "N compute shader invocations");
 780    }
 781
 782    if (devinfo->gen >= 10) {
 783       /* Reuse existing CS invocation register until we can expose this new
 784        * one.
 785        */
 786       gen_perf_query_info_add_basic_stat_reg(query, CS_INVOCATION_COUNT,
 787                                              "Reserved1");
 788    }
 789
 790    query->data_size = sizeof(uint64_t) * query->n_counters;
 791 }
 792
 793 uint64_t
 794 gen_perf_query_get_metric_id(struct gen_perf_config *perf,
 795                              const struct gen_perf_query_info *query)
 796 {
 797    /* These queries are know not to ever change, their config ID has been
 798     * loaded upon the first query creation. No need to look them up again.
 799     */
 800    if (query->kind == GEN_PERF_QUERY_TYPE_OA)
 801       return query->oa_metrics_set_id;
 802
 803    assert(query->kind == GEN_PERF_QUERY_TYPE_RAW);
 804
 805    /* Raw queries can be reprogrammed up by an external application/library.
 806     * When a raw query is used for the first time it's id is set to a value !=
 807     * 0. When it stops being used the id returns to 0. No need to reload the
 808     * ID when it's already loaded.
 809     */
 810    if (query->oa_metrics_set_id != 0) {
 811       DBG("Raw query '%s' guid=%s using cached ID: %"PRIu64"\n",
 812           query->name, query->guid, query->oa_metrics_set_id);
 813       return query->oa_metrics_set_id;
 814    }
 815
 816    struct gen_perf_query_info *raw_query = (struct gen_perf_query_info *)query;
 817    if (!gen_perf_load_metric_id(perf, query->guid,
 818                                 &raw_query->oa_metrics_set_id)) {
 819       DBG("Unable to read query guid=%s ID, falling back to test config\n", query->guid);
 820       raw_query->oa_metrics_set_id = 1ULL;
 821    } else {
 822       DBG("Raw query '%s'guid=%s loaded ID: %"PRIu64"\n",
 823           query->name, query->guid, query->oa_metrics_set_id);
 824    }
 825    return query->oa_metrics_set_id;
 826 }
 827
 828 struct oa_sample_buf *
 829 gen_perf_get_free_sample_buf(struct gen_perf_context *perf_ctx)
 830 {
 831    struct exec_node *node = exec_list_pop_head(&perf_ctx->free_sample_buffers);
 832    struct oa_sample_buf *buf;
 833
 834    if (node)
 835       buf = exec_node_data(struct oa_sample_buf, node, link);
 836    else {
 837       buf = ralloc_size(perf_ctx->perf, sizeof(*buf));
 838
 839       exec_node_init(&buf->link);
 840       buf->refcount = 0;
 841       buf->len = 0;
 842    }
 843
 844    return buf;
 845 }
 846
 847 void
 848 gen_perf_reap_old_sample_buffers(struct gen_perf_context *perf_ctx)
 849 {
 850    struct exec_node *tail_node =
 851       exec_list_get_tail(&perf_ctx->sample_buffers);
 852    struct oa_sample_buf *tail_buf =
 853       exec_node_data(struct oa_sample_buf, tail_node, link);
 854
 855    /* Remove all old, unreferenced sample buffers walking forward from
 856     * the head of the list, except always leave at least one node in
 857     * the list so we always have a node to reference when we Begin
 858     * a new query.
 859     */
 860    foreach_list_typed_safe(struct oa_sample_buf, buf, link,
 861                            &perf_ctx->sample_buffers)
 862    {
 863       if (buf->refcount == 0 && buf != tail_buf) {
 864          exec_node_remove(&buf->link);
 865          exec_list_push_head(&perf_ctx->free_sample_buffers, &buf->link);
 866       } else
 867          return;
 868    }
 869 }
 870
 871 void
 872 gen_perf_free_sample_bufs(struct gen_perf_context *perf_ctx)
 873 {
 874    foreach_list_typed_safe(struct oa_sample_buf, buf, link,
 875                            &perf_ctx->free_sample_buffers)
 876       ralloc_free(buf);
 877
 878    exec_list_make_empty(&perf_ctx->free_sample_buffers);
 879 }
 880
 881 /******************************************************************************/
 882
 883 /**
 884  * Emit MI_STORE_REGISTER_MEM commands to capture all of the
 885  * pipeline statistics for the performance query object.
 886  */
 887 void
 888 gen_perf_snapshot_statistics_registers(void *context,
 889                                        struct gen_perf_config *perf,
 890                                        struct gen_perf_query_object *obj,
 891                                        uint32_t offset_in_bytes)
 892 {
 893    const struct gen_perf_query_info *query = obj->queryinfo;
 894    const int n_counters = query->n_counters;
 895
 896    for (int i = 0; i < n_counters; i++) {
 897       const struct gen_perf_query_counter *counter = &query->counters[i];
 898
 899       assert(counter->data_type == GEN_PERF_COUNTER_DATA_TYPE_UINT64);
 900
 901       perf->vtbl.store_register_mem64(context, obj->pipeline_stats.bo,
 902                                       counter->pipeline_stat.reg,
 903                                       offset_in_bytes + i * sizeof(uint64_t));
 904    }
 905 }
 906
 907 void
 908 gen_perf_close(struct gen_perf_context *perfquery,
 909                const struct gen_perf_query_info *query)
 910 {
 911    if (perfquery->oa_stream_fd != -1) {
 912       close(perfquery->oa_stream_fd);
 913       perfquery->oa_stream_fd = -1;
 914    }
 915    if (query->kind == GEN_PERF_QUERY_TYPE_RAW) {
 916       struct gen_perf_query_info *raw_query =
 917          (struct gen_perf_query_info *) query;
 918       raw_query->oa_metrics_set_id = 0;
 919    }
 920 }
 921
 922 bool
 923 gen_perf_open(struct gen_perf_context *perf_ctx,
 924               int metrics_set_id,
 925               int report_format,
 926               int period_exponent,
 927               int drm_fd,
 928               uint32_t ctx_id)
 929 {
 930    uint64_t properties[] = {
 931       /* Single context sampling */
 932       DRM_I915_PERF_PROP_CTX_HANDLE, ctx_id,
 933
 934       /* Include OA reports in samples */
 935       DRM_I915_PERF_PROP_SAMPLE_OA, true,
 936
 937       /* OA unit configuration */
 938       DRM_I915_PERF_PROP_OA_METRICS_SET, metrics_set_id,
 939       DRM_I915_PERF_PROP_OA_FORMAT, report_format,
 940       DRM_I915_PERF_PROP_OA_EXPONENT, period_exponent,
 941    };
 942    struct drm_i915_perf_open_param param = {
 943       .flags = I915_PERF_FLAG_FD_CLOEXEC |
 944                I915_PERF_FLAG_FD_NONBLOCK |
 945                I915_PERF_FLAG_DISABLED,
 946       .num_properties = ARRAY_SIZE(properties) / 2,
 947       .properties_ptr = (uintptr_t) properties,
 948    };
 949    int fd = gen_ioctl(drm_fd, DRM_IOCTL_I915_PERF_OPEN, &param);
 950    if (fd == -1) {
 951       DBG("Error opening gen perf OA stream: %m\n");
 952       return false;
 953    }
 954
 955    perf_ctx->oa_stream_fd = fd;
 956
 957    perf_ctx->current_oa_metrics_set_id = metrics_set_id;
 958    perf_ctx->current_oa_format = report_format;
 959
 960    return true;
 961 }