src/intel/perf/gen_perf.c

   1 /*
   2  * Copyright © 2018 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <dirent.h>
  25
  26 #include <sys/types.h>
  27 #include <sys/stat.h>
  28 #include <fcntl.h>
  29 #include <unistd.h>
  30 #include <errno.h>
  31
  32 #include <drm-uapi/i915_drm.h>
  33
  34 #include "common/gen_gem.h"
  35 #include "gen_perf.h"
  36 #include "perf/gen_perf_mdapi.h"
  37 #include "perf/gen_perf_metrics.h"
  38
  39 #include "dev/gen_debug.h"
  40 #include "dev/gen_device_info.h"
  41 #include "util/bitscan.h"
  42
  43 #define FILE_DEBUG_FLAG DEBUG_PERFMON
  44
  45 #define MAP_READ  (1 << 0)
  46 #define MAP_WRITE (1 << 1)
  47
  48 static bool
  49 get_sysfs_dev_dir(struct gen_perf_config *perf, int fd)
  50 {
  51    struct stat sb;
  52    int min, maj;
  53    DIR *drmdir;
  54    struct dirent *drm_entry;
  55    int len;
  56
  57    perf->sysfs_dev_dir[0] = '\0';
  58
  59    if (fstat(fd, &sb)) {
  60       DBG("Failed to stat DRM fd\n");
  61       return false;
  62    }
  63
  64    maj = major(sb.st_rdev);
  65    min = minor(sb.st_rdev);
  66
  67    if (!S_ISCHR(sb.st_mode)) {
  68       DBG("DRM fd is not a character device as expected\n");
  69       return false;
  70    }
  71
  72    len = snprintf(perf->sysfs_dev_dir,
  73                   sizeof(perf->sysfs_dev_dir),
  74                   "/sys/dev/char/%d:%d/device/drm", maj, min);
  75    if (len < 0 || len >= sizeof(perf->sysfs_dev_dir)) {
  76       DBG("Failed to concatenate sysfs path to drm device\n");
  77       return false;
  78    }
  79
  80    drmdir = opendir(perf->sysfs_dev_dir);
  81    if (!drmdir) {
  82       DBG("Failed to open %s: %m\n", perf->sysfs_dev_dir);
  83       return false;
  84    }
  85
  86    while ((drm_entry = readdir(drmdir))) {
  87       if ((drm_entry->d_type == DT_DIR ||
  88            drm_entry->d_type == DT_LNK) &&
  89           strncmp(drm_entry->d_name, "card", 4) == 0)
  90       {
  91          len = snprintf(perf->sysfs_dev_dir,
  92                         sizeof(perf->sysfs_dev_dir),
  93                         "/sys/dev/char/%d:%d/device/drm/%s",
  94                         maj, min, drm_entry->d_name);
  95          closedir(drmdir);
  96          if (len < 0 || len >= sizeof(perf->sysfs_dev_dir))
  97             return false;
  98          else
  99             return true;
 100       }
 101    }
 102
 103    closedir(drmdir);
 104
 105    DBG("Failed to find cardX directory under /sys/dev/char/%d:%d/device/drm\n",
 106        maj, min);
 107
 108    return false;
 109 }
 110
 111 static bool
 112 read_file_uint64(const char *file, uint64_t *val)
 113 {
 114     char buf[32];
 115     int fd, n;
 116
 117     fd = open(file, 0);
 118     if (fd < 0)
 119        return false;
 120     while ((n = read(fd, buf, sizeof (buf) - 1)) < 0 &&
 121            errno == EINTR);
 122     close(fd);
 123     if (n < 0)
 124        return false;
 125
 126     buf[n] = '\0';
 127     *val = strtoull(buf, NULL, 0);
 128
 129     return true;
 130 }
 131
 132 static bool
 133 read_sysfs_drm_device_file_uint64(struct gen_perf_config *perf,
 134                                   const char *file,
 135                                   uint64_t *value)
 136 {
 137    char buf[512];
 138    int len;
 139
 140    len = snprintf(buf, sizeof(buf), "%s/%s", perf->sysfs_dev_dir, file);
 141    if (len < 0 || len >= sizeof(buf)) {
 142       DBG("Failed to concatenate sys filename to read u64 from\n");
 143       return false;
 144    }
 145
 146    return read_file_uint64(buf, value);
 147 }
 148
 149 static void
 150 register_oa_config(struct gen_perf_config *perf,
 151                    const struct gen_perf_query_info *query,
 152                    uint64_t config_id)
 153 {
 154    struct gen_perf_query_info *registred_query =
 155       gen_perf_query_append_query_info(perf, 0);
 156
 157    *registred_query = *query;
 158    registred_query->oa_metrics_set_id = config_id;
 159    DBG("metric set registred: id = %" PRIu64", guid = %s\n",
 160        registred_query->oa_metrics_set_id, query->guid);
 161 }
 162
 163 static void
 164 enumerate_sysfs_metrics(struct gen_perf_config *perf)
 165 {
 166    DIR *metricsdir = NULL;
 167    struct dirent *metric_entry;
 168    char buf[256];
 169    int len;
 170
 171    len = snprintf(buf, sizeof(buf), "%s/metrics", perf->sysfs_dev_dir);
 172    if (len < 0 || len >= sizeof(buf)) {
 173       DBG("Failed to concatenate path to sysfs metrics/ directory\n");
 174       return;
 175    }
 176
 177    metricsdir = opendir(buf);
 178    if (!metricsdir) {
 179       DBG("Failed to open %s: %m\n", buf);
 180       return;
 181    }
 182
 183    while ((metric_entry = readdir(metricsdir))) {
 184       struct hash_entry *entry;
 185
 186       if ((metric_entry->d_type != DT_DIR &&
 187            metric_entry->d_type != DT_LNK) ||
 188           metric_entry->d_name[0] == '.')
 189          continue;
 190
 191       DBG("metric set: %s\n", metric_entry->d_name);
 192       entry = _mesa_hash_table_search(perf->oa_metrics_table,
 193                                       metric_entry->d_name);
 194       if (entry) {
 195          uint64_t id;
 196
 197          len = snprintf(buf, sizeof(buf), "%s/metrics/%s/id",
 198                         perf->sysfs_dev_dir, metric_entry->d_name);
 199          if (len < 0 || len >= sizeof(buf)) {
 200             DBG("Failed to concatenate path to sysfs metric id file\n");
 201             continue;
 202          }
 203
 204          if (!read_file_uint64(buf, &id)) {
 205             DBG("Failed to read metric set id from %s: %m", buf);
 206             continue;
 207          }
 208
 209          register_oa_config(perf, (const struct gen_perf_query_info *)entry->data, id);
 210       } else
 211          DBG("metric set not known by mesa (skipping)\n");
 212    }
 213
 214    closedir(metricsdir);
 215 }
 216
 217 static bool
 218 kernel_has_dynamic_config_support(struct gen_perf_config *perf, int fd)
 219 {
 220    uint64_t invalid_config_id = UINT64_MAX;
 221
 222    return gen_ioctl(fd, DRM_IOCTL_I915_PERF_REMOVE_CONFIG,
 223                     &invalid_config_id) < 0 && errno == ENOENT;
 224 }
 225
 226 bool
 227 gen_perf_load_metric_id(struct gen_perf_config *perf, const char *guid,
 228                         uint64_t *metric_id)
 229 {
 230    char config_path[280];
 231
 232    snprintf(config_path, sizeof(config_path), "%s/metrics/%s/id",
 233             perf->sysfs_dev_dir, guid);
 234
 235    /* Don't recreate already loaded configs. */
 236    return read_file_uint64(config_path, metric_id);
 237 }
 238
 239 static void
 240 init_oa_configs(struct gen_perf_config *perf, int fd)
 241 {
 242    hash_table_foreach(perf->oa_metrics_table, entry) {
 243       const struct gen_perf_query_info *query = entry->data;
 244       struct drm_i915_perf_oa_config config;
 245       uint64_t config_id;
 246       int ret;
 247
 248       if (gen_perf_load_metric_id(perf, query->guid, &config_id)) {
 249          DBG("metric set: %s (already loaded)\n", query->guid);
 250          register_oa_config(perf, query, config_id);
 251          continue;
 252       }
 253
 254       memset(&config, 0, sizeof(config));
 255
 256       memcpy(config.uuid, query->guid, sizeof(config.uuid));
 257
 258       config.n_mux_regs = query->n_mux_regs;
 259       config.mux_regs_ptr = (uintptr_t) query->mux_regs;
 260
 261       config.n_boolean_regs = query->n_b_counter_regs;
 262       config.boolean_regs_ptr = (uintptr_t) query->b_counter_regs;
 263
 264       config.n_flex_regs = query->n_flex_regs;
 265       config.flex_regs_ptr = (uintptr_t) query->flex_regs;
 266
 267       ret = gen_ioctl(fd, DRM_IOCTL_I915_PERF_ADD_CONFIG, &config);
 268       if (ret < 0) {
 269          DBG("Failed to load \"%s\" (%s) metrics set in kernel: %s\n",
 270              query->name, query->guid, strerror(errno));
 271          continue;
 272       }
 273
 274       register_oa_config(perf, query, ret);
 275       DBG("metric set: %s (added)\n", query->guid);
 276    }
 277 }
 278
 279 static void
 280 compute_topology_builtins(struct gen_perf_config *perf,
 281                           const struct gen_device_info *devinfo)
 282 {
 283    perf->sys_vars.slice_mask = devinfo->slice_masks;
 284    perf->sys_vars.n_eu_slices = devinfo->num_slices;
 285
 286    for (int i = 0; i < sizeof(devinfo->subslice_masks[i]); i++) {
 287       perf->sys_vars.n_eu_sub_slices +=
 288          __builtin_popcount(devinfo->subslice_masks[i]);
 289    }
 290
 291    for (int i = 0; i < sizeof(devinfo->eu_masks); i++)
 292       perf->sys_vars.n_eus += __builtin_popcount(devinfo->eu_masks[i]);
 293
 294    perf->sys_vars.eu_threads_count = devinfo->num_thread_per_eu;
 295
 296    /* The subslice mask builtin contains bits for all slices. Prior to Gen11
 297     * it had groups of 3bits for each slice, on Gen11 it's 8bits for each
 298     * slice.
 299     *
 300     * Ideally equations would be updated to have a slice/subslice query
 301     * function/operator.
 302     */
 303    perf->sys_vars.subslice_mask = 0;
 304
 305    int bits_per_subslice = devinfo->gen == 11 ? 8 : 3;
 306
 307    for (int s = 0; s < util_last_bit(devinfo->slice_masks); s++) {
 308       for (int ss = 0; ss < (devinfo->subslice_slice_stride * 8); ss++) {
 309          if (gen_device_info_subslice_available(devinfo, s, ss))
 310             perf->sys_vars.subslice_mask |= 1ULL << (s * bits_per_subslice + ss);
 311       }
 312    }
 313 }
 314
 315 static bool
 316 init_oa_sys_vars(struct gen_perf_config *perf, const struct gen_device_info *devinfo)
 317 {
 318    uint64_t min_freq_mhz = 0, max_freq_mhz = 0;
 319
 320    if (!read_sysfs_drm_device_file_uint64(perf, "gt_min_freq_mhz", &min_freq_mhz))
 321       return false;
 322
 323    if (!read_sysfs_drm_device_file_uint64(perf,  "gt_max_freq_mhz", &max_freq_mhz))
 324       return false;
 325
 326    memset(&perf->sys_vars, 0, sizeof(perf->sys_vars));
 327    perf->sys_vars.gt_min_freq = min_freq_mhz * 1000000;
 328    perf->sys_vars.gt_max_freq = max_freq_mhz * 1000000;
 329    perf->sys_vars.timestamp_frequency = devinfo->timestamp_frequency;
 330    perf->sys_vars.revision = devinfo->revision;
 331    compute_topology_builtins(perf, devinfo);
 332
 333    return true;
 334 }
 335
 336 typedef void (*perf_register_oa_queries_t)(struct gen_perf_config *);
 337
 338 static perf_register_oa_queries_t
 339 get_register_queries_function(const struct gen_device_info *devinfo)
 340 {
 341    if (devinfo->is_haswell)
 342       return gen_oa_register_queries_hsw;
 343    if (devinfo->is_cherryview)
 344       return gen_oa_register_queries_chv;
 345    if (devinfo->is_broadwell)
 346       return gen_oa_register_queries_bdw;
 347    if (devinfo->is_broxton)
 348       return gen_oa_register_queries_bxt;
 349    if (devinfo->is_skylake) {
 350       if (devinfo->gt == 2)
 351          return gen_oa_register_queries_sklgt2;
 352       if (devinfo->gt == 3)
 353          return gen_oa_register_queries_sklgt3;
 354       if (devinfo->gt == 4)
 355          return gen_oa_register_queries_sklgt4;
 356    }
 357    if (devinfo->is_kabylake) {
 358       if (devinfo->gt == 2)
 359          return gen_oa_register_queries_kblgt2;
 360       if (devinfo->gt == 3)
 361          return gen_oa_register_queries_kblgt3;
 362    }
 363    if (devinfo->is_geminilake)
 364       return gen_oa_register_queries_glk;
 365    if (devinfo->is_coffeelake) {
 366       if (devinfo->gt == 2)
 367          return gen_oa_register_queries_cflgt2;
 368       if (devinfo->gt == 3)
 369          return gen_oa_register_queries_cflgt3;
 370    }
 371    if (devinfo->is_cannonlake)
 372       return gen_oa_register_queries_cnl;
 373    if (devinfo->gen == 11)
 374       return gen_oa_register_queries_icl;
 375
 376    return NULL;
 377 }
 378
 379 bool
 380 gen_perf_load_oa_metrics(struct gen_perf_config *perf, int fd,
 381                          const struct gen_device_info *devinfo)
 382 {
 383    perf_register_oa_queries_t oa_register = get_register_queries_function(devinfo);
 384    bool i915_perf_oa_available = false;
 385    struct stat sb;
 386
 387    /* The existence of this sysctl parameter implies the kernel supports
 388     * the i915 perf interface.
 389     */
 390    if (stat("/proc/sys/dev/i915/perf_stream_paranoid", &sb) == 0) {
 391
 392       /* If _paranoid == 1 then on Gen8+ we won't be able to access OA
 393        * metrics unless running as root.
 394        */
 395       if (devinfo->is_haswell)
 396          i915_perf_oa_available = true;
 397       else {
 398          uint64_t paranoid = 1;
 399
 400          read_file_uint64("/proc/sys/dev/i915/perf_stream_paranoid", &paranoid);
 401
 402          if (paranoid == 0 || geteuid() == 0)
 403             i915_perf_oa_available = true;
 404       }
 405    }
 406
 407    if (!i915_perf_oa_available ||
 408        !oa_register ||
 409        !get_sysfs_dev_dir(perf, fd) ||
 410        !init_oa_sys_vars(perf, devinfo))
 411       return false;
 412
 413    perf->oa_metrics_table =
 414       _mesa_hash_table_create(perf, _mesa_key_hash_string,
 415                               _mesa_key_string_equal);
 416
 417    /* Index all the metric sets mesa knows about before looking to see what
 418     * the kernel is advertising.
 419     */
 420    oa_register(perf);
 421
 422    if (likely((INTEL_DEBUG & DEBUG_NO_OACONFIG) == 0) &&
 423        kernel_has_dynamic_config_support(perf, fd))
 424       init_oa_configs(perf, fd);
 425    else
 426       enumerate_sysfs_metrics(perf);
 427
 428    return true;
 429 }
 430
 431 /* Accumulate 32bits OA counters */
 432 static inline void
 433 accumulate_uint32(const uint32_t *report0,
 434                   const uint32_t *report1,
 435                   uint64_t *accumulator)
 436 {
 437    *accumulator += (uint32_t)(*report1 - *report0);
 438 }
 439
 440 /* Accumulate 40bits OA counters */
 441 static inline void
 442 accumulate_uint40(int a_index,
 443                   const uint32_t *report0,
 444                   const uint32_t *report1,
 445                   uint64_t *accumulator)
 446 {
 447    const uint8_t *high_bytes0 = (uint8_t *)(report0 + 40);
 448    const uint8_t *high_bytes1 = (uint8_t *)(report1 + 40);
 449    uint64_t high0 = (uint64_t)(high_bytes0[a_index]) << 32;
 450    uint64_t high1 = (uint64_t)(high_bytes1[a_index]) << 32;
 451    uint64_t value0 = report0[a_index + 4] | high0;
 452    uint64_t value1 = report1[a_index + 4] | high1;
 453    uint64_t delta;
 454
 455    if (value0 > value1)
 456       delta = (1ULL << 40) + value1 - value0;
 457    else
 458       delta = value1 - value0;
 459
 460    *accumulator += delta;
 461 }
 462
 463 static void
 464 gen8_read_report_clock_ratios(const uint32_t *report,
 465                               uint64_t *slice_freq_hz,
 466                               uint64_t *unslice_freq_hz)
 467 {
 468    /* The lower 16bits of the RPT_ID field of the OA reports contains a
 469     * snapshot of the bits coming from the RP_FREQ_NORMAL register and is
 470     * divided this way :
 471     *
 472     * RPT_ID[31:25]: RP_FREQ_NORMAL[20:14] (low squashed_slice_clock_frequency)
 473     * RPT_ID[10:9]:  RP_FREQ_NORMAL[22:21] (high squashed_slice_clock_frequency)
 474     * RPT_ID[8:0]:   RP_FREQ_NORMAL[31:23] (squashed_unslice_clock_frequency)
 475     *
 476     * RP_FREQ_NORMAL[31:23]: Software Unslice Ratio Request
 477     *                        Multiple of 33.33MHz 2xclk (16 MHz 1xclk)
 478     *
 479     * RP_FREQ_NORMAL[22:14]: Software Slice Ratio Request
 480     *                        Multiple of 33.33MHz 2xclk (16 MHz 1xclk)
 481     */
 482
 483    uint32_t unslice_freq = report[0] & 0x1ff;
 484    uint32_t slice_freq_low = (report[0] >> 25) & 0x7f;
 485    uint32_t slice_freq_high = (report[0] >> 9) & 0x3;
 486    uint32_t slice_freq = slice_freq_low | (slice_freq_high << 7);
 487
 488    *slice_freq_hz = slice_freq * 16666667ULL;
 489    *unslice_freq_hz = unslice_freq * 16666667ULL;
 490 }
 491
 492 void
 493 gen_perf_query_result_read_frequencies(struct gen_perf_query_result *result,
 494                                        const struct gen_device_info *devinfo,
 495                                        const uint32_t *start,
 496                                        const uint32_t *end)
 497 {
 498    /* Slice/Unslice frequency is only available in the OA reports when the
 499     * "Disable OA reports due to clock ratio change" field in
 500     * OA_DEBUG_REGISTER is set to 1. This is how the kernel programs this
 501     * global register (see drivers/gpu/drm/i915/i915_perf.c)
 502     *
 503     * Documentation says this should be available on Gen9+ but experimentation
 504     * shows that Gen8 reports similar values, so we enable it there too.
 505     */
 506    if (devinfo->gen < 8)
 507       return;
 508
 509    gen8_read_report_clock_ratios(start,
 510                                  &result->slice_frequency[0],
 511                                  &result->unslice_frequency[0]);
 512    gen8_read_report_clock_ratios(end,
 513                                  &result->slice_frequency[1],
 514                                  &result->unslice_frequency[1]);
 515 }
 516
 517 void
 518 gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
 519                                  const struct gen_perf_query_info *query,
 520                                  const uint32_t *start,
 521                                  const uint32_t *end)
 522 {
 523    int i, idx = 0;
 524
 525    result->hw_id = start[2];
 526    result->reports_accumulated++;
 527
 528    switch (query->oa_format) {
 529    case I915_OA_FORMAT_A32u40_A4u32_B8_C8:
 530       accumulate_uint32(start + 1, end + 1, result->accumulator + idx++); /* timestamp */
 531       accumulate_uint32(start + 3, end + 3, result->accumulator + idx++); /* clock */
 532
 533       /* 32x 40bit A counters... */
 534       for (i = 0; i < 32; i++)
 535          accumulate_uint40(i, start, end, result->accumulator + idx++);
 536
 537       /* 4x 32bit A counters... */
 538       for (i = 0; i < 4; i++)
 539          accumulate_uint32(start + 36 + i, end + 36 + i, result->accumulator + idx++);
 540
 541       /* 8x 32bit B counters + 8x 32bit C counters... */
 542       for (i = 0; i < 16; i++)
 543          accumulate_uint32(start + 48 + i, end + 48 + i, result->accumulator + idx++);
 544       break;
 545
 546    case I915_OA_FORMAT_A45_B8_C8:
 547       accumulate_uint32(start + 1, end + 1, result->accumulator); /* timestamp */
 548
 549       for (i = 0; i < 61; i++)
 550          accumulate_uint32(start + 3 + i, end + 3 + i, result->accumulator + 1 + i);
 551       break;
 552
 553    default:
 554       unreachable("Can't accumulate OA counters in unknown format");
 555    }
 556
 557 }
 558
 559 void
 560 gen_perf_query_result_clear(struct gen_perf_query_result *result)
 561 {
 562    memset(result, 0, sizeof(*result));
 563    result->hw_id = 0xffffffff; /* invalid */
 564 }
 565
 566 static void
 567 fill_mdapi_perf_query_counter(struct gen_perf_query_info *query,
 568                               const char *name,
 569                               uint32_t data_offset,
 570                               uint32_t data_size,
 571                               enum gen_perf_counter_data_type data_type)
 572 {
 573    struct gen_perf_query_counter *counter = &query->counters[query->n_counters];
 574
 575    assert(query->n_counters <= query->max_counters);
 576
 577    counter->name = name;
 578    counter->desc = "Raw counter value";
 579    counter->type = GEN_PERF_COUNTER_TYPE_RAW;
 580    counter->data_type = data_type;
 581    counter->offset = data_offset;
 582
 583    query->n_counters++;
 584
 585    assert(counter->offset + gen_perf_query_counter_get_size(counter) <= query->data_size);
 586 }
 587
 588 #define MDAPI_QUERY_ADD_COUNTER(query, struct_name, field_name, type_name) \
 589    fill_mdapi_perf_query_counter(query, #field_name,                    \
 590                                  (uint8_t *) &struct_name.field_name -  \
 591                                  (uint8_t *) &struct_name,              \
 592                                  sizeof(struct_name.field_name),        \
 593                                  GEN_PERF_COUNTER_DATA_TYPE_##type_name)
 594 #define MDAPI_QUERY_ADD_ARRAY_COUNTER(ctx, query, struct_name, field_name, idx, type_name) \
 595    fill_mdapi_perf_query_counter(query,                                 \
 596                                  ralloc_asprintf(ctx, "%s%i", #field_name, idx), \
 597                                  (uint8_t *) &struct_name.field_name[idx] - \
 598                                  (uint8_t *) &struct_name,              \
 599                                  sizeof(struct_name.field_name[0]),     \
 600                                  GEN_PERF_COUNTER_DATA_TYPE_##type_name)
 601
 602 void
 603 gen_perf_query_register_mdapi_oa_query(const struct gen_device_info *devinfo,
 604                                        struct gen_perf_config *perf)
 605 {
 606    struct gen_perf_query_info *query = NULL;
 607
 608    /* MDAPI requires different structures for pretty much every generation
 609     * (right now we have definitions for gen 7 to 11).
 610     */
 611    if (!(devinfo->gen >= 7 && devinfo->gen <= 11))
 612       return;
 613
 614    switch (devinfo->gen) {
 615    case 7: {
 616       query = gen_perf_query_append_query_info(perf, 1 + 45 + 16 + 7);
 617       query->oa_format = I915_OA_FORMAT_A45_B8_C8;
 618
 619       struct gen7_mdapi_metrics metric_data;
 620       query->data_size = sizeof(metric_data);
 621
 622       MDAPI_QUERY_ADD_COUNTER(query, metric_data, TotalTime, UINT64);
 623       for (int i = 0; i < ARRAY_SIZE(metric_data.ACounters); i++) {
 624          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 625                                        metric_data, ACounters, i, UINT64);
 626       }
 627       for (int i = 0; i < ARRAY_SIZE(metric_data.NOACounters); i++) {
 628          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 629                                        metric_data, NOACounters, i, UINT64);
 630       }
 631       MDAPI_QUERY_ADD_COUNTER(query, metric_data, PerfCounter1, UINT64);
 632       MDAPI_QUERY_ADD_COUNTER(query, metric_data, PerfCounter2, UINT64);
 633       MDAPI_QUERY_ADD_COUNTER(query, metric_data, SplitOccured, BOOL32);
 634       MDAPI_QUERY_ADD_COUNTER(query, metric_data, CoreFrequencyChanged, BOOL32);
 635       MDAPI_QUERY_ADD_COUNTER(query, metric_data, CoreFrequency, UINT64);
 636       MDAPI_QUERY_ADD_COUNTER(query, metric_data, ReportId, UINT32);
 637       MDAPI_QUERY_ADD_COUNTER(query, metric_data, ReportsCount, UINT32);
 638       break;
 639    }
 640    case 8: {
 641       query = gen_perf_query_append_query_info(perf, 2 + 36 + 16 + 16);
 642       query->oa_format = I915_OA_FORMAT_A32u40_A4u32_B8_C8;
 643
 644       struct gen8_mdapi_metrics metric_data;
 645       query->data_size = sizeof(metric_data);
 646
 647       MDAPI_QUERY_ADD_COUNTER(query, metric_data, TotalTime, UINT64);
 648       MDAPI_QUERY_ADD_COUNTER(query, metric_data, GPUTicks, UINT64);
 649       for (int i = 0; i < ARRAY_SIZE(metric_data.OaCntr); i++) {
 650          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 651                                        metric_data, OaCntr, i, UINT64);
 652       }
 653       for (int i = 0; i < ARRAY_SIZE(metric_data.NoaCntr); i++) {
 654          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 655                                        metric_data, NoaCntr, i, UINT64);
 656       }
 657       MDAPI_QUERY_ADD_COUNTER(query, metric_data, BeginTimestamp, UINT64);
 658       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved1, UINT64);
 659       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved2, UINT64);
 660       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved3, UINT32);
 661       MDAPI_QUERY_ADD_COUNTER(query, metric_data, OverrunOccured, BOOL32);
 662       MDAPI_QUERY_ADD_COUNTER(query, metric_data, MarkerUser, UINT64);
 663       MDAPI_QUERY_ADD_COUNTER(query, metric_data, MarkerDriver, UINT64);
 664       MDAPI_QUERY_ADD_COUNTER(query, metric_data, SliceFrequency, UINT64);
 665       MDAPI_QUERY_ADD_COUNTER(query, metric_data, UnsliceFrequency, UINT64);
 666       MDAPI_QUERY_ADD_COUNTER(query, metric_data, PerfCounter1, UINT64);
 667       MDAPI_QUERY_ADD_COUNTER(query, metric_data, PerfCounter2, UINT64);
 668       MDAPI_QUERY_ADD_COUNTER(query, metric_data, SplitOccured, BOOL32);
 669       MDAPI_QUERY_ADD_COUNTER(query, metric_data, CoreFrequencyChanged, BOOL32);
 670       MDAPI_QUERY_ADD_COUNTER(query, metric_data, CoreFrequency, UINT64);
 671       MDAPI_QUERY_ADD_COUNTER(query, metric_data, ReportId, UINT32);
 672       MDAPI_QUERY_ADD_COUNTER(query, metric_data, ReportsCount, UINT32);
 673       break;
 674    }
 675    case 9:
 676    case 10:
 677    case 11: {
 678       query = gen_perf_query_append_query_info(perf, 2 + 36 + 16 + 16 + 16 + 2);
 679       query->oa_format = I915_OA_FORMAT_A32u40_A4u32_B8_C8;
 680
 681       struct gen9_mdapi_metrics metric_data;
 682       query->data_size = sizeof(metric_data);
 683
 684       MDAPI_QUERY_ADD_COUNTER(query, metric_data, TotalTime, UINT64);
 685       MDAPI_QUERY_ADD_COUNTER(query, metric_data, GPUTicks, UINT64);
 686       for (int i = 0; i < ARRAY_SIZE(metric_data.OaCntr); i++) {
 687          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 688                                        metric_data, OaCntr, i, UINT64);
 689       }
 690       for (int i = 0; i < ARRAY_SIZE(metric_data.NoaCntr); i++) {
 691          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 692                                        metric_data, NoaCntr, i, UINT64);
 693       }
 694       MDAPI_QUERY_ADD_COUNTER(query, metric_data, BeginTimestamp, UINT64);
 695       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved1, UINT64);
 696       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved2, UINT64);
 697       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved3, UINT32);
 698       MDAPI_QUERY_ADD_COUNTER(query, metric_data, OverrunOccured, BOOL32);
 699       MDAPI_QUERY_ADD_COUNTER(query, metric_data, MarkerUser, UINT64);
 700       MDAPI_QUERY_ADD_COUNTER(query, metric_data, MarkerDriver, UINT64);
 701       MDAPI_QUERY_ADD_COUNTER(query, metric_data, SliceFrequency, UINT64);
 702       MDAPI_QUERY_ADD_COUNTER(query, metric_data, UnsliceFrequency, UINT64);
 703       MDAPI_QUERY_ADD_COUNTER(query, metric_data, PerfCounter1, UINT64);
 704       MDAPI_QUERY_ADD_COUNTER(query, metric_data, PerfCounter2, UINT64);
 705       MDAPI_QUERY_ADD_COUNTER(query, metric_data, SplitOccured, BOOL32);
 706       MDAPI_QUERY_ADD_COUNTER(query, metric_data, CoreFrequencyChanged, BOOL32);
 707       MDAPI_QUERY_ADD_COUNTER(query, metric_data, CoreFrequency, UINT64);
 708       MDAPI_QUERY_ADD_COUNTER(query, metric_data, ReportId, UINT32);
 709       MDAPI_QUERY_ADD_COUNTER(query, metric_data, ReportsCount, UINT32);
 710       for (int i = 0; i < ARRAY_SIZE(metric_data.UserCntr); i++) {
 711          MDAPI_QUERY_ADD_ARRAY_COUNTER(perf->queries, query,
 712                                        metric_data, UserCntr, i, UINT64);
 713       }
 714       MDAPI_QUERY_ADD_COUNTER(query, metric_data, UserCntrCfgId, UINT32);
 715       MDAPI_QUERY_ADD_COUNTER(query, metric_data, Reserved4, UINT32);
 716       break;
 717    }
 718    default:
 719       unreachable("Unsupported gen");
 720       break;
 721    }
 722
 723    query->kind = GEN_PERF_QUERY_TYPE_RAW;
 724    query->name = "Intel_Raw_Hardware_Counters_Set_0_Query";
 725    query->guid = GEN_PERF_QUERY_GUID_MDAPI;
 726
 727    {
 728       /* Accumulation buffer offsets copied from an actual query... */
 729       const struct gen_perf_query_info *copy_query =
 730          &perf->queries[0];
 731
 732       query->gpu_time_offset = copy_query->gpu_time_offset;
 733       query->gpu_clock_offset = copy_query->gpu_clock_offset;
 734       query->a_offset = copy_query->a_offset;
 735       query->b_offset = copy_query->b_offset;
 736       query->c_offset = copy_query->c_offset;
 737    }
 738 }
 739
 740 void
 741 gen_perf_query_register_mdapi_statistic_query(const struct gen_device_info *devinfo,
 742                                               struct gen_perf_config *perf)
 743 {
 744    if (!(devinfo->gen >= 7 && devinfo->gen <= 11))
 745       return;
 746
 747    struct gen_perf_query_info *query =
 748       gen_perf_query_append_query_info(perf, MAX_STAT_COUNTERS);
 749
 750    query->kind = GEN_PERF_QUERY_TYPE_PIPELINE;
 751    query->name = "Intel_Raw_Pipeline_Statistics_Query";
 752
 753    /* The order has to match mdapi_pipeline_metrics. */
 754    gen_perf_query_info_add_basic_stat_reg(query, IA_VERTICES_COUNT,
 755                                           "N vertices submitted");
 756    gen_perf_query_info_add_basic_stat_reg(query, IA_PRIMITIVES_COUNT,
 757                                           "N primitives submitted");
 758    gen_perf_query_info_add_basic_stat_reg(query, VS_INVOCATION_COUNT,
 759                                           "N vertex shader invocations");
 760    gen_perf_query_info_add_basic_stat_reg(query, GS_INVOCATION_COUNT,
 761                                           "N geometry shader invocations");
 762    gen_perf_query_info_add_basic_stat_reg(query, GS_PRIMITIVES_COUNT,
 763                                           "N geometry shader primitives emitted");
 764    gen_perf_query_info_add_basic_stat_reg(query, CL_INVOCATION_COUNT,
 765                                           "N primitives entering clipping");
 766    gen_perf_query_info_add_basic_stat_reg(query, CL_PRIMITIVES_COUNT,
 767                                           "N primitives leaving clipping");
 768    if (devinfo->is_haswell || devinfo->gen == 8) {
 769       gen_perf_query_info_add_stat_reg(query, PS_INVOCATION_COUNT, 1, 4,
 770                                        "N fragment shader invocations",
 771                                        "N fragment shader invocations");
 772    } else {
 773       gen_perf_query_info_add_basic_stat_reg(query, PS_INVOCATION_COUNT,
 774                                              "N fragment shader invocations");
 775    }
 776    gen_perf_query_info_add_basic_stat_reg(query, HS_INVOCATION_COUNT,
 777                                           "N TCS shader invocations");
 778    gen_perf_query_info_add_basic_stat_reg(query, DS_INVOCATION_COUNT,
 779                                           "N TES shader invocations");
 780    if (devinfo->gen >= 7) {
 781       gen_perf_query_info_add_basic_stat_reg(query, CS_INVOCATION_COUNT,
 782                                              "N compute shader invocations");
 783    }
 784
 785    if (devinfo->gen >= 10) {
 786       /* Reuse existing CS invocation register until we can expose this new
 787        * one.
 788        */
 789       gen_perf_query_info_add_basic_stat_reg(query, CS_INVOCATION_COUNT,
 790                                              "Reserved1");
 791    }
 792
 793    query->data_size = sizeof(uint64_t) * query->n_counters;
 794 }
 795
 796 uint64_t
 797 gen_perf_query_get_metric_id(struct gen_perf_config *perf,
 798                              const struct gen_perf_query_info *query)
 799 {
 800    /* These queries are know not to ever change, their config ID has been
 801     * loaded upon the first query creation. No need to look them up again.
 802     */
 803    if (query->kind == GEN_PERF_QUERY_TYPE_OA)
 804       return query->oa_metrics_set_id;
 805
 806    assert(query->kind == GEN_PERF_QUERY_TYPE_RAW);
 807
 808    /* Raw queries can be reprogrammed up by an external application/library.
 809     * When a raw query is used for the first time it's id is set to a value !=
 810     * 0. When it stops being used the id returns to 0. No need to reload the
 811     * ID when it's already loaded.
 812     */
 813    if (query->oa_metrics_set_id != 0) {
 814       DBG("Raw query '%s' guid=%s using cached ID: %"PRIu64"\n",
 815           query->name, query->guid, query->oa_metrics_set_id);
 816       return query->oa_metrics_set_id;
 817    }
 818
 819    struct gen_perf_query_info *raw_query = (struct gen_perf_query_info *)query;
 820    if (!gen_perf_load_metric_id(perf, query->guid,
 821                                 &raw_query->oa_metrics_set_id)) {
 822       DBG("Unable to read query guid=%s ID, falling back to test config\n", query->guid);
 823       raw_query->oa_metrics_set_id = 1ULL;
 824    } else {
 825       DBG("Raw query '%s'guid=%s loaded ID: %"PRIu64"\n",
 826           query->name, query->guid, query->oa_metrics_set_id);
 827    }
 828    return query->oa_metrics_set_id;
 829 }
 830
 831 struct oa_sample_buf *
 832 gen_perf_get_free_sample_buf(struct gen_perf_context *perf_ctx)
 833 {
 834    struct exec_node *node = exec_list_pop_head(&perf_ctx->free_sample_buffers);
 835    struct oa_sample_buf *buf;
 836
 837    if (node)
 838       buf = exec_node_data(struct oa_sample_buf, node, link);
 839    else {
 840       buf = ralloc_size(perf_ctx->perf, sizeof(*buf));
 841
 842       exec_node_init(&buf->link);
 843       buf->refcount = 0;
 844       buf->len = 0;
 845    }
 846
 847    return buf;
 848 }
 849
 850 void
 851 gen_perf_reap_old_sample_buffers(struct gen_perf_context *perf_ctx)
 852 {
 853    struct exec_node *tail_node =
 854       exec_list_get_tail(&perf_ctx->sample_buffers);
 855    struct oa_sample_buf *tail_buf =
 856       exec_node_data(struct oa_sample_buf, tail_node, link);
 857
 858    /* Remove all old, unreferenced sample buffers walking forward from
 859     * the head of the list, except always leave at least one node in
 860     * the list so we always have a node to reference when we Begin
 861     * a new query.
 862     */
 863    foreach_list_typed_safe(struct oa_sample_buf, buf, link,
 864                            &perf_ctx->sample_buffers)
 865    {
 866       if (buf->refcount == 0 && buf != tail_buf) {
 867          exec_node_remove(&buf->link);
 868          exec_list_push_head(&perf_ctx->free_sample_buffers, &buf->link);
 869       } else
 870          return;
 871    }
 872 }
 873
 874 void
 875 gen_perf_free_sample_bufs(struct gen_perf_context *perf_ctx)
 876 {
 877    foreach_list_typed_safe(struct oa_sample_buf, buf, link,
 878                            &perf_ctx->free_sample_buffers)
 879       ralloc_free(buf);
 880
 881    exec_list_make_empty(&perf_ctx->free_sample_buffers);
 882 }
 883
 884 /******************************************************************************/
 885
 886 /**
 887  * Emit MI_STORE_REGISTER_MEM commands to capture all of the
 888  * pipeline statistics for the performance query object.
 889  */
 890 void
 891 gen_perf_snapshot_statistics_registers(void *context,
 892                                        struct gen_perf_config *perf,
 893                                        struct gen_perf_query_object *obj,
 894                                        uint32_t offset_in_bytes)
 895 {
 896    const struct gen_perf_query_info *query = obj->queryinfo;
 897    const int n_counters = query->n_counters;
 898
 899    for (int i = 0; i < n_counters; i++) {
 900       const struct gen_perf_query_counter *counter = &query->counters[i];
 901
 902       assert(counter->data_type == GEN_PERF_COUNTER_DATA_TYPE_UINT64);
 903
 904       perf->vtbl.store_register_mem64(context, obj->pipeline_stats.bo,
 905                                       counter->pipeline_stat.reg,
 906                                       offset_in_bytes + i * sizeof(uint64_t));
 907    }
 908 }
 909
 910 void
 911 gen_perf_close(struct gen_perf_context *perfquery,
 912                const struct gen_perf_query_info *query)
 913 {
 914    if (perfquery->oa_stream_fd != -1) {
 915       close(perfquery->oa_stream_fd);
 916       perfquery->oa_stream_fd = -1;
 917    }
 918    if (query->kind == GEN_PERF_QUERY_TYPE_RAW) {
 919       struct gen_perf_query_info *raw_query =
 920          (struct gen_perf_query_info *) query;
 921       raw_query->oa_metrics_set_id = 0;
 922    }
 923 }
 924
 925 bool
 926 gen_perf_open(struct gen_perf_context *perf_ctx,
 927               int metrics_set_id,
 928               int report_format,
 929               int period_exponent,
 930               int drm_fd,
 931               uint32_t ctx_id)
 932 {
 933    uint64_t properties[] = {
 934       /* Single context sampling */
 935       DRM_I915_PERF_PROP_CTX_HANDLE, ctx_id,
 936
 937       /* Include OA reports in samples */
 938       DRM_I915_PERF_PROP_SAMPLE_OA, true,
 939
 940       /* OA unit configuration */
 941       DRM_I915_PERF_PROP_OA_METRICS_SET, metrics_set_id,
 942       DRM_I915_PERF_PROP_OA_FORMAT, report_format,
 943       DRM_I915_PERF_PROP_OA_EXPONENT, period_exponent,
 944    };
 945    struct drm_i915_perf_open_param param = {
 946       .flags = I915_PERF_FLAG_FD_CLOEXEC |
 947                I915_PERF_FLAG_FD_NONBLOCK |
 948                I915_PERF_FLAG_DISABLED,
 949       .num_properties = ARRAY_SIZE(properties) / 2,
 950       .properties_ptr = (uintptr_t) properties,
 951    };
 952    int fd = gen_ioctl(drm_fd, DRM_IOCTL_I915_PERF_OPEN, &param);
 953    if (fd == -1) {
 954       DBG("Error opening gen perf OA stream: %m\n");
 955       return false;
 956    }
 957
 958    perf_ctx->oa_stream_fd = fd;
 959
 960    perf_ctx->current_oa_metrics_set_id = metrics_set_id;
 961    perf_ctx->current_oa_format = report_format;
 962
 963    return true;
 964 }
 965
 966 bool
 967 gen_perf_inc_n_users(struct gen_perf_context *perf_ctx)
 968 {
 969    if (perf_ctx->n_oa_users == 0 &&
 970        gen_ioctl(perf_ctx->oa_stream_fd, I915_PERF_IOCTL_ENABLE, 0) < 0)
 971    {
 972       return false;
 973    }
 974    ++perf_ctx->n_oa_users;
 975
 976    return true;
 977 }
 978
 979 void
 980 gen_perf_dec_n_users(struct gen_perf_context *perf_ctx)
 981 {
 982    /* Disabling the i915 perf stream will effectively disable the OA
 983     * counters.  Note it's important to be sure there are no outstanding
 984     * MI_RPC commands at this point since they could stall the CS
 985     * indefinitely once OACONTROL is disabled.
 986     */
 987    --perf_ctx->n_oa_users;
 988    if (perf_ctx->n_oa_users == 0 &&
 989        gen_ioctl(perf_ctx->oa_stream_fd, I915_PERF_IOCTL_DISABLE, 0) < 0)
 990    {
 991       DBG("WARNING: Error disabling gen perf stream: %m\n");
 992    }
 993 }