073236c431752baf6e0f065947ca12cc1171c3f8
[mesa.git] / src / intel / perf / gen_perf.h
1 /*
2 * Copyright © 2018 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef GEN_PERF_H
25 #define GEN_PERF_H
26
27 #include <stdio.h>
28 #include <stdbool.h>
29 #include <stdint.h>
30 #include <string.h>
31
32 #if defined(MAJOR_IN_SYSMACROS)
33 #include <sys/sysmacros.h>
34 #elif defined(MAJOR_IN_MKDEV)
35 #include <sys/mkdev.h>
36 #endif
37
38 #include "util/hash_table.h"
39 #include "compiler/glsl/list.h"
40 #include "util/ralloc.h"
41
42 #include "drm-uapi/i915_drm.h"
43
44 struct gen_device_info;
45
46 struct gen_perf_config;
47 struct gen_perf_query_info;
48
49 enum gen_perf_counter_type {
50 GEN_PERF_COUNTER_TYPE_EVENT,
51 GEN_PERF_COUNTER_TYPE_DURATION_NORM,
52 GEN_PERF_COUNTER_TYPE_DURATION_RAW,
53 GEN_PERF_COUNTER_TYPE_THROUGHPUT,
54 GEN_PERF_COUNTER_TYPE_RAW,
55 GEN_PERF_COUNTER_TYPE_TIMESTAMP,
56 };
57
58 enum gen_perf_counter_data_type {
59 GEN_PERF_COUNTER_DATA_TYPE_BOOL32,
60 GEN_PERF_COUNTER_DATA_TYPE_UINT32,
61 GEN_PERF_COUNTER_DATA_TYPE_UINT64,
62 GEN_PERF_COUNTER_DATA_TYPE_FLOAT,
63 GEN_PERF_COUNTER_DATA_TYPE_DOUBLE,
64 };
65
66 enum gen_perf_counter_units {
67 /* size */
68 GEN_PERF_COUNTER_UNITS_BYTES,
69
70 /* frequency */
71 GEN_PERF_COUNTER_UNITS_HZ,
72
73 /* time */
74 GEN_PERF_COUNTER_UNITS_NS,
75 GEN_PERF_COUNTER_UNITS_US,
76
77 /**/
78 GEN_PERF_COUNTER_UNITS_PIXELS,
79 GEN_PERF_COUNTER_UNITS_TEXELS,
80 GEN_PERF_COUNTER_UNITS_THREADS,
81 GEN_PERF_COUNTER_UNITS_PERCENT,
82
83 /* events */
84 GEN_PERF_COUNTER_UNITS_MESSAGES,
85 GEN_PERF_COUNTER_UNITS_NUMBER,
86 GEN_PERF_COUNTER_UNITS_CYCLES,
87 GEN_PERF_COUNTER_UNITS_EVENTS,
88 GEN_PERF_COUNTER_UNITS_UTILIZATION,
89
90 /**/
91 GEN_PERF_COUNTER_UNITS_EU_SENDS_TO_L3_CACHE_LINES,
92 GEN_PERF_COUNTER_UNITS_EU_ATOMIC_REQUESTS_TO_L3_CACHE_LINES,
93 GEN_PERF_COUNTER_UNITS_EU_REQUESTS_TO_L3_CACHE_LINES,
94 GEN_PERF_COUNTER_UNITS_EU_BYTES_PER_L3_CACHE_LINE,
95
96 GEN_PERF_COUNTER_UNITS_MAX
97 };
98
99 struct gen_pipeline_stat {
100 uint32_t reg;
101 uint32_t numerator;
102 uint32_t denominator;
103 };
104
105 /*
106 * The largest OA formats we can use include:
107 * For Haswell:
108 * 1 timestamp, 45 A counters, 8 B counters and 8 C counters.
109 * For Gen8+
110 * 1 timestamp, 1 clock, 36 A counters, 8 B counters and 8 C counters
111 */
112 #define MAX_OA_REPORT_COUNTERS 62
113
114 /*
115 * When currently allocate only one page for pipeline statistics queries. Here
116 * we derived the maximum number of counters for that amount.
117 */
118 #define STATS_BO_SIZE 4096
119 #define STATS_BO_END_OFFSET_BYTES (STATS_BO_SIZE / 2)
120 #define MAX_STAT_COUNTERS (STATS_BO_END_OFFSET_BYTES / 8)
121
122 #define I915_PERF_OA_SAMPLE_SIZE (8 + /* drm_i915_perf_record_header */ \
123 256) /* OA counter report */
124
125 struct gen_perf_query_result {
126 /**
127 * Storage for the final accumulated OA counters.
128 */
129 uint64_t accumulator[MAX_OA_REPORT_COUNTERS];
130
131 /**
132 * Hw ID used by the context on which the query was running.
133 */
134 uint32_t hw_id;
135
136 /**
137 * Number of reports accumulated to produce the results.
138 */
139 uint32_t reports_accumulated;
140
141 /**
142 * Frequency in the slices of the GT at the begin and end of the
143 * query.
144 */
145 uint64_t slice_frequency[2];
146
147 /**
148 * Frequency in the unslice of the GT at the begin and end of the
149 * query.
150 */
151 uint64_t unslice_frequency[2];
152
153 /**
154 * Timestamp of the query.
155 */
156 uint64_t begin_timestamp;
157
158 /**
159 * Whether the query was interrupted by another workload (aka preemption).
160 */
161 bool query_disjoint;
162 };
163
164 struct gen_perf_query_counter {
165 const char *name;
166 const char *desc;
167 const char *symbol_name;
168 const char *category;
169 enum gen_perf_counter_type type;
170 enum gen_perf_counter_data_type data_type;
171 enum gen_perf_counter_units units;
172 uint64_t raw_max;
173 size_t offset;
174
175 union {
176 uint64_t (*oa_counter_read_uint64)(struct gen_perf_config *perf,
177 const struct gen_perf_query_info *query,
178 const uint64_t *accumulator);
179 float (*oa_counter_read_float)(struct gen_perf_config *perf,
180 const struct gen_perf_query_info *query,
181 const uint64_t *accumulator);
182 struct gen_pipeline_stat pipeline_stat;
183 };
184 };
185
186 struct gen_perf_query_register_prog {
187 uint32_t reg;
188 uint32_t val;
189 };
190
191 /* Register programming for a given query */
192 struct gen_perf_registers {
193 const struct gen_perf_query_register_prog *flex_regs;
194 uint32_t n_flex_regs;
195
196 const struct gen_perf_query_register_prog *mux_regs;
197 uint32_t n_mux_regs;
198
199 const struct gen_perf_query_register_prog *b_counter_regs;
200 uint32_t n_b_counter_regs;
201 };
202
203 struct gen_perf_query_info {
204 enum gen_perf_query_type {
205 GEN_PERF_QUERY_TYPE_OA,
206 GEN_PERF_QUERY_TYPE_RAW,
207 GEN_PERF_QUERY_TYPE_PIPELINE,
208 } kind;
209 const char *name;
210 const char *symbol_name;
211 const char *guid;
212 struct gen_perf_query_counter *counters;
213 int n_counters;
214 int max_counters;
215 size_t data_size;
216
217 /* OA specific */
218 uint64_t oa_metrics_set_id;
219 int oa_format;
220
221 /* For indexing into the accumulator[] ... */
222 int gpu_time_offset;
223 int gpu_clock_offset;
224 int a_offset;
225 int b_offset;
226 int c_offset;
227
228 struct gen_perf_registers config;
229 };
230
231 struct gen_perf_query_counter_info {
232 struct gen_perf_query_counter *counter;
233
234 uint64_t query_mask;
235
236 /**
237 * Each counter can be a part of many groups, each time at different index.
238 * This struct stores one of those locations.
239 */
240 struct {
241 int group_idx; /* query/group number */
242 int counter_idx; /* index inside of query/group */
243 } location;
244 };
245
246 struct gen_perf_config {
247 /* Whether i915 has DRM_I915_QUERY_PERF_CONFIG support. */
248 bool i915_query_supported;
249
250 /* Version of the i915-perf subsystem, refer to i915_drm.h. */
251 int i915_perf_version;
252
253 /* Powergating configuration for the running the query. */
254 struct drm_i915_gem_context_param_sseu sseu;
255
256 struct gen_perf_query_info *queries;
257 int n_queries;
258
259 struct gen_perf_query_counter_info *counter_infos;
260 int n_counters;
261
262 /* Variables referenced in the XML meta data for OA performance
263 * counters, e.g in the normalization equations.
264 *
265 * All uint64_t for consistent operand types in generated code
266 */
267 struct {
268 uint64_t timestamp_frequency; /** $GpuTimestampFrequency */
269 uint64_t n_eus; /** $EuCoresTotalCount */
270 uint64_t n_eu_slices; /** $EuSlicesTotalCount */
271 uint64_t n_eu_sub_slices; /** $EuSubslicesTotalCount */
272 uint64_t eu_threads_count; /** $EuThreadsCount */
273 uint64_t slice_mask; /** $SliceMask */
274 uint64_t subslice_mask; /** $SubsliceMask */
275 uint64_t gt_min_freq; /** $GpuMinFrequency */
276 uint64_t gt_max_freq; /** $GpuMaxFrequency */
277 uint64_t revision; /** $SkuRevisionId */
278 } sys_vars;
279
280 /* OA metric sets, indexed by GUID, as know by Mesa at build time, to
281 * cross-reference with the GUIDs of configs advertised by the kernel at
282 * runtime
283 */
284 struct hash_table *oa_metrics_table;
285
286 /* Whether we have support for this platform. If true && n_queries == 0,
287 * this means we will not be able to use i915-perf because of it is in
288 * paranoid mode.
289 */
290 bool platform_supported;
291
292 /* Location of the device's sysfs entry. */
293 char sysfs_dev_dir[256];
294
295 struct {
296 void *(*bo_alloc)(void *bufmgr, const char *name, uint64_t size);
297 void (*bo_unreference)(void *bo);
298 void *(*bo_map)(void *ctx, void *bo, unsigned flags);
299 void (*bo_unmap)(void *bo);
300 bool (*batch_references)(void *batch, void *bo);
301 void (*bo_wait_rendering)(void *bo);
302 int (*bo_busy)(void *bo);
303 void (*emit_stall_at_pixel_scoreboard)(void *ctx);
304 void (*emit_mi_report_perf_count)(void *ctx,
305 void *bo,
306 uint32_t offset_in_bytes,
307 uint32_t report_id);
308 void (*batchbuffer_flush)(void *ctx,
309 const char *file, int line);
310 void (*store_register_mem)(void *ctx, void *bo, uint32_t reg, uint32_t reg_size, uint32_t offset);
311
312 } vtbl;
313 };
314
315 struct gen_perf_counter_pass {
316 struct gen_perf_query_info *query;
317 struct gen_perf_query_counter *counter;
318 uint32_t pass;
319 };
320
321 void gen_perf_init_metrics(struct gen_perf_config *perf_cfg,
322 const struct gen_device_info *devinfo,
323 int drm_fd,
324 bool include_pipeline_statistics);
325
326 /** Query i915 for a metric id using guid.
327 */
328 bool gen_perf_load_metric_id(struct gen_perf_config *perf_cfg,
329 const char *guid,
330 uint64_t *metric_id);
331
332 /** Load a configuation's content from i915 using a guid.
333 */
334 struct gen_perf_registers *gen_perf_load_configuration(struct gen_perf_config *perf_cfg,
335 int fd, const char *guid);
336
337 /** Store a configuration into i915 using guid and return a new metric id.
338 *
339 * If guid is NULL, then a generated one will be provided by hashing the
340 * content of the configuration.
341 */
342 uint64_t gen_perf_store_configuration(struct gen_perf_config *perf_cfg, int fd,
343 const struct gen_perf_registers *config,
344 const char *guid);
345
346 /** Read the slice/unslice frequency from 2 OA reports and store then into
347 * result.
348 */
349 void gen_perf_query_result_read_frequencies(struct gen_perf_query_result *result,
350 const struct gen_device_info *devinfo,
351 const uint32_t *start,
352 const uint32_t *end);
353 /** Accumulate the delta between 2 OA reports into result for a given query.
354 */
355 void gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
356 const struct gen_perf_query_info *query,
357 const uint32_t *start,
358 const uint32_t *end);
359 void gen_perf_query_result_clear(struct gen_perf_query_result *result);
360
361 static inline size_t
362 gen_perf_query_counter_get_size(const struct gen_perf_query_counter *counter)
363 {
364 switch (counter->data_type) {
365 case GEN_PERF_COUNTER_DATA_TYPE_BOOL32:
366 return sizeof(uint32_t);
367 case GEN_PERF_COUNTER_DATA_TYPE_UINT32:
368 return sizeof(uint32_t);
369 case GEN_PERF_COUNTER_DATA_TYPE_UINT64:
370 return sizeof(uint64_t);
371 case GEN_PERF_COUNTER_DATA_TYPE_FLOAT:
372 return sizeof(float);
373 case GEN_PERF_COUNTER_DATA_TYPE_DOUBLE:
374 return sizeof(double);
375 default:
376 unreachable("invalid counter data type");
377 }
378 }
379
380 static inline struct gen_perf_config *
381 gen_perf_new(void *ctx)
382 {
383 struct gen_perf_config *perf = rzalloc(ctx, struct gen_perf_config);
384 return perf;
385 }
386
387 uint32_t gen_perf_get_n_passes(struct gen_perf_config *perf,
388 const uint32_t *counter_indices,
389 uint32_t counter_indices_count,
390 struct gen_perf_query_info **pass_queries);
391 void gen_perf_get_counters_passes(struct gen_perf_config *perf,
392 const uint32_t *counter_indices,
393 uint32_t counter_indices_count,
394 struct gen_perf_counter_pass *counter_pass);
395
396 #endif /* GEN_PERF_H */