i965: extract performance query metrics
[mesa.git] / src / intel / perf / gen_perf.h
1 /*
2 * Copyright © 2018 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef GEN_PERF_H
25 #define GEN_PERF_H
26
27 #include <stdio.h>
28 #include <stdint.h>
29 #include <string.h>
30
31 #include <sys/sysmacros.h>
32
33 #include "util/hash_table.h"
34 #include "util/ralloc.h"
35
36 struct gen_device_info;
37
38 struct gen_perf;
39 struct gen_perf_query_info;
40
41 enum gen_perf_counter_type {
42 GEN_PERF_COUNTER_TYPE_EVENT,
43 GEN_PERF_COUNTER_TYPE_DURATION_NORM,
44 GEN_PERF_COUNTER_TYPE_DURATION_RAW,
45 GEN_PERF_COUNTER_TYPE_THROUGHPUT,
46 GEN_PERF_COUNTER_TYPE_RAW,
47 GEN_PERF_COUNTER_TYPE_TIMESTAMP,
48 };
49
50 enum gen_perf_counter_data_type {
51 GEN_PERF_COUNTER_DATA_TYPE_BOOL32,
52 GEN_PERF_COUNTER_DATA_TYPE_UINT32,
53 GEN_PERF_COUNTER_DATA_TYPE_UINT64,
54 GEN_PERF_COUNTER_DATA_TYPE_FLOAT,
55 GEN_PERF_COUNTER_DATA_TYPE_DOUBLE,
56 };
57
58 struct gen_pipeline_stat {
59 uint32_t reg;
60 uint32_t numerator;
61 uint32_t denominator;
62 };
63
64 struct gen_perf_query_counter {
65 const char *name;
66 const char *desc;
67 enum gen_perf_counter_type type;
68 enum gen_perf_counter_data_type data_type;
69 uint64_t raw_max;
70 size_t offset;
71 size_t size;
72
73 union {
74 uint64_t (*oa_counter_read_uint64)(struct gen_perf *perf,
75 const struct gen_perf_query_info *query,
76 uint64_t *accumulator);
77 float (*oa_counter_read_float)(struct gen_perf *perf,
78 const struct gen_perf_query_info *query,
79 uint64_t *accumulator);
80 struct gen_pipeline_stat pipeline_stat;
81 };
82 };
83
84 struct gen_perf_query_register_prog {
85 uint32_t reg;
86 uint32_t val;
87 };
88
89 struct gen_perf_query_info {
90 enum gen_perf_query_type {
91 GEN_PERF_QUERY_TYPE_OA,
92 GEN_PERF_QUERY_TYPE_RAW,
93 GEN_PERF_QUERY_TYPE_PIPELINE,
94 } kind;
95 const char *name;
96 const char *guid;
97 struct gen_perf_query_counter *counters;
98 int n_counters;
99 int max_counters;
100 size_t data_size;
101
102 /* OA specific */
103 uint64_t oa_metrics_set_id;
104 int oa_format;
105
106 /* For indexing into the accumulator[] ... */
107 int gpu_time_offset;
108 int gpu_clock_offset;
109 int a_offset;
110 int b_offset;
111 int c_offset;
112
113 /* Register programming for a given query */
114 struct gen_perf_query_register_prog *flex_regs;
115 uint32_t n_flex_regs;
116
117 struct gen_perf_query_register_prog *mux_regs;
118 uint32_t n_mux_regs;
119
120 struct gen_perf_query_register_prog *b_counter_regs;
121 uint32_t n_b_counter_regs;
122 };
123
124 struct gen_perf {
125 struct gen_perf_query_info *queries;
126 int n_queries;
127
128 /* Variables referenced in the XML meta data for OA performance
129 * counters, e.g in the normalization equations.
130 *
131 * All uint64_t for consistent operand types in generated code
132 */
133 struct {
134 uint64_t timestamp_frequency; /** $GpuTimestampFrequency */
135 uint64_t n_eus; /** $EuCoresTotalCount */
136 uint64_t n_eu_slices; /** $EuSlicesTotalCount */
137 uint64_t n_eu_sub_slices; /** $EuSubslicesTotalCount */
138 uint64_t eu_threads_count; /** $EuThreadsCount */
139 uint64_t slice_mask; /** $SliceMask */
140 uint64_t subslice_mask; /** $SubsliceMask */
141 uint64_t gt_min_freq; /** $GpuMinFrequency */
142 uint64_t gt_max_freq; /** $GpuMaxFrequency */
143 uint64_t revision; /** $SkuRevisionId */
144 } sys_vars;
145
146 /* OA metric sets, indexed by GUID, as know by Mesa at build time, to
147 * cross-reference with the GUIDs of configs advertised by the kernel at
148 * runtime
149 */
150 struct hash_table *oa_metrics_table;
151
152 /* Location of the device's sysfs entry. */
153 char sysfs_dev_dir[256];
154
155 int (*ioctl)(int, unsigned long, void *);
156 };
157
158 static inline struct gen_perf_query_info *
159 gen_perf_query_append_query_info(struct gen_perf *perf, int max_counters)
160 {
161 struct gen_perf_query_info *query;
162
163 perf->queries = reralloc(perf, perf->queries,
164 struct gen_perf_query_info,
165 ++perf->n_queries);
166 query = &perf->queries[perf->n_queries - 1];
167 memset(query, 0, sizeof(*query));
168
169 if (max_counters > 0) {
170 query->max_counters = max_counters;
171 query->counters =
172 rzalloc_array(perf, struct gen_perf_query_counter, max_counters);
173 }
174
175 return query;
176 }
177
178 static inline void
179 gen_perf_query_info_add_stat_reg(struct gen_perf_query_info *query,
180 uint32_t reg,
181 uint32_t numerator,
182 uint32_t denominator,
183 const char *name,
184 const char *description)
185 {
186 struct gen_perf_query_counter *counter;
187
188 assert(query->n_counters < query->max_counters);
189
190 counter = &query->counters[query->n_counters];
191 counter->name = name;
192 counter->desc = description;
193 counter->type = GEN_PERF_COUNTER_TYPE_RAW;
194 counter->data_type = GEN_PERF_COUNTER_DATA_TYPE_UINT64;
195 counter->size = sizeof(uint64_t);
196 counter->offset = sizeof(uint64_t) * query->n_counters;
197 counter->pipeline_stat.reg = reg;
198 counter->pipeline_stat.numerator = numerator;
199 counter->pipeline_stat.denominator = denominator;
200
201 query->n_counters++;
202 }
203
204 static inline void
205 gen_perf_query_info_add_basic_stat_reg(struct gen_perf_query_info *query,
206 uint32_t reg, const char *name)
207 {
208 gen_perf_query_info_add_stat_reg(query, reg, 1, 1, name, name);
209 }
210
211 /* Accumulate 32bits OA counters */
212 static inline void
213 gen_perf_query_accumulate_uint32(const uint32_t *report0,
214 const uint32_t *report1,
215 uint64_t *accumulator)
216 {
217 *accumulator += (uint32_t)(*report1 - *report0);
218 }
219
220 /* Accumulate 40bits OA counters */
221 static inline void
222 gen_perf_query_accumulate_uint40(int a_index,
223 const uint32_t *report0,
224 const uint32_t *report1,
225 uint64_t *accumulator)
226 {
227 const uint8_t *high_bytes0 = (uint8_t *)(report0 + 40);
228 const uint8_t *high_bytes1 = (uint8_t *)(report1 + 40);
229 uint64_t high0 = (uint64_t)(high_bytes0[a_index]) << 32;
230 uint64_t high1 = (uint64_t)(high_bytes1[a_index]) << 32;
231 uint64_t value0 = report0[a_index + 4] | high0;
232 uint64_t value1 = report1[a_index + 4] | high1;
233 uint64_t delta;
234
235 if (value0 > value1)
236 delta = (1ULL << 40) + value1 - value0;
237 else
238 delta = value1 - value0;
239
240 *accumulator += delta;
241 }
242
243 static inline struct gen_perf *
244 gen_perf_new(void *ctx, int (*ioctl_cb)(int, unsigned long, void *))
245 {
246 struct gen_perf *perf = rzalloc(ctx, struct gen_perf);
247
248 perf->ioctl = ioctl_cb;
249
250 return perf;
251 }
252
253 bool gen_perf_load_oa_metrics(struct gen_perf *perf, int fd,
254 const struct gen_device_info *devinfo);
255 bool gen_perf_load_metric_id(struct gen_perf *perf, const char *guid,
256 uint64_t *metric_id);
257
258 #endif /* GEN_PERF_H */