src/intel/perf/gen_perf.h

   1 /*
   2  * Copyright © 2018 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef GEN_PERF_H
  25 #define GEN_PERF_H
  26
  27 #include <stdio.h>
  28 #include <stdbool.h>
  29 #include <stdint.h>
  30 #include <string.h>
  31
  32 #if defined(MAJOR_IN_SYSMACROS)
  33 #include <sys/sysmacros.h>
  34 #elif defined(MAJOR_IN_MKDEV)
  35 #include <sys/mkdev.h>
  36 #endif
  37
  38 #include "util/hash_table.h"
  39 #include "compiler/glsl/list.h"
  40 #include "util/ralloc.h"
  41
  42 #include "drm-uapi/i915_drm.h"
  43
  44 struct gen_device_info;
  45
  46 struct gen_perf_config;
  47 struct gen_perf_query_info;
  48
  49 enum gen_perf_counter_type {
  50    GEN_PERF_COUNTER_TYPE_EVENT,
  51    GEN_PERF_COUNTER_TYPE_DURATION_NORM,
  52    GEN_PERF_COUNTER_TYPE_DURATION_RAW,
  53    GEN_PERF_COUNTER_TYPE_THROUGHPUT,
  54    GEN_PERF_COUNTER_TYPE_RAW,
  55    GEN_PERF_COUNTER_TYPE_TIMESTAMP,
  56 };
  57
  58 enum gen_perf_counter_data_type {
  59    GEN_PERF_COUNTER_DATA_TYPE_BOOL32,
  60    GEN_PERF_COUNTER_DATA_TYPE_UINT32,
  61    GEN_PERF_COUNTER_DATA_TYPE_UINT64,
  62    GEN_PERF_COUNTER_DATA_TYPE_FLOAT,
  63    GEN_PERF_COUNTER_DATA_TYPE_DOUBLE,
  64 };
  65
  66 enum gen_perf_counter_units {
  67    /* size */
  68    GEN_PERF_COUNTER_UNITS_BYTES,
  69
  70    /* frequency */
  71    GEN_PERF_COUNTER_UNITS_HZ,
  72
  73    /* time */
  74    GEN_PERF_COUNTER_UNITS_NS,
  75    GEN_PERF_COUNTER_UNITS_US,
  76
  77    /**/
  78    GEN_PERF_COUNTER_UNITS_PIXELS,
  79    GEN_PERF_COUNTER_UNITS_TEXELS,
  80    GEN_PERF_COUNTER_UNITS_THREADS,
  81    GEN_PERF_COUNTER_UNITS_PERCENT,
  82
  83    /* events */
  84    GEN_PERF_COUNTER_UNITS_MESSAGES,
  85    GEN_PERF_COUNTER_UNITS_NUMBER,
  86    GEN_PERF_COUNTER_UNITS_CYCLES,
  87    GEN_PERF_COUNTER_UNITS_EVENTS,
  88    GEN_PERF_COUNTER_UNITS_UTILIZATION,
  89
  90    /**/
  91    GEN_PERF_COUNTER_UNITS_EU_SENDS_TO_L3_CACHE_LINES,
  92    GEN_PERF_COUNTER_UNITS_EU_ATOMIC_REQUESTS_TO_L3_CACHE_LINES,
  93    GEN_PERF_COUNTER_UNITS_EU_REQUESTS_TO_L3_CACHE_LINES,
  94    GEN_PERF_COUNTER_UNITS_EU_BYTES_PER_L3_CACHE_LINE,
  95
  96    GEN_PERF_COUNTER_UNITS_MAX
  97 };
  98
  99 struct gen_pipeline_stat {
 100    uint32_t reg;
 101    uint32_t numerator;
 102    uint32_t denominator;
 103 };
 104
 105 /*
 106  * The largest OA formats we can use include:
 107  * For Haswell:
 108  *   1 timestamp, 45 A counters, 8 B counters and 8 C counters.
 109  * For Gen8+
 110  *   1 timestamp, 1 clock, 36 A counters, 8 B counters and 8 C counters
 111  */
 112 #define MAX_OA_REPORT_COUNTERS 62
 113
 114 /*
 115  * When currently allocate only one page for pipeline statistics queries. Here
 116  * we derived the maximum number of counters for that amount.
 117  */
 118 #define STATS_BO_SIZE               4096
 119 #define STATS_BO_END_OFFSET_BYTES   (STATS_BO_SIZE / 2)
 120 #define MAX_STAT_COUNTERS           (STATS_BO_END_OFFSET_BYTES / 8)
 121
 122 #define I915_PERF_OA_SAMPLE_SIZE (8 +   /* drm_i915_perf_record_header */ \
 123                                   256)  /* OA counter report */
 124
 125 struct gen_perf_query_result {
 126    /**
 127     * Storage for the final accumulated OA counters.
 128     */
 129    uint64_t accumulator[MAX_OA_REPORT_COUNTERS];
 130
 131    /**
 132     * Hw ID used by the context on which the query was running.
 133     */
 134    uint32_t hw_id;
 135
 136    /**
 137     * Number of reports accumulated to produce the results.
 138     */
 139    uint32_t reports_accumulated;
 140
 141    /**
 142     * Frequency in the slices of the GT at the begin and end of the
 143     * query.
 144     */
 145    uint64_t slice_frequency[2];
 146
 147    /**
 148     * Frequency in the unslice of the GT at the begin and end of the
 149     * query.
 150     */
 151    uint64_t unslice_frequency[2];
 152
 153    /**
 154     * Timestamp of the query.
 155     */
 156    uint64_t begin_timestamp;
 157
 158    /**
 159     * Whether the query was interrupted by another workload (aka preemption).
 160     */
 161    bool query_disjoint;
 162 };
 163
 164 struct gen_perf_query_counter {
 165    const char *name;
 166    const char *desc;
 167    const char *symbol_name;
 168    const char *category;
 169    enum gen_perf_counter_type type;
 170    enum gen_perf_counter_data_type data_type;
 171    enum gen_perf_counter_units units;
 172    uint64_t raw_max;
 173    size_t offset;
 174
 175    union {
 176       uint64_t (*oa_counter_read_uint64)(struct gen_perf_config *perf,
 177                                          const struct gen_perf_query_info *query,
 178                                          const uint64_t *accumulator);
 179       float (*oa_counter_read_float)(struct gen_perf_config *perf,
 180                                      const struct gen_perf_query_info *query,
 181                                      const uint64_t *accumulator);
 182       struct gen_pipeline_stat pipeline_stat;
 183    };
 184 };
 185
 186 struct gen_perf_query_register_prog {
 187    uint32_t reg;
 188    uint32_t val;
 189 };
 190
 191 /* Register programming for a given query */
 192 struct gen_perf_registers {
 193    struct gen_perf_query_register_prog *flex_regs;
 194    uint32_t n_flex_regs;
 195
 196    struct gen_perf_query_register_prog *mux_regs;
 197    uint32_t n_mux_regs;
 198
 199    struct gen_perf_query_register_prog *b_counter_regs;
 200    uint32_t n_b_counter_regs;
 201 };
 202
 203 struct gen_perf_query_info {
 204    enum gen_perf_query_type {
 205       GEN_PERF_QUERY_TYPE_OA,
 206       GEN_PERF_QUERY_TYPE_RAW,
 207       GEN_PERF_QUERY_TYPE_PIPELINE,
 208    } kind;
 209    const char *name;
 210    const char *guid;
 211    struct gen_perf_query_counter *counters;
 212    int n_counters;
 213    int max_counters;
 214    size_t data_size;
 215
 216    /* OA specific */
 217    uint64_t oa_metrics_set_id;
 218    int oa_format;
 219
 220    /* For indexing into the accumulator[] ... */
 221    int gpu_time_offset;
 222    int gpu_clock_offset;
 223    int a_offset;
 224    int b_offset;
 225    int c_offset;
 226
 227    struct gen_perf_registers config;
 228 };
 229
 230 struct gen_perf_query_counter_info {
 231    struct gen_perf_query_counter *counter;
 232
 233    uint64_t query_mask;
 234
 235    /**
 236     * Each counter can be a part of many groups, each time at different index.
 237     * This struct stores one of those locations.
 238     */
 239    struct {
 240       int group_idx; /* query/group number */
 241       int counter_idx; /* index inside of query/group */
 242    } location;
 243 };
 244
 245 struct gen_perf_config {
 246    /* Whether i915 has DRM_I915_QUERY_PERF_CONFIG support. */
 247    bool i915_query_supported;
 248
 249    /* Version of the i915-perf subsystem, refer to i915_drm.h. */
 250    int i915_perf_version;
 251
 252    /* Powergating configuration for the running the query. */
 253    struct drm_i915_gem_context_param_sseu sseu;
 254
 255    struct gen_perf_query_info *queries;
 256    int n_queries;
 257
 258    struct gen_perf_query_counter_info *counter_infos;
 259    int n_counters;
 260
 261    /* Variables referenced in the XML meta data for OA performance
 262     * counters, e.g in the normalization equations.
 263     *
 264     * All uint64_t for consistent operand types in generated code
 265     */
 266    struct {
 267       uint64_t timestamp_frequency; /** $GpuTimestampFrequency */
 268       uint64_t n_eus;               /** $EuCoresTotalCount */
 269       uint64_t n_eu_slices;         /** $EuSlicesTotalCount */
 270       uint64_t n_eu_sub_slices;     /** $EuSubslicesTotalCount */
 271       uint64_t eu_threads_count;    /** $EuThreadsCount */
 272       uint64_t slice_mask;          /** $SliceMask */
 273       uint64_t subslice_mask;       /** $SubsliceMask */
 274       uint64_t gt_min_freq;         /** $GpuMinFrequency */
 275       uint64_t gt_max_freq;         /** $GpuMaxFrequency */
 276       uint64_t revision;            /** $SkuRevisionId */
 277    } sys_vars;
 278
 279    /* OA metric sets, indexed by GUID, as know by Mesa at build time, to
 280     * cross-reference with the GUIDs of configs advertised by the kernel at
 281     * runtime
 282     */
 283    struct hash_table *oa_metrics_table;
 284
 285    /* Whether we have support for this platform. If true && n_queries == 0,
 286     * this means we will not be able to use i915-perf because of it is in
 287     * paranoid mode.
 288     */
 289    bool platform_supported;
 290
 291    /* Location of the device's sysfs entry. */
 292    char sysfs_dev_dir[256];
 293
 294    struct {
 295       void *(*bo_alloc)(void *bufmgr, const char *name, uint64_t size);
 296       void (*bo_unreference)(void *bo);
 297       void *(*bo_map)(void *ctx, void *bo, unsigned flags);
 298       void (*bo_unmap)(void *bo);
 299       bool (*batch_references)(void *batch, void *bo);
 300       void (*bo_wait_rendering)(void *bo);
 301       int (*bo_busy)(void *bo);
 302       void (*emit_stall_at_pixel_scoreboard)(void *ctx);
 303       void (*emit_mi_report_perf_count)(void *ctx,
 304                                         void *bo,
 305                                         uint32_t offset_in_bytes,
 306                                         uint32_t report_id);
 307       void (*batchbuffer_flush)(void *ctx,
 308                                 const char *file, int line);
 309       void (*store_register_mem)(void *ctx, void *bo, uint32_t reg, uint32_t reg_size, uint32_t offset);
 310
 311    } vtbl;
 312 };
 313
 314 struct gen_perf_counter_pass {
 315    struct gen_perf_query_info *query;
 316    struct gen_perf_query_counter *counter;
 317    uint32_t pass;
 318 };
 319
 320 void gen_perf_init_metrics(struct gen_perf_config *perf_cfg,
 321                            const struct gen_device_info *devinfo,
 322                            int drm_fd,
 323                            bool include_pipeline_statistics);
 324
 325 /** Query i915 for a metric id using guid.
 326  */
 327 bool gen_perf_load_metric_id(struct gen_perf_config *perf_cfg,
 328                              const char *guid,
 329                              uint64_t *metric_id);
 330
 331 /** Load a configuation's content from i915 using a guid.
 332  */
 333 struct gen_perf_registers *gen_perf_load_configuration(struct gen_perf_config *perf_cfg,
 334                                                       int fd, const char *guid);
 335
 336 /** Store a configuration into i915 using guid and return a new metric id.
 337  *
 338  * If guid is NULL, then a generated one will be provided by hashing the
 339  * content of the configuration.
 340  */
 341 uint64_t gen_perf_store_configuration(struct gen_perf_config *perf_cfg, int fd,
 342                                       const struct gen_perf_registers *config,
 343                                       const char *guid);
 344
 345 /** Read the slice/unslice frequency from 2 OA reports and store then into
 346  *  result.
 347  */
 348 void gen_perf_query_result_read_frequencies(struct gen_perf_query_result *result,
 349                                             const struct gen_device_info *devinfo,
 350                                             const uint32_t *start,
 351                                             const uint32_t *end);
 352 /** Accumulate the delta between 2 OA reports into result for a given query.
 353  */
 354 void gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
 355                                       const struct gen_perf_query_info *query,
 356                                       const uint32_t *start,
 357                                       const uint32_t *end);
 358 void gen_perf_query_result_clear(struct gen_perf_query_result *result);
 359
 360 static inline size_t
 361 gen_perf_query_counter_get_size(const struct gen_perf_query_counter *counter)
 362 {
 363    switch (counter->data_type) {
 364    case GEN_PERF_COUNTER_DATA_TYPE_BOOL32:
 365       return sizeof(uint32_t);
 366    case GEN_PERF_COUNTER_DATA_TYPE_UINT32:
 367       return sizeof(uint32_t);
 368    case GEN_PERF_COUNTER_DATA_TYPE_UINT64:
 369       return sizeof(uint64_t);
 370    case GEN_PERF_COUNTER_DATA_TYPE_FLOAT:
 371       return sizeof(float);
 372    case GEN_PERF_COUNTER_DATA_TYPE_DOUBLE:
 373       return sizeof(double);
 374    default:
 375       unreachable("invalid counter data type");
 376    }
 377 }
 378
 379 static inline struct gen_perf_config *
 380 gen_perf_new(void *ctx)
 381 {
 382    struct gen_perf_config *perf = rzalloc(ctx, struct gen_perf_config);
 383    return perf;
 384 }
 385
 386 uint32_t gen_perf_get_n_passes(struct gen_perf_config *perf,
 387                                const uint32_t *counter_indices,
 388                                uint32_t counter_indices_count,
 389                                struct gen_perf_query_info **pass_queries);
 390 void gen_perf_get_counters_passes(struct gen_perf_config *perf,
 391                                   const uint32_t *counter_indices,
 392                                   uint32_t counter_indices_count,
 393                                   struct gen_perf_counter_pass *counter_pass);
 394
 395 #endif /* GEN_PERF_H */