src/intel/perf/gen_perf.h

   1 /*
   2  * Copyright © 2018 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef GEN_PERF_H
  25 #define GEN_PERF_H
  26
  27 #include <stdio.h>
  28 #include <stdint.h>
  29 #include <string.h>
  30
  31 #if defined(MAJOR_IN_SYSMACROS)
  32 #include <sys/sysmacros.h>
  33 #elif defined(MAJOR_IN_MKDEV)
  34 #include <sys/mkdev.h>
  35 #endif
  36
  37 #include "util/hash_table.h"
  38 #include "compiler/glsl/list.h"
  39 #include "util/ralloc.h"
  40
  41 #include "drm-uapi/i915_drm.h"
  42
  43 struct gen_device_info;
  44
  45 struct gen_perf_config;
  46 struct gen_perf_query_info;
  47
  48 enum gen_perf_counter_type {
  49    GEN_PERF_COUNTER_TYPE_EVENT,
  50    GEN_PERF_COUNTER_TYPE_DURATION_NORM,
  51    GEN_PERF_COUNTER_TYPE_DURATION_RAW,
  52    GEN_PERF_COUNTER_TYPE_THROUGHPUT,
  53    GEN_PERF_COUNTER_TYPE_RAW,
  54    GEN_PERF_COUNTER_TYPE_TIMESTAMP,
  55 };
  56
  57 enum gen_perf_counter_data_type {
  58    GEN_PERF_COUNTER_DATA_TYPE_BOOL32,
  59    GEN_PERF_COUNTER_DATA_TYPE_UINT32,
  60    GEN_PERF_COUNTER_DATA_TYPE_UINT64,
  61    GEN_PERF_COUNTER_DATA_TYPE_FLOAT,
  62    GEN_PERF_COUNTER_DATA_TYPE_DOUBLE,
  63 };
  64
  65 struct gen_pipeline_stat {
  66    uint32_t reg;
  67    uint32_t numerator;
  68    uint32_t denominator;
  69 };
  70
  71 /*
  72  * The largest OA formats we can use include:
  73  * For Haswell:
  74  *   1 timestamp, 45 A counters, 8 B counters and 8 C counters.
  75  * For Gen8+
  76  *   1 timestamp, 1 clock, 36 A counters, 8 B counters and 8 C counters
  77  */
  78 #define MAX_OA_REPORT_COUNTERS 62
  79
  80 /*
  81  * When currently allocate only one page for pipeline statistics queries. Here
  82  * we derived the maximum number of counters for that amount.
  83  */
  84 #define STATS_BO_SIZE               4096
  85 #define STATS_BO_END_OFFSET_BYTES   (STATS_BO_SIZE / 2)
  86 #define MAX_STAT_COUNTERS           (STATS_BO_END_OFFSET_BYTES / 8)
  87
  88 #define I915_PERF_OA_SAMPLE_SIZE (8 +   /* drm_i915_perf_record_header */ \
  89                                   256)  /* OA counter report */
  90
  91 struct gen_perf_query_result {
  92    /**
  93     * Storage for the final accumulated OA counters.
  94     */
  95    uint64_t accumulator[MAX_OA_REPORT_COUNTERS];
  96
  97    /**
  98     * Hw ID used by the context on which the query was running.
  99     */
 100    uint32_t hw_id;
 101
 102    /**
 103     * Number of reports accumulated to produce the results.
 104     */
 105    uint32_t reports_accumulated;
 106
 107    /**
 108     * Frequency in the slices of the GT at the begin and end of the
 109     * query.
 110     */
 111    uint64_t slice_frequency[2];
 112
 113    /**
 114     * Frequency in the unslice of the GT at the begin and end of the
 115     * query.
 116     */
 117    uint64_t unslice_frequency[2];
 118
 119    /**
 120     * Timestamp of the query.
 121     */
 122    uint64_t begin_timestamp;
 123
 124    /**
 125     * Whether the query was interrupted by another workload (aka preemption).
 126     */
 127    bool query_disjoint;
 128 };
 129
 130 struct gen_perf_query_counter {
 131    const char *name;
 132    const char *desc;
 133    enum gen_perf_counter_type type;
 134    enum gen_perf_counter_data_type data_type;
 135    uint64_t raw_max;
 136    size_t offset;
 137
 138    union {
 139       uint64_t (*oa_counter_read_uint64)(struct gen_perf_config *perf,
 140                                          const struct gen_perf_query_info *query,
 141                                          const uint64_t *accumulator);
 142       float (*oa_counter_read_float)(struct gen_perf_config *perf,
 143                                      const struct gen_perf_query_info *query,
 144                                      const uint64_t *accumulator);
 145       struct gen_pipeline_stat pipeline_stat;
 146    };
 147 };
 148
 149 struct gen_perf_query_register_prog {
 150    uint32_t reg;
 151    uint32_t val;
 152 };
 153
 154 /* Register programming for a given query */
 155 struct gen_perf_registers {
 156    struct gen_perf_query_register_prog *flex_regs;
 157    uint32_t n_flex_regs;
 158
 159    struct gen_perf_query_register_prog *mux_regs;
 160    uint32_t n_mux_regs;
 161
 162    struct gen_perf_query_register_prog *b_counter_regs;
 163    uint32_t n_b_counter_regs;
 164 };
 165
 166 struct gen_perf_query_info {
 167    enum gen_perf_query_type {
 168       GEN_PERF_QUERY_TYPE_OA,
 169       GEN_PERF_QUERY_TYPE_RAW,
 170       GEN_PERF_QUERY_TYPE_PIPELINE,
 171    } kind;
 172    const char *name;
 173    const char *guid;
 174    struct gen_perf_query_counter *counters;
 175    int n_counters;
 176    int max_counters;
 177    size_t data_size;
 178
 179    /* OA specific */
 180    uint64_t oa_metrics_set_id;
 181    int oa_format;
 182
 183    /* For indexing into the accumulator[] ... */
 184    int gpu_time_offset;
 185    int gpu_clock_offset;
 186    int a_offset;
 187    int b_offset;
 188    int c_offset;
 189
 190    struct gen_perf_registers config;
 191 };
 192
 193 struct gen_perf_config {
 194    /* Whether i915 has DRM_I915_QUERY_PERF_CONFIG support. */
 195    bool i915_query_supported;
 196
 197    /* Version of the i915-perf subsystem, refer to i915_drm.h. */
 198    int i915_perf_version;
 199
 200    /* Powergating configuration for the running the query. */
 201    struct drm_i915_gem_context_param_sseu sseu;
 202
 203    struct gen_perf_query_info *queries;
 204    int n_queries;
 205
 206    /* Variables referenced in the XML meta data for OA performance
 207     * counters, e.g in the normalization equations.
 208     *
 209     * All uint64_t for consistent operand types in generated code
 210     */
 211    struct {
 212       uint64_t timestamp_frequency; /** $GpuTimestampFrequency */
 213       uint64_t n_eus;               /** $EuCoresTotalCount */
 214       uint64_t n_eu_slices;         /** $EuSlicesTotalCount */
 215       uint64_t n_eu_sub_slices;     /** $EuSubslicesTotalCount */
 216       uint64_t eu_threads_count;    /** $EuThreadsCount */
 217       uint64_t slice_mask;          /** $SliceMask */
 218       uint64_t subslice_mask;       /** $SubsliceMask */
 219       uint64_t gt_min_freq;         /** $GpuMinFrequency */
 220       uint64_t gt_max_freq;         /** $GpuMaxFrequency */
 221       uint64_t revision;            /** $SkuRevisionId */
 222    } sys_vars;
 223
 224    /* OA metric sets, indexed by GUID, as know by Mesa at build time, to
 225     * cross-reference with the GUIDs of configs advertised by the kernel at
 226     * runtime
 227     */
 228    struct hash_table *oa_metrics_table;
 229
 230    /* Location of the device's sysfs entry. */
 231    char sysfs_dev_dir[256];
 232
 233    struct {
 234       void *(*bo_alloc)(void *bufmgr, const char *name, uint64_t size);
 235       void (*bo_unreference)(void *bo);
 236       void *(*bo_map)(void *ctx, void *bo, unsigned flags);
 237       void (*bo_unmap)(void *bo);
 238       bool (*batch_references)(void *batch, void *bo);
 239       void (*bo_wait_rendering)(void *bo);
 240       int (*bo_busy)(void *bo);
 241       void (*emit_stall_at_pixel_scoreboard)(void *ctx);
 242       void (*emit_mi_report_perf_count)(void *ctx,
 243                                         void *bo,
 244                                         uint32_t offset_in_bytes,
 245                                         uint32_t report_id);
 246       void (*batchbuffer_flush)(void *ctx,
 247                                 const char *file, int line);
 248       void (*store_register_mem)(void *ctx, void *bo, uint32_t reg, uint32_t reg_size, uint32_t offset);
 249
 250    } vtbl;
 251 };
 252
 253 void gen_perf_init_metrics(struct gen_perf_config *perf_cfg,
 254                            const struct gen_device_info *devinfo,
 255                            int drm_fd,
 256                            bool include_pipeline_statistics);
 257
 258 /** Query i915 for a metric id using guid.
 259  */
 260 bool gen_perf_load_metric_id(struct gen_perf_config *perf_cfg,
 261                              const char *guid,
 262                              uint64_t *metric_id);
 263
 264 /** Load a configuation's content from i915 using a guid.
 265  */
 266 struct gen_perf_registers *gen_perf_load_configuration(struct gen_perf_config *perf_cfg,
 267                                                       int fd, const char *guid);
 268
 269 /** Store a configuration into i915 using guid and return a new metric id.
 270  *
 271  * If guid is NULL, then a generated one will be provided by hashing the
 272  * content of the configuration.
 273  */
 274 uint64_t gen_perf_store_configuration(struct gen_perf_config *perf_cfg, int fd,
 275                                       const struct gen_perf_registers *config,
 276                                       const char *guid);
 277
 278 /** Read the slice/unslice frequency from 2 OA reports and store then into
 279  *  result.
 280  */
 281 void gen_perf_query_result_read_frequencies(struct gen_perf_query_result *result,
 282                                             const struct gen_device_info *devinfo,
 283                                             const uint32_t *start,
 284                                             const uint32_t *end);
 285 /** Accumulate the delta between 2 OA reports into result for a given query.
 286  */
 287 void gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
 288                                       const struct gen_perf_query_info *query,
 289                                       const uint32_t *start,
 290                                       const uint32_t *end);
 291 void gen_perf_query_result_clear(struct gen_perf_query_result *result);
 292
 293 static inline size_t
 294 gen_perf_query_counter_get_size(const struct gen_perf_query_counter *counter)
 295 {
 296    switch (counter->data_type) {
 297    case GEN_PERF_COUNTER_DATA_TYPE_BOOL32:
 298       return sizeof(uint32_t);
 299    case GEN_PERF_COUNTER_DATA_TYPE_UINT32:
 300       return sizeof(uint32_t);
 301    case GEN_PERF_COUNTER_DATA_TYPE_UINT64:
 302       return sizeof(uint64_t);
 303    case GEN_PERF_COUNTER_DATA_TYPE_FLOAT:
 304       return sizeof(float);
 305    case GEN_PERF_COUNTER_DATA_TYPE_DOUBLE:
 306       return sizeof(double);
 307    default:
 308       unreachable("invalid counter data type");
 309    }
 310 }
 311
 312 static inline struct gen_perf_config *
 313 gen_perf_new(void *ctx)
 314 {
 315    struct gen_perf_config *perf = rzalloc(ctx, struct gen_perf_config);
 316    return perf;
 317 }
 318
 319 #endif /* GEN_PERF_H */