src/intel/perf/gen_perf.h

   1 /*
   2  * Copyright © 2018 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef GEN_PERF_H
  25 #define GEN_PERF_H
  26
  27 #include <stdio.h>
  28 #include <stdint.h>
  29 #include <string.h>
  30
  31 #if defined(MAJOR_IN_SYSMACROS)
  32 #include <sys/sysmacros.h>
  33 #elif defined(MAJOR_IN_MKDEV)
  34 #include <sys/mkdev.h>
  35 #endif
  36
  37 #include "util/hash_table.h"
  38 #include "compiler/glsl/list.h"
  39 #include "util/ralloc.h"
  40
  41 #include "drm-uapi/i915_drm.h"
  42
  43 struct gen_device_info;
  44
  45 struct gen_perf_config;
  46 struct gen_perf_query_info;
  47
  48 enum gen_perf_counter_type {
  49    GEN_PERF_COUNTER_TYPE_EVENT,
  50    GEN_PERF_COUNTER_TYPE_DURATION_NORM,
  51    GEN_PERF_COUNTER_TYPE_DURATION_RAW,
  52    GEN_PERF_COUNTER_TYPE_THROUGHPUT,
  53    GEN_PERF_COUNTER_TYPE_RAW,
  54    GEN_PERF_COUNTER_TYPE_TIMESTAMP,
  55 };
  56
  57 enum gen_perf_counter_data_type {
  58    GEN_PERF_COUNTER_DATA_TYPE_BOOL32,
  59    GEN_PERF_COUNTER_DATA_TYPE_UINT32,
  60    GEN_PERF_COUNTER_DATA_TYPE_UINT64,
  61    GEN_PERF_COUNTER_DATA_TYPE_FLOAT,
  62    GEN_PERF_COUNTER_DATA_TYPE_DOUBLE,
  63 };
  64
  65 enum gen_perf_counter_units {
  66    /* size */
  67    GEN_PERF_COUNTER_UNITS_BYTES,
  68
  69    /* frequency */
  70    GEN_PERF_COUNTER_UNITS_HZ,
  71
  72    /* time */
  73    GEN_PERF_COUNTER_UNITS_NS,
  74    GEN_PERF_COUNTER_UNITS_US,
  75
  76    /**/
  77    GEN_PERF_COUNTER_UNITS_PIXELS,
  78    GEN_PERF_COUNTER_UNITS_TEXELS,
  79    GEN_PERF_COUNTER_UNITS_THREADS,
  80    GEN_PERF_COUNTER_UNITS_PERCENT,
  81
  82    /* events */
  83    GEN_PERF_COUNTER_UNITS_MESSAGES,
  84    GEN_PERF_COUNTER_UNITS_NUMBER,
  85    GEN_PERF_COUNTER_UNITS_CYCLES,
  86    GEN_PERF_COUNTER_UNITS_EVENTS,
  87    GEN_PERF_COUNTER_UNITS_UTILIZATION,
  88
  89    /**/
  90    GEN_PERF_COUNTER_UNITS_EU_SENDS_TO_L3_CACHE_LINES,
  91    GEN_PERF_COUNTER_UNITS_EU_ATOMIC_REQUESTS_TO_L3_CACHE_LINES,
  92    GEN_PERF_COUNTER_UNITS_EU_REQUESTS_TO_L3_CACHE_LINES,
  93    GEN_PERF_COUNTER_UNITS_EU_BYTES_PER_L3_CACHE_LINE,
  94
  95    GEN_PERF_COUNTER_UNITS_MAX
  96 };
  97
  98 struct gen_pipeline_stat {
  99    uint32_t reg;
 100    uint32_t numerator;
 101    uint32_t denominator;
 102 };
 103
 104 /*
 105  * The largest OA formats we can use include:
 106  * For Haswell:
 107  *   1 timestamp, 45 A counters, 8 B counters and 8 C counters.
 108  * For Gen8+
 109  *   1 timestamp, 1 clock, 36 A counters, 8 B counters and 8 C counters
 110  */
 111 #define MAX_OA_REPORT_COUNTERS 62
 112
 113 /*
 114  * When currently allocate only one page for pipeline statistics queries. Here
 115  * we derived the maximum number of counters for that amount.
 116  */
 117 #define STATS_BO_SIZE               4096
 118 #define STATS_BO_END_OFFSET_BYTES   (STATS_BO_SIZE / 2)
 119 #define MAX_STAT_COUNTERS           (STATS_BO_END_OFFSET_BYTES / 8)
 120
 121 #define I915_PERF_OA_SAMPLE_SIZE (8 +   /* drm_i915_perf_record_header */ \
 122                                   256)  /* OA counter report */
 123
 124 struct gen_perf_query_result {
 125    /**
 126     * Storage for the final accumulated OA counters.
 127     */
 128    uint64_t accumulator[MAX_OA_REPORT_COUNTERS];
 129
 130    /**
 131     * Hw ID used by the context on which the query was running.
 132     */
 133    uint32_t hw_id;
 134
 135    /**
 136     * Number of reports accumulated to produce the results.
 137     */
 138    uint32_t reports_accumulated;
 139
 140    /**
 141     * Frequency in the slices of the GT at the begin and end of the
 142     * query.
 143     */
 144    uint64_t slice_frequency[2];
 145
 146    /**
 147     * Frequency in the unslice of the GT at the begin and end of the
 148     * query.
 149     */
 150    uint64_t unslice_frequency[2];
 151
 152    /**
 153     * Timestamp of the query.
 154     */
 155    uint64_t begin_timestamp;
 156
 157    /**
 158     * Whether the query was interrupted by another workload (aka preemption).
 159     */
 160    bool query_disjoint;
 161 };
 162
 163 struct gen_perf_query_counter {
 164    const char *name;
 165    const char *desc;
 166    const char *symbol_name;
 167    const char *category;
 168    enum gen_perf_counter_type type;
 169    enum gen_perf_counter_data_type data_type;
 170    enum gen_perf_counter_units units;
 171    uint64_t raw_max;
 172    size_t offset;
 173    uint64_t query_mask;
 174
 175    union {
 176       uint64_t (*oa_counter_read_uint64)(struct gen_perf_config *perf,
 177                                          const struct gen_perf_query_info *query,
 178                                          const uint64_t *accumulator);
 179       float (*oa_counter_read_float)(struct gen_perf_config *perf,
 180                                      const struct gen_perf_query_info *query,
 181                                      const uint64_t *accumulator);
 182       struct gen_pipeline_stat pipeline_stat;
 183    };
 184 };
 185
 186 struct gen_perf_query_register_prog {
 187    uint32_t reg;
 188    uint32_t val;
 189 };
 190
 191 /* Register programming for a given query */
 192 struct gen_perf_registers {
 193    struct gen_perf_query_register_prog *flex_regs;
 194    uint32_t n_flex_regs;
 195
 196    struct gen_perf_query_register_prog *mux_regs;
 197    uint32_t n_mux_regs;
 198
 199    struct gen_perf_query_register_prog *b_counter_regs;
 200    uint32_t n_b_counter_regs;
 201 };
 202
 203 struct gen_perf_query_info {
 204    enum gen_perf_query_type {
 205       GEN_PERF_QUERY_TYPE_OA,
 206       GEN_PERF_QUERY_TYPE_RAW,
 207       GEN_PERF_QUERY_TYPE_PIPELINE,
 208    } kind;
 209    const char *name;
 210    const char *guid;
 211    struct gen_perf_query_counter *counters;
 212    int n_counters;
 213    int max_counters;
 214    size_t data_size;
 215
 216    /* OA specific */
 217    uint64_t oa_metrics_set_id;
 218    int oa_format;
 219
 220    /* For indexing into the accumulator[] ... */
 221    int gpu_time_offset;
 222    int gpu_clock_offset;
 223    int a_offset;
 224    int b_offset;
 225    int c_offset;
 226
 227    struct gen_perf_registers config;
 228 };
 229
 230 struct gen_perf_config {
 231    /* Whether i915 has DRM_I915_QUERY_PERF_CONFIG support. */
 232    bool i915_query_supported;
 233
 234    /* Version of the i915-perf subsystem, refer to i915_drm.h. */
 235    int i915_perf_version;
 236
 237    /* Powergating configuration for the running the query. */
 238    struct drm_i915_gem_context_param_sseu sseu;
 239
 240    struct gen_perf_query_info *queries;
 241    int n_queries;
 242
 243    struct gen_perf_query_counter **counters;
 244    int n_counters;
 245
 246    /* Variables referenced in the XML meta data for OA performance
 247     * counters, e.g in the normalization equations.
 248     *
 249     * All uint64_t for consistent operand types in generated code
 250     */
 251    struct {
 252       uint64_t timestamp_frequency; /** $GpuTimestampFrequency */
 253       uint64_t n_eus;               /** $EuCoresTotalCount */
 254       uint64_t n_eu_slices;         /** $EuSlicesTotalCount */
 255       uint64_t n_eu_sub_slices;     /** $EuSubslicesTotalCount */
 256       uint64_t eu_threads_count;    /** $EuThreadsCount */
 257       uint64_t slice_mask;          /** $SliceMask */
 258       uint64_t subslice_mask;       /** $SubsliceMask */
 259       uint64_t gt_min_freq;         /** $GpuMinFrequency */
 260       uint64_t gt_max_freq;         /** $GpuMaxFrequency */
 261       uint64_t revision;            /** $SkuRevisionId */
 262    } sys_vars;
 263
 264    /* OA metric sets, indexed by GUID, as know by Mesa at build time, to
 265     * cross-reference with the GUIDs of configs advertised by the kernel at
 266     * runtime
 267     */
 268    struct hash_table *oa_metrics_table;
 269
 270    /* Location of the device's sysfs entry. */
 271    char sysfs_dev_dir[256];
 272
 273    struct {
 274       void *(*bo_alloc)(void *bufmgr, const char *name, uint64_t size);
 275       void (*bo_unreference)(void *bo);
 276       void *(*bo_map)(void *ctx, void *bo, unsigned flags);
 277       void (*bo_unmap)(void *bo);
 278       bool (*batch_references)(void *batch, void *bo);
 279       void (*bo_wait_rendering)(void *bo);
 280       int (*bo_busy)(void *bo);
 281       void (*emit_stall_at_pixel_scoreboard)(void *ctx);
 282       void (*emit_mi_report_perf_count)(void *ctx,
 283                                         void *bo,
 284                                         uint32_t offset_in_bytes,
 285                                         uint32_t report_id);
 286       void (*batchbuffer_flush)(void *ctx,
 287                                 const char *file, int line);
 288       void (*store_register_mem)(void *ctx, void *bo, uint32_t reg, uint32_t reg_size, uint32_t offset);
 289
 290    } vtbl;
 291 };
 292
 293 struct gen_perf_counter_pass {
 294    struct gen_perf_query_info *query;
 295    struct gen_perf_query_counter *counter;
 296    uint32_t pass;
 297 };
 298
 299 void gen_perf_init_metrics(struct gen_perf_config *perf_cfg,
 300                            const struct gen_device_info *devinfo,
 301                            int drm_fd,
 302                            bool include_pipeline_statistics);
 303
 304 /** Query i915 for a metric id using guid.
 305  */
 306 bool gen_perf_load_metric_id(struct gen_perf_config *perf_cfg,
 307                              const char *guid,
 308                              uint64_t *metric_id);
 309
 310 /** Load a configuation's content from i915 using a guid.
 311  */
 312 struct gen_perf_registers *gen_perf_load_configuration(struct gen_perf_config *perf_cfg,
 313                                                       int fd, const char *guid);
 314
 315 /** Store a configuration into i915 using guid and return a new metric id.
 316  *
 317  * If guid is NULL, then a generated one will be provided by hashing the
 318  * content of the configuration.
 319  */
 320 uint64_t gen_perf_store_configuration(struct gen_perf_config *perf_cfg, int fd,
 321                                       const struct gen_perf_registers *config,
 322                                       const char *guid);
 323
 324 /** Read the slice/unslice frequency from 2 OA reports and store then into
 325  *  result.
 326  */
 327 void gen_perf_query_result_read_frequencies(struct gen_perf_query_result *result,
 328                                             const struct gen_device_info *devinfo,
 329                                             const uint32_t *start,
 330                                             const uint32_t *end);
 331 /** Accumulate the delta between 2 OA reports into result for a given query.
 332  */
 333 void gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
 334                                       const struct gen_perf_query_info *query,
 335                                       const uint32_t *start,
 336                                       const uint32_t *end);
 337 void gen_perf_query_result_clear(struct gen_perf_query_result *result);
 338
 339 static inline size_t
 340 gen_perf_query_counter_get_size(const struct gen_perf_query_counter *counter)
 341 {
 342    switch (counter->data_type) {
 343    case GEN_PERF_COUNTER_DATA_TYPE_BOOL32:
 344       return sizeof(uint32_t);
 345    case GEN_PERF_COUNTER_DATA_TYPE_UINT32:
 346       return sizeof(uint32_t);
 347    case GEN_PERF_COUNTER_DATA_TYPE_UINT64:
 348       return sizeof(uint64_t);
 349    case GEN_PERF_COUNTER_DATA_TYPE_FLOAT:
 350       return sizeof(float);
 351    case GEN_PERF_COUNTER_DATA_TYPE_DOUBLE:
 352       return sizeof(double);
 353    default:
 354       unreachable("invalid counter data type");
 355    }
 356 }
 357
 358 static inline struct gen_perf_config *
 359 gen_perf_new(void *ctx)
 360 {
 361    struct gen_perf_config *perf = rzalloc(ctx, struct gen_perf_config);
 362    return perf;
 363 }
 364
 365 uint32_t gen_perf_get_n_passes(struct gen_perf_config *perf,
 366                                const uint32_t *counter_indices,
 367                                uint32_t counter_indices_count,
 368                                struct gen_perf_query_info **pass_queries);
 369 void gen_perf_get_counters_passes(struct gen_perf_config *perf,
 370                                   const uint32_t *counter_indices,
 371                                   uint32_t counter_indices_count,
 372                                   struct gen_perf_counter_pass *counter_pass);
 373
 374 #endif /* GEN_PERF_H */