2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "anv_private.h"
32 #include "vk_format_info.h"
35 /** \file anv_cmd_buffer.c
37 * This file contains all of the stuff for emitting commands into a command
38 * buffer. This includes implementations of most of the vkCmd*
39 * entrypoints. This file is concerned entirely with state emission and
40 * not with the command buffer data structure itself. As far as this file
41 * is concerned, most of anv_cmd_buffer is magic.
44 /* TODO: These are taken from GLES. We should check the Vulkan spec */
45 const struct anv_dynamic_state default_dynamic_state
= {
58 .blend_constants
= { 0.0f
, 0.0f
, 0.0f
, 0.0f
},
63 .stencil_compare_mask
= {
67 .stencil_write_mask
= {
71 .stencil_reference
= {
84 * Copy the dynamic state from src to dest based on the copy_mask.
86 * Avoid copying states that have not changed, except for VIEWPORT, SCISSOR and
87 * BLEND_CONSTANTS (always copy them if they are in the copy_mask).
89 * Returns a mask of the states which changed.
92 anv_dynamic_state_copy(struct anv_dynamic_state
*dest
,
93 const struct anv_dynamic_state
*src
,
94 anv_cmd_dirty_mask_t copy_mask
)
96 anv_cmd_dirty_mask_t changed
= 0;
98 if (copy_mask
& ANV_CMD_DIRTY_DYNAMIC_VIEWPORT
) {
99 dest
->viewport
.count
= src
->viewport
.count
;
100 typed_memcpy(dest
->viewport
.viewports
, src
->viewport
.viewports
,
101 src
->viewport
.count
);
102 changed
|= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT
;
105 if (copy_mask
& ANV_CMD_DIRTY_DYNAMIC_SCISSOR
) {
106 dest
->scissor
.count
= src
->scissor
.count
;
107 typed_memcpy(dest
->scissor
.scissors
, src
->scissor
.scissors
,
109 changed
|= ANV_CMD_DIRTY_DYNAMIC_SCISSOR
;
112 if (copy_mask
& ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS
) {
113 typed_memcpy(dest
->blend_constants
, src
->blend_constants
, 4);
114 changed
|= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS
;
117 #define ANV_CMP_COPY(field, flag) \
118 if (copy_mask & flag) { \
119 if (dest->field != src->field) { \
120 dest->field = src->field; \
125 ANV_CMP_COPY(line_width
, ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH
);
127 ANV_CMP_COPY(depth_bias
.bias
, ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS
);
128 ANV_CMP_COPY(depth_bias
.clamp
, ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS
);
129 ANV_CMP_COPY(depth_bias
.slope
, ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS
);
131 ANV_CMP_COPY(depth_bounds
.min
, ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS
);
132 ANV_CMP_COPY(depth_bounds
.max
, ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS
);
134 ANV_CMP_COPY(stencil_compare_mask
.front
, ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
);
135 ANV_CMP_COPY(stencil_compare_mask
.back
, ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
);
137 ANV_CMP_COPY(stencil_write_mask
.front
, ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
);
138 ANV_CMP_COPY(stencil_write_mask
.back
, ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
);
140 ANV_CMP_COPY(stencil_reference
.front
, ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
);
141 ANV_CMP_COPY(stencil_reference
.back
, ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
);
143 ANV_CMP_COPY(line_stipple
.factor
, ANV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE
);
144 ANV_CMP_COPY(line_stipple
.pattern
, ANV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE
);
146 ANV_CMP_COPY(cull_mode
, ANV_CMD_DIRTY_DYNAMIC_CULL_MODE
);
147 ANV_CMP_COPY(front_face
, ANV_CMD_DIRTY_DYNAMIC_FRONT_FACE
);
155 anv_cmd_state_init(struct anv_cmd_buffer
*cmd_buffer
)
157 struct anv_cmd_state
*state
= &cmd_buffer
->state
;
159 memset(state
, 0, sizeof(*state
));
161 state
->current_pipeline
= UINT32_MAX
;
162 state
->restart_index
= UINT32_MAX
;
163 state
->gfx
.dynamic
= default_dynamic_state
;
167 anv_cmd_pipeline_state_finish(struct anv_cmd_buffer
*cmd_buffer
,
168 struct anv_cmd_pipeline_state
*pipe_state
)
170 for (uint32_t i
= 0; i
< ARRAY_SIZE(pipe_state
->push_descriptors
); i
++) {
171 if (pipe_state
->push_descriptors
[i
]) {
172 anv_descriptor_set_layout_unref(cmd_buffer
->device
,
173 pipe_state
->push_descriptors
[i
]->set
.layout
);
174 vk_free(&cmd_buffer
->pool
->alloc
, pipe_state
->push_descriptors
[i
]);
180 anv_cmd_state_finish(struct anv_cmd_buffer
*cmd_buffer
)
182 struct anv_cmd_state
*state
= &cmd_buffer
->state
;
184 anv_cmd_pipeline_state_finish(cmd_buffer
, &state
->gfx
.base
);
185 anv_cmd_pipeline_state_finish(cmd_buffer
, &state
->compute
.base
);
187 vk_free(&cmd_buffer
->pool
->alloc
, state
->attachments
);
191 anv_cmd_state_reset(struct anv_cmd_buffer
*cmd_buffer
)
193 anv_cmd_state_finish(cmd_buffer
);
194 anv_cmd_state_init(cmd_buffer
);
197 static VkResult
anv_create_cmd_buffer(
198 struct anv_device
* device
,
199 struct anv_cmd_pool
* pool
,
200 VkCommandBufferLevel level
,
201 VkCommandBuffer
* pCommandBuffer
)
203 struct anv_cmd_buffer
*cmd_buffer
;
206 cmd_buffer
= vk_alloc(&pool
->alloc
, sizeof(*cmd_buffer
), 8,
207 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
208 if (cmd_buffer
== NULL
)
209 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
211 vk_object_base_init(&device
->vk
, &cmd_buffer
->base
,
212 VK_OBJECT_TYPE_COMMAND_BUFFER
);
214 cmd_buffer
->batch
.status
= VK_SUCCESS
;
216 cmd_buffer
->device
= device
;
217 cmd_buffer
->pool
= pool
;
218 cmd_buffer
->level
= level
;
220 result
= anv_cmd_buffer_init_batch_bo_chain(cmd_buffer
);
221 if (result
!= VK_SUCCESS
)
224 anv_state_stream_init(&cmd_buffer
->surface_state_stream
,
225 &device
->surface_state_pool
, 4096);
226 anv_state_stream_init(&cmd_buffer
->dynamic_state_stream
,
227 &device
->dynamic_state_pool
, 16384);
229 anv_cmd_state_init(cmd_buffer
);
232 list_addtail(&cmd_buffer
->pool_link
, &pool
->cmd_buffers
);
234 /* Init the pool_link so we can safefly call list_del when we destroy
237 list_inithead(&cmd_buffer
->pool_link
);
240 *pCommandBuffer
= anv_cmd_buffer_to_handle(cmd_buffer
);
245 vk_free(&cmd_buffer
->pool
->alloc
, cmd_buffer
);
250 VkResult
anv_AllocateCommandBuffers(
252 const VkCommandBufferAllocateInfo
* pAllocateInfo
,
253 VkCommandBuffer
* pCommandBuffers
)
255 ANV_FROM_HANDLE(anv_device
, device
, _device
);
256 ANV_FROM_HANDLE(anv_cmd_pool
, pool
, pAllocateInfo
->commandPool
);
258 VkResult result
= VK_SUCCESS
;
261 for (i
= 0; i
< pAllocateInfo
->commandBufferCount
; i
++) {
262 result
= anv_create_cmd_buffer(device
, pool
, pAllocateInfo
->level
,
263 &pCommandBuffers
[i
]);
264 if (result
!= VK_SUCCESS
)
268 if (result
!= VK_SUCCESS
) {
269 anv_FreeCommandBuffers(_device
, pAllocateInfo
->commandPool
,
271 for (i
= 0; i
< pAllocateInfo
->commandBufferCount
; i
++)
272 pCommandBuffers
[i
] = VK_NULL_HANDLE
;
279 anv_cmd_buffer_destroy(struct anv_cmd_buffer
*cmd_buffer
)
281 list_del(&cmd_buffer
->pool_link
);
283 anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer
);
285 anv_state_stream_finish(&cmd_buffer
->surface_state_stream
);
286 anv_state_stream_finish(&cmd_buffer
->dynamic_state_stream
);
288 anv_cmd_state_finish(cmd_buffer
);
290 vk_object_base_finish(&cmd_buffer
->base
);
291 vk_free(&cmd_buffer
->pool
->alloc
, cmd_buffer
);
294 void anv_FreeCommandBuffers(
296 VkCommandPool commandPool
,
297 uint32_t commandBufferCount
,
298 const VkCommandBuffer
* pCommandBuffers
)
300 for (uint32_t i
= 0; i
< commandBufferCount
; i
++) {
301 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, pCommandBuffers
[i
]);
306 anv_cmd_buffer_destroy(cmd_buffer
);
311 anv_cmd_buffer_reset(struct anv_cmd_buffer
*cmd_buffer
)
313 cmd_buffer
->usage_flags
= 0;
314 cmd_buffer
->perf_query_pool
= NULL
;
315 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer
);
316 anv_cmd_state_reset(cmd_buffer
);
318 anv_state_stream_finish(&cmd_buffer
->surface_state_stream
);
319 anv_state_stream_init(&cmd_buffer
->surface_state_stream
,
320 &cmd_buffer
->device
->surface_state_pool
, 4096);
322 anv_state_stream_finish(&cmd_buffer
->dynamic_state_stream
);
323 anv_state_stream_init(&cmd_buffer
->dynamic_state_stream
,
324 &cmd_buffer
->device
->dynamic_state_pool
, 16384);
328 VkResult
anv_ResetCommandBuffer(
329 VkCommandBuffer commandBuffer
,
330 VkCommandBufferResetFlags flags
)
332 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
333 return anv_cmd_buffer_reset(cmd_buffer
);
336 #define anv_genX_call(devinfo, func, ...) \
337 switch ((devinfo)->gen) { \
339 if ((devinfo)->is_haswell) { \
340 gen75_##func(__VA_ARGS__); \
342 gen7_##func(__VA_ARGS__); \
346 gen8_##func(__VA_ARGS__); \
349 gen9_##func(__VA_ARGS__); \
352 gen10_##func(__VA_ARGS__); \
355 gen11_##func(__VA_ARGS__); \
358 gen12_##func(__VA_ARGS__); \
361 assert(!"Unknown hardware generation"); \
365 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
)
367 anv_genX_call(&cmd_buffer
->device
->info
,
368 cmd_buffer_emit_state_base_address
,
373 anv_cmd_buffer_mark_image_written(struct anv_cmd_buffer
*cmd_buffer
,
374 const struct anv_image
*image
,
375 VkImageAspectFlagBits aspect
,
376 enum isl_aux_usage aux_usage
,
379 uint32_t layer_count
)
381 anv_genX_call(&cmd_buffer
->device
->info
,
382 cmd_buffer_mark_image_written
,
383 cmd_buffer
, image
, aspect
, aux_usage
,
384 level
, base_layer
, layer_count
);
388 anv_cmd_emit_conditional_render_predicate(struct anv_cmd_buffer
*cmd_buffer
)
390 anv_genX_call(&cmd_buffer
->device
->info
,
391 cmd_emit_conditional_render_predicate
,
396 mem_update(void *dst
, const void *src
, size_t size
)
398 if (memcmp(dst
, src
, size
) == 0)
401 memcpy(dst
, src
, size
);
406 set_dirty_for_bind_map(struct anv_cmd_buffer
*cmd_buffer
,
407 gl_shader_stage stage
,
408 const struct anv_pipeline_bind_map
*map
)
410 if (mem_update(cmd_buffer
->state
.surface_sha1s
[stage
],
411 map
->surface_sha1
, sizeof(map
->surface_sha1
)))
412 cmd_buffer
->state
.descriptors_dirty
|= mesa_to_vk_shader_stage(stage
);
414 if (mem_update(cmd_buffer
->state
.sampler_sha1s
[stage
],
415 map
->sampler_sha1
, sizeof(map
->sampler_sha1
)))
416 cmd_buffer
->state
.descriptors_dirty
|= mesa_to_vk_shader_stage(stage
);
418 if (mem_update(cmd_buffer
->state
.push_sha1s
[stage
],
419 map
->push_sha1
, sizeof(map
->push_sha1
)))
420 cmd_buffer
->state
.push_constants_dirty
|= mesa_to_vk_shader_stage(stage
);
423 void anv_CmdBindPipeline(
424 VkCommandBuffer commandBuffer
,
425 VkPipelineBindPoint pipelineBindPoint
,
426 VkPipeline _pipeline
)
428 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
429 ANV_FROM_HANDLE(anv_pipeline
, pipeline
, _pipeline
);
431 switch (pipelineBindPoint
) {
432 case VK_PIPELINE_BIND_POINT_COMPUTE
: {
433 struct anv_compute_pipeline
*compute_pipeline
=
434 anv_pipeline_to_compute(pipeline
);
435 if (cmd_buffer
->state
.compute
.pipeline
== compute_pipeline
)
438 cmd_buffer
->state
.compute
.pipeline
= compute_pipeline
;
439 cmd_buffer
->state
.compute
.pipeline_dirty
= true;
440 set_dirty_for_bind_map(cmd_buffer
, MESA_SHADER_COMPUTE
,
441 &compute_pipeline
->cs
->bind_map
);
445 case VK_PIPELINE_BIND_POINT_GRAPHICS
: {
446 struct anv_graphics_pipeline
*gfx_pipeline
=
447 anv_pipeline_to_graphics(pipeline
);
448 if (cmd_buffer
->state
.gfx
.pipeline
== gfx_pipeline
)
451 cmd_buffer
->state
.gfx
.pipeline
= gfx_pipeline
;
452 cmd_buffer
->state
.gfx
.vb_dirty
|= gfx_pipeline
->vb_used
;
453 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_PIPELINE
;
455 anv_foreach_stage(stage
, gfx_pipeline
->active_stages
) {
456 set_dirty_for_bind_map(cmd_buffer
, stage
,
457 &gfx_pipeline
->shaders
[stage
]->bind_map
);
460 /* Apply the dynamic state from the pipeline */
461 cmd_buffer
->state
.gfx
.dirty
|=
462 anv_dynamic_state_copy(&cmd_buffer
->state
.gfx
.dynamic
,
463 &gfx_pipeline
->dynamic_state
,
464 gfx_pipeline
->dynamic_state_mask
);
469 assert(!"invalid bind point");
474 void anv_CmdSetViewport(
475 VkCommandBuffer commandBuffer
,
476 uint32_t firstViewport
,
477 uint32_t viewportCount
,
478 const VkViewport
* pViewports
)
480 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
482 const uint32_t total_count
= firstViewport
+ viewportCount
;
483 if (cmd_buffer
->state
.gfx
.dynamic
.viewport
.count
< total_count
)
484 cmd_buffer
->state
.gfx
.dynamic
.viewport
.count
= total_count
;
486 memcpy(cmd_buffer
->state
.gfx
.dynamic
.viewport
.viewports
+ firstViewport
,
487 pViewports
, viewportCount
* sizeof(*pViewports
));
489 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT
;
492 void anv_CmdSetViewportWithCountEXT(
493 VkCommandBuffer commandBuffer
,
494 uint32_t viewportCount
,
495 const VkViewport
* pViewports
)
497 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
499 cmd_buffer
->state
.gfx
.dynamic
.viewport
.count
= viewportCount
;
501 memcpy(cmd_buffer
->state
.gfx
.dynamic
.viewport
.viewports
,
502 pViewports
, viewportCount
* sizeof(*pViewports
));
504 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT
;
507 void anv_CmdSetScissor(
508 VkCommandBuffer commandBuffer
,
509 uint32_t firstScissor
,
510 uint32_t scissorCount
,
511 const VkRect2D
* pScissors
)
513 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
515 const uint32_t total_count
= firstScissor
+ scissorCount
;
516 if (cmd_buffer
->state
.gfx
.dynamic
.scissor
.count
< total_count
)
517 cmd_buffer
->state
.gfx
.dynamic
.scissor
.count
= total_count
;
519 memcpy(cmd_buffer
->state
.gfx
.dynamic
.scissor
.scissors
+ firstScissor
,
520 pScissors
, scissorCount
* sizeof(*pScissors
));
522 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_SCISSOR
;
525 void anv_CmdSetScissorWithCountEXT(
526 VkCommandBuffer commandBuffer
,
527 uint32_t scissorCount
,
528 const VkRect2D
* pScissors
)
530 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
532 cmd_buffer
->state
.gfx
.dynamic
.scissor
.count
= scissorCount
;
534 memcpy(cmd_buffer
->state
.gfx
.dynamic
.scissor
.scissors
,
535 pScissors
, scissorCount
* sizeof(*pScissors
));
537 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_SCISSOR
;
540 void anv_CmdSetLineWidth(
541 VkCommandBuffer commandBuffer
,
544 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
546 cmd_buffer
->state
.gfx
.dynamic
.line_width
= lineWidth
;
547 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH
;
550 void anv_CmdSetDepthBias(
551 VkCommandBuffer commandBuffer
,
552 float depthBiasConstantFactor
,
553 float depthBiasClamp
,
554 float depthBiasSlopeFactor
)
556 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
558 cmd_buffer
->state
.gfx
.dynamic
.depth_bias
.bias
= depthBiasConstantFactor
;
559 cmd_buffer
->state
.gfx
.dynamic
.depth_bias
.clamp
= depthBiasClamp
;
560 cmd_buffer
->state
.gfx
.dynamic
.depth_bias
.slope
= depthBiasSlopeFactor
;
562 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS
;
565 void anv_CmdSetBlendConstants(
566 VkCommandBuffer commandBuffer
,
567 const float blendConstants
[4])
569 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
571 memcpy(cmd_buffer
->state
.gfx
.dynamic
.blend_constants
,
572 blendConstants
, sizeof(float) * 4);
574 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS
;
577 void anv_CmdSetDepthBounds(
578 VkCommandBuffer commandBuffer
,
579 float minDepthBounds
,
580 float maxDepthBounds
)
582 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
584 cmd_buffer
->state
.gfx
.dynamic
.depth_bounds
.min
= minDepthBounds
;
585 cmd_buffer
->state
.gfx
.dynamic
.depth_bounds
.max
= maxDepthBounds
;
587 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS
;
590 void anv_CmdSetStencilCompareMask(
591 VkCommandBuffer commandBuffer
,
592 VkStencilFaceFlags faceMask
,
593 uint32_t compareMask
)
595 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
597 if (faceMask
& VK_STENCIL_FACE_FRONT_BIT
)
598 cmd_buffer
->state
.gfx
.dynamic
.stencil_compare_mask
.front
= compareMask
;
599 if (faceMask
& VK_STENCIL_FACE_BACK_BIT
)
600 cmd_buffer
->state
.gfx
.dynamic
.stencil_compare_mask
.back
= compareMask
;
602 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
;
605 void anv_CmdSetStencilWriteMask(
606 VkCommandBuffer commandBuffer
,
607 VkStencilFaceFlags faceMask
,
610 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
612 if (faceMask
& VK_STENCIL_FACE_FRONT_BIT
)
613 cmd_buffer
->state
.gfx
.dynamic
.stencil_write_mask
.front
= writeMask
;
614 if (faceMask
& VK_STENCIL_FACE_BACK_BIT
)
615 cmd_buffer
->state
.gfx
.dynamic
.stencil_write_mask
.back
= writeMask
;
617 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
;
620 void anv_CmdSetStencilReference(
621 VkCommandBuffer commandBuffer
,
622 VkStencilFaceFlags faceMask
,
625 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
627 if (faceMask
& VK_STENCIL_FACE_FRONT_BIT
)
628 cmd_buffer
->state
.gfx
.dynamic
.stencil_reference
.front
= reference
;
629 if (faceMask
& VK_STENCIL_FACE_BACK_BIT
)
630 cmd_buffer
->state
.gfx
.dynamic
.stencil_reference
.back
= reference
;
632 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
;
635 void anv_CmdSetLineStippleEXT(
636 VkCommandBuffer commandBuffer
,
637 uint32_t lineStippleFactor
,
638 uint16_t lineStipplePattern
)
640 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
642 cmd_buffer
->state
.gfx
.dynamic
.line_stipple
.factor
= lineStippleFactor
;
643 cmd_buffer
->state
.gfx
.dynamic
.line_stipple
.pattern
= lineStipplePattern
;
645 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE
;
648 void anv_CmdSetCullModeEXT(
649 VkCommandBuffer commandBuffer
,
650 VkCullModeFlags cullMode
)
652 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
654 cmd_buffer
->state
.gfx
.dynamic
.cull_mode
= cullMode
;
656 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_CULL_MODE
;
659 void anv_CmdSetFrontFaceEXT(
660 VkCommandBuffer commandBuffer
,
661 VkFrontFace frontFace
)
663 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
665 cmd_buffer
->state
.gfx
.dynamic
.front_face
= frontFace
;
667 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_FRONT_FACE
;
671 anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer
*cmd_buffer
,
672 VkPipelineBindPoint bind_point
,
673 struct anv_pipeline_layout
*layout
,
675 struct anv_descriptor_set
*set
,
676 uint32_t *dynamic_offset_count
,
677 const uint32_t **dynamic_offsets
)
679 struct anv_descriptor_set_layout
*set_layout
=
680 layout
->set
[set_index
].layout
;
682 VkShaderStageFlags stages
= set_layout
->shader_stages
;
683 struct anv_cmd_pipeline_state
*pipe_state
;
685 switch (bind_point
) {
686 case VK_PIPELINE_BIND_POINT_GRAPHICS
:
687 stages
&= VK_SHADER_STAGE_ALL_GRAPHICS
;
688 pipe_state
= &cmd_buffer
->state
.gfx
.base
;
691 case VK_PIPELINE_BIND_POINT_COMPUTE
:
692 stages
&= VK_SHADER_STAGE_COMPUTE_BIT
;
693 pipe_state
= &cmd_buffer
->state
.compute
.base
;
697 unreachable("invalid bind point");
700 VkShaderStageFlags dirty_stages
= 0;
701 if (pipe_state
->descriptors
[set_index
] != set
) {
702 pipe_state
->descriptors
[set_index
] = set
;
703 dirty_stages
|= stages
;
706 /* If it's a push descriptor set, we have to flag things as dirty
707 * regardless of whether or not the CPU-side data structure changed as we
708 * may have edited in-place.
710 if (set
->pool
== NULL
)
711 dirty_stages
|= stages
;
713 if (dynamic_offsets
) {
714 if (set_layout
->dynamic_offset_count
> 0) {
715 uint32_t dynamic_offset_start
=
716 layout
->set
[set_index
].dynamic_offset_start
;
718 anv_foreach_stage(stage
, stages
) {
719 struct anv_push_constants
*push
=
720 &cmd_buffer
->state
.push_constants
[stage
];
721 uint32_t *push_offsets
=
722 &push
->dynamic_offsets
[dynamic_offset_start
];
724 /* Assert that everything is in range */
725 assert(set_layout
->dynamic_offset_count
<= *dynamic_offset_count
);
726 assert(dynamic_offset_start
+ set_layout
->dynamic_offset_count
<=
727 ARRAY_SIZE(push
->dynamic_offsets
));
729 unsigned mask
= set_layout
->stage_dynamic_offsets
[stage
];
730 STATIC_ASSERT(MAX_DYNAMIC_BUFFERS
<= sizeof(mask
) * 8);
732 int i
= u_bit_scan(&mask
);
733 if (push_offsets
[i
] != (*dynamic_offsets
)[i
]) {
734 push_offsets
[i
] = (*dynamic_offsets
)[i
];
735 dirty_stages
|= mesa_to_vk_shader_stage(stage
);
740 *dynamic_offsets
+= set_layout
->dynamic_offset_count
;
741 *dynamic_offset_count
-= set_layout
->dynamic_offset_count
;
745 cmd_buffer
->state
.descriptors_dirty
|= dirty_stages
;
746 cmd_buffer
->state
.push_constants_dirty
|= dirty_stages
;
749 void anv_CmdBindDescriptorSets(
750 VkCommandBuffer commandBuffer
,
751 VkPipelineBindPoint pipelineBindPoint
,
752 VkPipelineLayout _layout
,
754 uint32_t descriptorSetCount
,
755 const VkDescriptorSet
* pDescriptorSets
,
756 uint32_t dynamicOffsetCount
,
757 const uint32_t* pDynamicOffsets
)
759 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
760 ANV_FROM_HANDLE(anv_pipeline_layout
, layout
, _layout
);
762 assert(firstSet
+ descriptorSetCount
<= MAX_SETS
);
764 for (uint32_t i
= 0; i
< descriptorSetCount
; i
++) {
765 ANV_FROM_HANDLE(anv_descriptor_set
, set
, pDescriptorSets
[i
]);
766 anv_cmd_buffer_bind_descriptor_set(cmd_buffer
, pipelineBindPoint
,
767 layout
, firstSet
+ i
, set
,
773 void anv_CmdBindVertexBuffers(
774 VkCommandBuffer commandBuffer
,
775 uint32_t firstBinding
,
776 uint32_t bindingCount
,
777 const VkBuffer
* pBuffers
,
778 const VkDeviceSize
* pOffsets
)
780 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
781 struct anv_vertex_binding
*vb
= cmd_buffer
->state
.vertex_bindings
;
783 /* We have to defer setting up vertex buffer since we need the buffer
784 * stride from the pipeline. */
786 assert(firstBinding
+ bindingCount
<= MAX_VBS
);
787 for (uint32_t i
= 0; i
< bindingCount
; i
++) {
788 vb
[firstBinding
+ i
].buffer
= anv_buffer_from_handle(pBuffers
[i
]);
789 vb
[firstBinding
+ i
].offset
= pOffsets
[i
];
790 cmd_buffer
->state
.gfx
.vb_dirty
|= 1 << (firstBinding
+ i
);
794 void anv_CmdBindTransformFeedbackBuffersEXT(
795 VkCommandBuffer commandBuffer
,
796 uint32_t firstBinding
,
797 uint32_t bindingCount
,
798 const VkBuffer
* pBuffers
,
799 const VkDeviceSize
* pOffsets
,
800 const VkDeviceSize
* pSizes
)
802 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
803 struct anv_xfb_binding
*xfb
= cmd_buffer
->state
.xfb_bindings
;
805 /* We have to defer setting up vertex buffer since we need the buffer
806 * stride from the pipeline. */
808 assert(firstBinding
+ bindingCount
<= MAX_XFB_BUFFERS
);
809 for (uint32_t i
= 0; i
< bindingCount
; i
++) {
810 if (pBuffers
[i
] == VK_NULL_HANDLE
) {
811 xfb
[firstBinding
+ i
].buffer
= NULL
;
813 ANV_FROM_HANDLE(anv_buffer
, buffer
, pBuffers
[i
]);
814 xfb
[firstBinding
+ i
].buffer
= buffer
;
815 xfb
[firstBinding
+ i
].offset
= pOffsets
[i
];
816 xfb
[firstBinding
+ i
].size
=
817 anv_buffer_get_range(buffer
, pOffsets
[i
],
818 pSizes
? pSizes
[i
] : VK_WHOLE_SIZE
);
824 anv_isl_format_for_descriptor_type(VkDescriptorType type
)
827 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER
:
828 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
829 return ISL_FORMAT_R32G32B32A32_FLOAT
;
831 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER
:
832 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
833 return ISL_FORMAT_RAW
;
836 unreachable("Invalid descriptor type");
841 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
842 const void *data
, uint32_t size
, uint32_t alignment
)
844 struct anv_state state
;
846 state
= anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
, size
, alignment
);
847 memcpy(state
.map
, data
, size
);
849 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state
.map
, size
));
855 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
856 uint32_t *a
, uint32_t *b
,
857 uint32_t dwords
, uint32_t alignment
)
859 struct anv_state state
;
862 state
= anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
,
863 dwords
* 4, alignment
);
865 for (uint32_t i
= 0; i
< dwords
; i
++)
868 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p
, dwords
* 4));
874 anv_cmd_buffer_push_constants(struct anv_cmd_buffer
*cmd_buffer
,
875 gl_shader_stage stage
)
877 struct anv_push_constants
*data
=
878 &cmd_buffer
->state
.push_constants
[stage
];
880 struct anv_state state
=
881 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
,
882 sizeof(struct anv_push_constants
),
883 32 /* bottom 5 bits MBZ */);
884 memcpy(state
.map
, data
, sizeof(struct anv_push_constants
));
890 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer
*cmd_buffer
)
892 struct anv_push_constants
*data
=
893 &cmd_buffer
->state
.push_constants
[MESA_SHADER_COMPUTE
];
894 struct anv_compute_pipeline
*pipeline
= cmd_buffer
->state
.compute
.pipeline
;
895 const struct brw_cs_prog_data
*cs_prog_data
= get_cs_prog_data(pipeline
);
896 const struct anv_push_range
*range
= &pipeline
->cs
->bind_map
.push_ranges
[0];
898 const struct anv_cs_parameters cs_params
= anv_cs_parameters(pipeline
);
899 const unsigned total_push_constants_size
=
900 brw_cs_push_const_total_size(cs_prog_data
, cs_params
.threads
);
901 if (total_push_constants_size
== 0)
902 return (struct anv_state
) { .offset
= 0 };
904 const unsigned push_constant_alignment
=
905 cmd_buffer
->device
->info
.gen
< 8 ? 32 : 64;
906 const unsigned aligned_total_push_constants_size
=
907 ALIGN(total_push_constants_size
, push_constant_alignment
);
908 struct anv_state state
=
909 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
,
910 aligned_total_push_constants_size
,
911 push_constant_alignment
);
913 void *dst
= state
.map
;
914 const void *src
= (char *)data
+ (range
->start
* 32);
916 if (cs_prog_data
->push
.cross_thread
.size
> 0) {
917 memcpy(dst
, src
, cs_prog_data
->push
.cross_thread
.size
);
918 dst
+= cs_prog_data
->push
.cross_thread
.size
;
919 src
+= cs_prog_data
->push
.cross_thread
.size
;
922 if (cs_prog_data
->push
.per_thread
.size
> 0) {
923 for (unsigned t
= 0; t
< cs_params
.threads
; t
++) {
924 memcpy(dst
, src
, cs_prog_data
->push
.per_thread
.size
);
926 uint32_t *subgroup_id
= dst
+
927 offsetof(struct anv_push_constants
, cs
.subgroup_id
) -
928 (range
->start
* 32 + cs_prog_data
->push
.cross_thread
.size
);
931 dst
+= cs_prog_data
->push
.per_thread
.size
;
938 void anv_CmdPushConstants(
939 VkCommandBuffer commandBuffer
,
940 VkPipelineLayout layout
,
941 VkShaderStageFlags stageFlags
,
946 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
948 anv_foreach_stage(stage
, stageFlags
) {
949 memcpy(cmd_buffer
->state
.push_constants
[stage
].client_data
+ offset
,
953 cmd_buffer
->state
.push_constants_dirty
|= stageFlags
;
956 VkResult
anv_CreateCommandPool(
958 const VkCommandPoolCreateInfo
* pCreateInfo
,
959 const VkAllocationCallbacks
* pAllocator
,
960 VkCommandPool
* pCmdPool
)
962 ANV_FROM_HANDLE(anv_device
, device
, _device
);
963 struct anv_cmd_pool
*pool
;
965 pool
= vk_alloc2(&device
->vk
.alloc
, pAllocator
, sizeof(*pool
), 8,
966 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
968 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
970 vk_object_base_init(&device
->vk
, &pool
->base
, VK_OBJECT_TYPE_COMMAND_POOL
);
973 pool
->alloc
= *pAllocator
;
975 pool
->alloc
= device
->vk
.alloc
;
977 list_inithead(&pool
->cmd_buffers
);
979 *pCmdPool
= anv_cmd_pool_to_handle(pool
);
984 void anv_DestroyCommandPool(
986 VkCommandPool commandPool
,
987 const VkAllocationCallbacks
* pAllocator
)
989 ANV_FROM_HANDLE(anv_device
, device
, _device
);
990 ANV_FROM_HANDLE(anv_cmd_pool
, pool
, commandPool
);
995 list_for_each_entry_safe(struct anv_cmd_buffer
, cmd_buffer
,
996 &pool
->cmd_buffers
, pool_link
) {
997 anv_cmd_buffer_destroy(cmd_buffer
);
1000 vk_object_base_finish(&pool
->base
);
1001 vk_free2(&device
->vk
.alloc
, pAllocator
, pool
);
1004 VkResult
anv_ResetCommandPool(
1006 VkCommandPool commandPool
,
1007 VkCommandPoolResetFlags flags
)
1009 ANV_FROM_HANDLE(anv_cmd_pool
, pool
, commandPool
);
1011 list_for_each_entry(struct anv_cmd_buffer
, cmd_buffer
,
1012 &pool
->cmd_buffers
, pool_link
) {
1013 anv_cmd_buffer_reset(cmd_buffer
);
1019 void anv_TrimCommandPool(
1021 VkCommandPool commandPool
,
1022 VkCommandPoolTrimFlags flags
)
1024 /* Nothing for us to do here. Our pools stay pretty tidy. */
1028 * Return NULL if the current subpass has no depthstencil attachment.
1030 const struct anv_image_view
*
1031 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer
*cmd_buffer
)
1033 const struct anv_subpass
*subpass
= cmd_buffer
->state
.subpass
;
1035 if (subpass
->depth_stencil_attachment
== NULL
)
1038 const struct anv_image_view
*iview
=
1039 cmd_buffer
->state
.attachments
[subpass
->depth_stencil_attachment
->attachment
].image_view
;
1041 assert(iview
->aspect_mask
& (VK_IMAGE_ASPECT_DEPTH_BIT
|
1042 VK_IMAGE_ASPECT_STENCIL_BIT
));
1047 static struct anv_descriptor_set
*
1048 anv_cmd_buffer_push_descriptor_set(struct anv_cmd_buffer
*cmd_buffer
,
1049 VkPipelineBindPoint bind_point
,
1050 struct anv_descriptor_set_layout
*layout
,
1053 struct anv_cmd_pipeline_state
*pipe_state
;
1054 if (bind_point
== VK_PIPELINE_BIND_POINT_COMPUTE
) {
1055 pipe_state
= &cmd_buffer
->state
.compute
.base
;
1057 assert(bind_point
== VK_PIPELINE_BIND_POINT_GRAPHICS
);
1058 pipe_state
= &cmd_buffer
->state
.gfx
.base
;
1061 struct anv_push_descriptor_set
**push_set
=
1062 &pipe_state
->push_descriptors
[_set
];
1064 if (*push_set
== NULL
) {
1065 *push_set
= vk_zalloc(&cmd_buffer
->pool
->alloc
,
1066 sizeof(struct anv_push_descriptor_set
), 8,
1067 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1068 if (*push_set
== NULL
) {
1069 anv_batch_set_error(&cmd_buffer
->batch
, VK_ERROR_OUT_OF_HOST_MEMORY
);
1074 struct anv_descriptor_set
*set
= &(*push_set
)->set
;
1076 if (set
->layout
!= layout
) {
1078 anv_descriptor_set_layout_unref(cmd_buffer
->device
, set
->layout
);
1079 anv_descriptor_set_layout_ref(layout
);
1080 set
->layout
= layout
;
1082 set
->size
= anv_descriptor_set_layout_size(layout
);
1083 set
->buffer_view_count
= layout
->buffer_view_count
;
1084 set
->buffer_views
= (*push_set
)->buffer_views
;
1086 if (layout
->descriptor_buffer_size
&&
1087 ((*push_set
)->set_used_on_gpu
||
1088 set
->desc_mem
.alloc_size
< layout
->descriptor_buffer_size
)) {
1089 /* The previous buffer is either actively used by some GPU command (so
1090 * we can't modify it) or is too small. Allocate a new one.
1092 struct anv_state desc_mem
=
1093 anv_state_stream_alloc(&cmd_buffer
->dynamic_state_stream
,
1094 layout
->descriptor_buffer_size
, 32);
1095 if (set
->desc_mem
.alloc_size
) {
1096 /* TODO: Do we really need to copy all the time? */
1097 memcpy(desc_mem
.map
, set
->desc_mem
.map
,
1098 MIN2(desc_mem
.alloc_size
, set
->desc_mem
.alloc_size
));
1100 set
->desc_mem
= desc_mem
;
1102 struct anv_address addr
= {
1103 .bo
= cmd_buffer
->dynamic_state_stream
.state_pool
->block_pool
.bo
,
1104 .offset
= set
->desc_mem
.offset
,
1107 const struct isl_device
*isl_dev
= &cmd_buffer
->device
->isl_dev
;
1108 set
->desc_surface_state
=
1109 anv_state_stream_alloc(&cmd_buffer
->surface_state_stream
,
1110 isl_dev
->ss
.size
, isl_dev
->ss
.align
);
1111 anv_fill_buffer_surface_state(cmd_buffer
->device
,
1112 set
->desc_surface_state
,
1113 ISL_FORMAT_R32G32B32A32_FLOAT
,
1114 addr
, layout
->descriptor_buffer_size
, 1);
1120 void anv_CmdPushDescriptorSetKHR(
1121 VkCommandBuffer commandBuffer
,
1122 VkPipelineBindPoint pipelineBindPoint
,
1123 VkPipelineLayout _layout
,
1125 uint32_t descriptorWriteCount
,
1126 const VkWriteDescriptorSet
* pDescriptorWrites
)
1128 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
1129 ANV_FROM_HANDLE(anv_pipeline_layout
, layout
, _layout
);
1131 assert(_set
< MAX_SETS
);
1133 struct anv_descriptor_set_layout
*set_layout
= layout
->set
[_set
].layout
;
1135 struct anv_descriptor_set
*set
=
1136 anv_cmd_buffer_push_descriptor_set(cmd_buffer
, pipelineBindPoint
,
1141 /* Go through the user supplied descriptors. */
1142 for (uint32_t i
= 0; i
< descriptorWriteCount
; i
++) {
1143 const VkWriteDescriptorSet
*write
= &pDescriptorWrites
[i
];
1145 switch (write
->descriptorType
) {
1146 case VK_DESCRIPTOR_TYPE_SAMPLER
:
1147 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
:
1148 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE
:
1149 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE
:
1150 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT
:
1151 for (uint32_t j
= 0; j
< write
->descriptorCount
; j
++) {
1152 anv_descriptor_set_write_image_view(cmd_buffer
->device
, set
,
1153 write
->pImageInfo
+ j
,
1154 write
->descriptorType
,
1156 write
->dstArrayElement
+ j
);
1160 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER
:
1161 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER
:
1162 for (uint32_t j
= 0; j
< write
->descriptorCount
; j
++) {
1163 ANV_FROM_HANDLE(anv_buffer_view
, bview
,
1164 write
->pTexelBufferView
[j
]);
1166 anv_descriptor_set_write_buffer_view(cmd_buffer
->device
, set
,
1167 write
->descriptorType
,
1170 write
->dstArrayElement
+ j
);
1174 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER
:
1175 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER
:
1176 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
1177 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
1178 for (uint32_t j
= 0; j
< write
->descriptorCount
; j
++) {
1179 ANV_FROM_HANDLE(anv_buffer
, buffer
, write
->pBufferInfo
[j
].buffer
);
1181 anv_descriptor_set_write_buffer(cmd_buffer
->device
, set
,
1182 &cmd_buffer
->surface_state_stream
,
1183 write
->descriptorType
,
1186 write
->dstArrayElement
+ j
,
1187 write
->pBufferInfo
[j
].offset
,
1188 write
->pBufferInfo
[j
].range
);
1197 anv_cmd_buffer_bind_descriptor_set(cmd_buffer
, pipelineBindPoint
,
1198 layout
, _set
, set
, NULL
, NULL
);
1201 void anv_CmdPushDescriptorSetWithTemplateKHR(
1202 VkCommandBuffer commandBuffer
,
1203 VkDescriptorUpdateTemplate descriptorUpdateTemplate
,
1204 VkPipelineLayout _layout
,
1208 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
1209 ANV_FROM_HANDLE(anv_descriptor_update_template
, template,
1210 descriptorUpdateTemplate
);
1211 ANV_FROM_HANDLE(anv_pipeline_layout
, layout
, _layout
);
1213 assert(_set
< MAX_PUSH_DESCRIPTORS
);
1215 struct anv_descriptor_set_layout
*set_layout
= layout
->set
[_set
].layout
;
1217 struct anv_descriptor_set
*set
=
1218 anv_cmd_buffer_push_descriptor_set(cmd_buffer
, template->bind_point
,
1223 anv_descriptor_set_write_template(cmd_buffer
->device
, set
,
1224 &cmd_buffer
->surface_state_stream
,
1228 anv_cmd_buffer_bind_descriptor_set(cmd_buffer
, template->bind_point
,
1229 layout
, _set
, set
, NULL
, NULL
);
1232 void anv_CmdSetDeviceMask(
1233 VkCommandBuffer commandBuffer
,
1234 uint32_t deviceMask
)