fca72a9803e6536285e5cb6f10662cdae3e16d8d
[mesa.git] / src / intel / vulkan / anv_gem.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <sys/ioctl.h>
25 #include <sys/types.h>
26 #include <sys/mman.h>
27 #include <string.h>
28 #include <errno.h>
29 #include <unistd.h>
30 #include <fcntl.h>
31
32 #include "anv_private.h"
33 #include "common/gen_defines.h"
34 #include "common/gen_gem.h"
35 #include "drm-uapi/sync_file.h"
36
37 /**
38 * Wrapper around DRM_IOCTL_I915_GEM_CREATE.
39 *
40 * Return gem handle, or 0 on failure. Gem handles are never 0.
41 */
42 uint32_t
43 anv_gem_create(struct anv_device *device, uint64_t size)
44 {
45 struct drm_i915_gem_create gem_create = {
46 .size = size,
47 };
48
49 int ret = gen_ioctl(device->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
50 if (ret != 0) {
51 /* FIXME: What do we do if this fails? */
52 return 0;
53 }
54
55 return gem_create.handle;
56 }
57
58 void
59 anv_gem_close(struct anv_device *device, uint32_t gem_handle)
60 {
61 struct drm_gem_close close = {
62 .handle = gem_handle,
63 };
64
65 gen_ioctl(device->fd, DRM_IOCTL_GEM_CLOSE, &close);
66 }
67
68 /**
69 * Wrapper around DRM_IOCTL_I915_GEM_MMAP. Returns MAP_FAILED on error.
70 */
71 static void*
72 anv_gem_mmap_offset(struct anv_device *device, uint32_t gem_handle,
73 uint64_t offset, uint64_t size, uint32_t flags)
74 {
75 struct drm_i915_gem_mmap_offset gem_mmap = {
76 .handle = gem_handle,
77 .flags = (flags & I915_MMAP_WC) ?
78 I915_MMAP_OFFSET_WC : I915_MMAP_OFFSET_WB,
79 };
80 assert(offset == 0);
81
82 /* Get the fake offset back */
83 int ret = gen_ioctl(device->fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET, &gem_mmap);
84 if (ret != 0)
85 return MAP_FAILED;
86
87 /* And map it */
88 void *map = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED,
89 device->fd, gem_mmap.offset);
90 return map;
91 }
92
93 static void*
94 anv_gem_mmap_legacy(struct anv_device *device, uint32_t gem_handle,
95 uint64_t offset, uint64_t size, uint32_t flags)
96 {
97 struct drm_i915_gem_mmap gem_mmap = {
98 .handle = gem_handle,
99 .offset = offset,
100 .size = size,
101 .flags = flags,
102 };
103
104 int ret = gen_ioctl(device->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_mmap);
105 if (ret != 0)
106 return MAP_FAILED;
107
108 VG(VALGRIND_MALLOCLIKE_BLOCK(gem_mmap.addr_ptr, gem_mmap.size, 0, 1));
109 return (void *)(uintptr_t) gem_mmap.addr_ptr;
110 }
111
112 /**
113 * Wrapper around DRM_IOCTL_I915_GEM_MMAP. Returns MAP_FAILED on error.
114 */
115 void*
116 anv_gem_mmap(struct anv_device *device, uint32_t gem_handle,
117 uint64_t offset, uint64_t size, uint32_t flags)
118 {
119 if (device->physical->has_mmap_offset)
120 return anv_gem_mmap_offset(device, gem_handle, offset, size, flags);
121 else
122 return anv_gem_mmap_legacy(device, gem_handle, offset, size, flags);
123 }
124
125 /* This is just a wrapper around munmap, but it also notifies valgrind that
126 * this map is no longer valid. Pair this with anv_gem_mmap().
127 */
128 void
129 anv_gem_munmap(struct anv_device *device, void *p, uint64_t size)
130 {
131 if (!device->physical->has_mmap_offset)
132 VG(VALGRIND_FREELIKE_BLOCK(p, 0));
133 munmap(p, size);
134 }
135
136 uint32_t
137 anv_gem_userptr(struct anv_device *device, void *mem, size_t size)
138 {
139 struct drm_i915_gem_userptr userptr = {
140 .user_ptr = (__u64)((unsigned long) mem),
141 .user_size = size,
142 .flags = 0,
143 };
144
145 int ret = gen_ioctl(device->fd, DRM_IOCTL_I915_GEM_USERPTR, &userptr);
146 if (ret == -1)
147 return 0;
148
149 return userptr.handle;
150 }
151
152 int
153 anv_gem_set_caching(struct anv_device *device,
154 uint32_t gem_handle, uint32_t caching)
155 {
156 struct drm_i915_gem_caching gem_caching = {
157 .handle = gem_handle,
158 .caching = caching,
159 };
160
161 return gen_ioctl(device->fd, DRM_IOCTL_I915_GEM_SET_CACHING, &gem_caching);
162 }
163
164 int
165 anv_gem_set_domain(struct anv_device *device, uint32_t gem_handle,
166 uint32_t read_domains, uint32_t write_domain)
167 {
168 struct drm_i915_gem_set_domain gem_set_domain = {
169 .handle = gem_handle,
170 .read_domains = read_domains,
171 .write_domain = write_domain,
172 };
173
174 return gen_ioctl(device->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &gem_set_domain);
175 }
176
177 /**
178 * Returns 0, 1, or negative to indicate error
179 */
180 int
181 anv_gem_busy(struct anv_device *device, uint32_t gem_handle)
182 {
183 struct drm_i915_gem_busy busy = {
184 .handle = gem_handle,
185 };
186
187 int ret = gen_ioctl(device->fd, DRM_IOCTL_I915_GEM_BUSY, &busy);
188 if (ret < 0)
189 return ret;
190
191 return busy.busy != 0;
192 }
193
194 /**
195 * On error, \a timeout_ns holds the remaining time.
196 */
197 int
198 anv_gem_wait(struct anv_device *device, uint32_t gem_handle, int64_t *timeout_ns)
199 {
200 struct drm_i915_gem_wait wait = {
201 .bo_handle = gem_handle,
202 .timeout_ns = *timeout_ns,
203 .flags = 0,
204 };
205
206 int ret = gen_ioctl(device->fd, DRM_IOCTL_I915_GEM_WAIT, &wait);
207 *timeout_ns = wait.timeout_ns;
208
209 return ret;
210 }
211
212 int
213 anv_gem_execbuffer(struct anv_device *device,
214 struct drm_i915_gem_execbuffer2 *execbuf)
215 {
216 if (execbuf->flags & I915_EXEC_FENCE_OUT)
217 return gen_ioctl(device->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2_WR, execbuf);
218 else
219 return gen_ioctl(device->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf);
220 }
221
222 /** Return -1 on error. */
223 int
224 anv_gem_get_tiling(struct anv_device *device, uint32_t gem_handle)
225 {
226 struct drm_i915_gem_get_tiling get_tiling = {
227 .handle = gem_handle,
228 };
229
230 /* FIXME: On discrete platforms we don't have DRM_IOCTL_I915_GEM_GET_TILING
231 * anymore, so we will need another way to get the tiling. Apparently this
232 * is only used in Android code, so we may need some other way to
233 * communicate the tiling mode.
234 */
235 if (gen_ioctl(device->fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling)) {
236 assert(!"Failed to get BO tiling");
237 return -1;
238 }
239
240 return get_tiling.tiling_mode;
241 }
242
243 int
244 anv_gem_set_tiling(struct anv_device *device,
245 uint32_t gem_handle, uint32_t stride, uint32_t tiling)
246 {
247 int ret;
248
249 /* On discrete platforms we don't have DRM_IOCTL_I915_GEM_SET_TILING. So
250 * nothing needs to be done.
251 */
252 if (!device->info.has_tiling_uapi)
253 return 0;
254
255 /* set_tiling overwrites the input on the error path, so we have to open
256 * code gen_ioctl.
257 */
258 do {
259 struct drm_i915_gem_set_tiling set_tiling = {
260 .handle = gem_handle,
261 .tiling_mode = tiling,
262 .stride = stride,
263 };
264
265 ret = ioctl(device->fd, DRM_IOCTL_I915_GEM_SET_TILING, &set_tiling);
266 } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
267
268 return ret;
269 }
270
271 int
272 anv_gem_get_param(int fd, uint32_t param)
273 {
274 int tmp;
275
276 drm_i915_getparam_t gp = {
277 .param = param,
278 .value = &tmp,
279 };
280
281 int ret = gen_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
282 if (ret == 0)
283 return tmp;
284
285 return 0;
286 }
287
288 bool
289 anv_gem_get_bit6_swizzle(int fd, uint32_t tiling)
290 {
291 struct drm_gem_close close;
292 int ret;
293
294 struct drm_i915_gem_create gem_create = {
295 .size = 4096,
296 };
297
298 if (gen_ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create)) {
299 assert(!"Failed to create GEM BO");
300 return false;
301 }
302
303 bool swizzled = false;
304
305 /* set_tiling overwrites the input on the error path, so we have to open
306 * code gen_ioctl.
307 */
308 do {
309 struct drm_i915_gem_set_tiling set_tiling = {
310 .handle = gem_create.handle,
311 .tiling_mode = tiling,
312 .stride = tiling == I915_TILING_X ? 512 : 128,
313 };
314
315 ret = ioctl(fd, DRM_IOCTL_I915_GEM_SET_TILING, &set_tiling);
316 } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
317
318 if (ret != 0) {
319 assert(!"Failed to set BO tiling");
320 goto close_and_return;
321 }
322
323 struct drm_i915_gem_get_tiling get_tiling = {
324 .handle = gem_create.handle,
325 };
326
327 if (gen_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling)) {
328 assert(!"Failed to get BO tiling");
329 goto close_and_return;
330 }
331
332 swizzled = get_tiling.swizzle_mode != I915_BIT_6_SWIZZLE_NONE;
333
334 close_and_return:
335
336 memset(&close, 0, sizeof(close));
337 close.handle = gem_create.handle;
338 gen_ioctl(fd, DRM_IOCTL_GEM_CLOSE, &close);
339
340 return swizzled;
341 }
342
343 bool
344 anv_gem_has_context_priority(int fd)
345 {
346 return !anv_gem_set_context_param(fd, 0, I915_CONTEXT_PARAM_PRIORITY,
347 GEN_CONTEXT_MEDIUM_PRIORITY);
348 }
349
350 int
351 anv_gem_create_context(struct anv_device *device)
352 {
353 struct drm_i915_gem_context_create create = { 0 };
354
355 int ret = gen_ioctl(device->fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &create);
356 if (ret == -1)
357 return -1;
358
359 return create.ctx_id;
360 }
361
362 int
363 anv_gem_destroy_context(struct anv_device *device, int context)
364 {
365 struct drm_i915_gem_context_destroy destroy = {
366 .ctx_id = context,
367 };
368
369 return gen_ioctl(device->fd, DRM_IOCTL_I915_GEM_CONTEXT_DESTROY, &destroy);
370 }
371
372 int
373 anv_gem_set_context_param(int fd, int context, uint32_t param, uint64_t value)
374 {
375 struct drm_i915_gem_context_param p = {
376 .ctx_id = context,
377 .param = param,
378 .value = value,
379 };
380 int err = 0;
381
382 if (gen_ioctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_SETPARAM, &p))
383 err = -errno;
384 return err;
385 }
386
387 int
388 anv_gem_get_context_param(int fd, int context, uint32_t param, uint64_t *value)
389 {
390 struct drm_i915_gem_context_param gp = {
391 .ctx_id = context,
392 .param = param,
393 };
394
395 int ret = gen_ioctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM, &gp);
396 if (ret == -1)
397 return -1;
398
399 *value = gp.value;
400 return 0;
401 }
402
403 int
404 anv_gem_gpu_get_reset_stats(struct anv_device *device,
405 uint32_t *active, uint32_t *pending)
406 {
407 struct drm_i915_reset_stats stats = {
408 .ctx_id = device->context_id,
409 };
410
411 int ret = gen_ioctl(device->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats);
412 if (ret == 0) {
413 *active = stats.batch_active;
414 *pending = stats.batch_pending;
415 }
416
417 return ret;
418 }
419
420 int
421 anv_gem_handle_to_fd(struct anv_device *device, uint32_t gem_handle)
422 {
423 struct drm_prime_handle args = {
424 .handle = gem_handle,
425 .flags = DRM_CLOEXEC,
426 };
427
428 int ret = gen_ioctl(device->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args);
429 if (ret == -1)
430 return -1;
431
432 return args.fd;
433 }
434
435 uint32_t
436 anv_gem_fd_to_handle(struct anv_device *device, int fd)
437 {
438 struct drm_prime_handle args = {
439 .fd = fd,
440 };
441
442 int ret = gen_ioctl(device->fd, DRM_IOCTL_PRIME_FD_TO_HANDLE, &args);
443 if (ret == -1)
444 return 0;
445
446 return args.handle;
447 }
448
449 int
450 anv_gem_reg_read(int fd, uint32_t offset, uint64_t *result)
451 {
452 struct drm_i915_reg_read args = {
453 .offset = offset
454 };
455
456 int ret = gen_ioctl(fd, DRM_IOCTL_I915_REG_READ, &args);
457
458 *result = args.val;
459 return ret;
460 }
461
462 int
463 anv_gem_sync_file_merge(struct anv_device *device, int fd1, int fd2)
464 {
465 struct sync_merge_data args = {
466 .name = "anv merge fence",
467 .fd2 = fd2,
468 .fence = -1,
469 };
470
471 int ret = gen_ioctl(fd1, SYNC_IOC_MERGE, &args);
472 if (ret == -1)
473 return -1;
474
475 return args.fence;
476 }
477
478 uint32_t
479 anv_gem_syncobj_create(struct anv_device *device, uint32_t flags)
480 {
481 struct drm_syncobj_create args = {
482 .flags = flags,
483 };
484
485 int ret = gen_ioctl(device->fd, DRM_IOCTL_SYNCOBJ_CREATE, &args);
486 if (ret)
487 return 0;
488
489 return args.handle;
490 }
491
492 void
493 anv_gem_syncobj_destroy(struct anv_device *device, uint32_t handle)
494 {
495 struct drm_syncobj_destroy args = {
496 .handle = handle,
497 };
498
499 gen_ioctl(device->fd, DRM_IOCTL_SYNCOBJ_DESTROY, &args);
500 }
501
502 int
503 anv_gem_syncobj_handle_to_fd(struct anv_device *device, uint32_t handle)
504 {
505 struct drm_syncobj_handle args = {
506 .handle = handle,
507 };
508
509 int ret = gen_ioctl(device->fd, DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD, &args);
510 if (ret)
511 return -1;
512
513 return args.fd;
514 }
515
516 uint32_t
517 anv_gem_syncobj_fd_to_handle(struct anv_device *device, int fd)
518 {
519 struct drm_syncobj_handle args = {
520 .fd = fd,
521 };
522
523 int ret = gen_ioctl(device->fd, DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE, &args);
524 if (ret)
525 return 0;
526
527 return args.handle;
528 }
529
530 int
531 anv_gem_syncobj_export_sync_file(struct anv_device *device, uint32_t handle)
532 {
533 struct drm_syncobj_handle args = {
534 .handle = handle,
535 .flags = DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE,
536 };
537
538 int ret = gen_ioctl(device->fd, DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD, &args);
539 if (ret)
540 return -1;
541
542 return args.fd;
543 }
544
545 int
546 anv_gem_syncobj_import_sync_file(struct anv_device *device,
547 uint32_t handle, int fd)
548 {
549 struct drm_syncobj_handle args = {
550 .handle = handle,
551 .fd = fd,
552 .flags = DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE,
553 };
554
555 return gen_ioctl(device->fd, DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE, &args);
556 }
557
558 void
559 anv_gem_syncobj_reset(struct anv_device *device, uint32_t handle)
560 {
561 struct drm_syncobj_array args = {
562 .handles = (uint64_t)(uintptr_t)&handle,
563 .count_handles = 1,
564 };
565
566 gen_ioctl(device->fd, DRM_IOCTL_SYNCOBJ_RESET, &args);
567 }
568
569 bool
570 anv_gem_supports_syncobj_wait(int fd)
571 {
572 return gen_gem_supports_syncobj_wait(fd);
573 }
574
575 int
576 anv_gem_syncobj_wait(struct anv_device *device,
577 uint32_t *handles, uint32_t num_handles,
578 int64_t abs_timeout_ns, bool wait_all)
579 {
580 struct drm_syncobj_wait args = {
581 .handles = (uint64_t)(uintptr_t)handles,
582 .count_handles = num_handles,
583 .timeout_nsec = abs_timeout_ns,
584 .flags = DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT,
585 };
586
587 if (wait_all)
588 args.flags |= DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL;
589
590 return gen_ioctl(device->fd, DRM_IOCTL_SYNCOBJ_WAIT, &args);
591 }