vulkan,anv: Add a common base object type for VkDevice
[mesa.git] / src / intel / vulkan / anv_image.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29 #include <sys/mman.h>
30 #include "drm-uapi/drm_fourcc.h"
31
32 #include "anv_private.h"
33 #include "util/debug.h"
34 #include "vk_util.h"
35 #include "util/u_math.h"
36
37 #include "vk_format_info.h"
38
39 static isl_surf_usage_flags_t
40 choose_isl_surf_usage(VkImageCreateFlags vk_create_flags,
41 VkImageUsageFlags vk_usage,
42 isl_surf_usage_flags_t isl_extra_usage,
43 VkImageAspectFlagBits aspect)
44 {
45 isl_surf_usage_flags_t isl_usage = isl_extra_usage;
46
47 if (vk_usage & VK_IMAGE_USAGE_SAMPLED_BIT)
48 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
49
50 if (vk_usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)
51 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
52
53 if (vk_usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT)
54 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
55
56 if (vk_create_flags & VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT)
57 isl_usage |= ISL_SURF_USAGE_CUBE_BIT;
58
59 /* Even if we're only using it for transfer operations, clears to depth and
60 * stencil images happen as depth and stencil so they need the right ISL
61 * usage bits or else things will fall apart.
62 */
63 switch (aspect) {
64 case VK_IMAGE_ASPECT_DEPTH_BIT:
65 isl_usage |= ISL_SURF_USAGE_DEPTH_BIT;
66 break;
67 case VK_IMAGE_ASPECT_STENCIL_BIT:
68 isl_usage |= ISL_SURF_USAGE_STENCIL_BIT;
69 break;
70 case VK_IMAGE_ASPECT_COLOR_BIT:
71 case VK_IMAGE_ASPECT_PLANE_0_BIT:
72 case VK_IMAGE_ASPECT_PLANE_1_BIT:
73 case VK_IMAGE_ASPECT_PLANE_2_BIT:
74 break;
75 default:
76 unreachable("bad VkImageAspect");
77 }
78
79 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) {
80 /* blorp implements transfers by sampling from the source image. */
81 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
82 }
83
84 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT &&
85 aspect == VK_IMAGE_ASPECT_COLOR_BIT) {
86 /* blorp implements transfers by rendering into the destination image.
87 * Only request this with color images, as we deal with depth/stencil
88 * formats differently. */
89 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
90 }
91
92 return isl_usage;
93 }
94
95 static isl_tiling_flags_t
96 choose_isl_tiling_flags(const struct anv_image_create_info *anv_info,
97 const struct isl_drm_modifier_info *isl_mod_info,
98 bool legacy_scanout)
99 {
100 const VkImageCreateInfo *base_info = anv_info->vk_info;
101 isl_tiling_flags_t flags = 0;
102
103 switch (base_info->tiling) {
104 default:
105 unreachable("bad VkImageTiling");
106 case VK_IMAGE_TILING_OPTIMAL:
107 flags = ISL_TILING_ANY_MASK;
108 break;
109 case VK_IMAGE_TILING_LINEAR:
110 flags = ISL_TILING_LINEAR_BIT;
111 break;
112 case VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT:
113 assert(isl_mod_info);
114 flags = 1 << isl_mod_info->tiling;
115 }
116
117 if (anv_info->isl_tiling_flags)
118 flags &= anv_info->isl_tiling_flags;
119
120 if (legacy_scanout)
121 flags &= ISL_TILING_LINEAR_BIT | ISL_TILING_X_BIT;
122
123 assert(flags);
124
125 return flags;
126 }
127
128 static void
129 add_surface(struct anv_image *image, struct anv_surface *surf, uint32_t plane)
130 {
131 assert(surf->isl.size_B > 0); /* isl surface must be initialized */
132
133 if (image->disjoint) {
134 surf->offset = align_u32(image->planes[plane].size,
135 surf->isl.alignment_B);
136 /* Plane offset is always 0 when it's disjoint. */
137 } else {
138 surf->offset = align_u32(image->size, surf->isl.alignment_B);
139 /* Determine plane's offset only once when the first surface is added. */
140 if (image->planes[plane].size == 0)
141 image->planes[plane].offset = image->size;
142 }
143
144 image->size = surf->offset + surf->isl.size_B;
145 image->planes[plane].size = (surf->offset + surf->isl.size_B) - image->planes[plane].offset;
146
147 image->alignment = MAX2(image->alignment, surf->isl.alignment_B);
148 image->planes[plane].alignment = MAX2(image->planes[plane].alignment,
149 surf->isl.alignment_B);
150 }
151
152 /**
153 * Do hardware limitations require the image plane to use a shadow surface?
154 *
155 * If hardware limitations force us to use a shadow surface, then the same
156 * limitations may also constrain the tiling of the primary surface; therefore
157 * paramater @a inout_primary_tiling_flags.
158 *
159 * If the image plane is a separate stencil plane and if the user provided
160 * VkImageStencilUsageCreateInfoEXT, then @a usage must be stencilUsage.
161 *
162 * @see anv_image::planes[]::shadow_surface
163 */
164 static bool
165 anv_image_plane_needs_shadow_surface(const struct gen_device_info *devinfo,
166 struct anv_format_plane plane_format,
167 VkImageTiling vk_tiling,
168 VkImageUsageFlags vk_plane_usage,
169 VkImageCreateFlags vk_create_flags,
170 isl_tiling_flags_t *inout_primary_tiling_flags)
171 {
172 if (devinfo->gen <= 8 &&
173 (vk_create_flags & VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT) &&
174 vk_tiling == VK_IMAGE_TILING_OPTIMAL) {
175 /* We must fallback to a linear surface because we may not be able to
176 * correctly handle the offsets if tiled. (On gen9,
177 * RENDER_SURFACE_STATE::X/Y Offset are sufficient). To prevent garbage
178 * performance while texturing, we maintain a tiled shadow surface.
179 */
180 assert(isl_format_is_compressed(plane_format.isl_format));
181
182 if (inout_primary_tiling_flags) {
183 *inout_primary_tiling_flags = ISL_TILING_LINEAR_BIT;
184 }
185
186 return true;
187 }
188
189 if (devinfo->gen <= 7 &&
190 plane_format.aspect == VK_IMAGE_ASPECT_STENCIL_BIT &&
191 (vk_plane_usage & VK_IMAGE_USAGE_SAMPLED_BIT)) {
192 /* gen7 can't sample from W-tiled surfaces. */
193 return true;
194 }
195
196 return false;
197 }
198
199 bool
200 anv_formats_ccs_e_compatible(const struct gen_device_info *devinfo,
201 VkImageCreateFlags create_flags,
202 VkFormat vk_format,
203 VkImageTiling vk_tiling,
204 const VkImageFormatListCreateInfoKHR *fmt_list)
205 {
206 enum isl_format format =
207 anv_get_isl_format(devinfo, vk_format,
208 VK_IMAGE_ASPECT_COLOR_BIT, vk_tiling);
209
210 if (!isl_format_supports_ccs_e(devinfo, format))
211 return false;
212
213 if (!(create_flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT))
214 return true;
215
216 if (!fmt_list || fmt_list->viewFormatCount == 0)
217 return false;
218
219 for (uint32_t i = 0; i < fmt_list->viewFormatCount; i++) {
220 enum isl_format view_format =
221 anv_get_isl_format(devinfo, fmt_list->pViewFormats[i],
222 VK_IMAGE_ASPECT_COLOR_BIT, vk_tiling);
223
224 if (!isl_formats_are_ccs_e_compatible(devinfo, format, view_format))
225 return false;
226 }
227
228 return true;
229 }
230
231 /**
232 * For color images that have an auxiliary surface, request allocation for an
233 * additional buffer that mainly stores fast-clear values. Use of this buffer
234 * allows us to access the image's subresources while being aware of their
235 * fast-clear values in non-trivial cases (e.g., outside of a render pass in
236 * which a fast clear has occurred).
237 *
238 * In order to avoid having multiple clear colors for a single plane of an
239 * image (hence a single RENDER_SURFACE_STATE), we only allow fast-clears on
240 * the first slice (level 0, layer 0). At the time of our testing (Jan 17,
241 * 2018), there were no known applications which would benefit from fast-
242 * clearing more than just the first slice.
243 *
244 * The fast clear portion of the image is laid out in the following order:
245 *
246 * * 1 or 4 dwords (depending on hardware generation) for the clear color
247 * * 1 dword for the anv_fast_clear_type of the clear color
248 * * On gen9+, 1 dword per level and layer of the image (3D levels count
249 * multiple layers) in level-major order for compression state.
250 *
251 * For the purpose of discoverability, the algorithm used to manage
252 * compression and fast-clears is described here:
253 *
254 * * On a transition from UNDEFINED or PREINITIALIZED to a defined layout,
255 * all of the values in the fast clear portion of the image are initialized
256 * to default values.
257 *
258 * * On fast-clear, the clear value is written into surface state and also
259 * into the buffer and the fast clear type is set appropriately. Both
260 * setting the fast-clear value in the buffer and setting the fast-clear
261 * type happen from the GPU using MI commands.
262 *
263 * * Whenever a render or blorp operation is performed with CCS_E, we call
264 * genX(cmd_buffer_mark_image_written) to set the compression state to
265 * true (which is represented by UINT32_MAX).
266 *
267 * * On pipeline barrier transitions, the worst-case transition is computed
268 * from the image layouts. The command streamer inspects the fast clear
269 * type and compression state dwords and constructs a predicate. The
270 * worst-case resolve is performed with the given predicate and the fast
271 * clear and compression state is set accordingly.
272 *
273 * See anv_layout_to_aux_usage and anv_layout_to_fast_clear_type functions for
274 * details on exactly what is allowed in what layouts.
275 *
276 * On gen7-9, we do not have a concept of indirect clear colors in hardware.
277 * In order to deal with this, we have to do some clear color management.
278 *
279 * * For LOAD_OP_LOAD at the top of a renderpass, we have to copy the clear
280 * value from the buffer into the surface state with MI commands.
281 *
282 * * For any blorp operations, we pass the address to the clear value into
283 * blorp and it knows to copy the clear color.
284 */
285 static void
286 add_aux_state_tracking_buffer(struct anv_image *image,
287 uint32_t plane,
288 const struct anv_device *device)
289 {
290 assert(image && device);
291 assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE &&
292 image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
293
294 /* Compressed images must be tiled and therefore everything should be 4K
295 * aligned. The CCS has the same alignment requirements. This is good
296 * because we need at least dword-alignment for MI_LOAD/STORE operations.
297 */
298 assert(image->alignment % 4 == 0);
299 assert((image->planes[plane].offset + image->planes[plane].size) % 4 == 0);
300
301 /* This buffer should be at the very end of the plane. */
302 if (image->disjoint) {
303 assert(image->planes[plane].size ==
304 (image->planes[plane].offset + image->planes[plane].size));
305 } else {
306 assert(image->size ==
307 (image->planes[plane].offset + image->planes[plane].size));
308 }
309
310 const unsigned clear_color_state_size = device->info.gen >= 10 ?
311 device->isl_dev.ss.clear_color_state_size :
312 device->isl_dev.ss.clear_value_size;
313
314 /* Clear color and fast clear type */
315 unsigned state_size = clear_color_state_size + 4;
316
317 /* We only need to track compression on CCS_E surfaces. */
318 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
319 if (image->type == VK_IMAGE_TYPE_3D) {
320 for (uint32_t l = 0; l < image->levels; l++)
321 state_size += anv_minify(image->extent.depth, l) * 4;
322 } else {
323 state_size += image->levels * image->array_size * 4;
324 }
325 }
326
327 /* Add some padding to make sure the fast clear color state buffer starts at
328 * a 4K alignment. We believe that 256B might be enough, but due to lack of
329 * testing we will leave this as 4K for now.
330 */
331 image->planes[plane].size = align_u64(image->planes[plane].size, 4096);
332 image->size = align_u64(image->size, 4096);
333
334 assert(image->planes[plane].offset % 4096 == 0);
335
336 image->planes[plane].fast_clear_state_offset =
337 image->planes[plane].offset + image->planes[plane].size;
338
339 image->planes[plane].size += state_size;
340 image->size += state_size;
341 }
342
343 /**
344 * The return code indicates whether creation of the VkImage should continue
345 * or fail, not whether the creation of the aux surface succeeded. If the aux
346 * surface is not required (for example, by neither hardware nor DRM format
347 * modifier), then this may return VK_SUCCESS when creation of the aux surface
348 * fails.
349 */
350 static VkResult
351 add_aux_surface_if_supported(struct anv_device *device,
352 struct anv_image *image,
353 uint32_t plane,
354 struct anv_format_plane plane_format,
355 const VkImageFormatListCreateInfoKHR *fmt_list,
356 isl_surf_usage_flags_t isl_extra_usage_flags)
357 {
358 VkImageAspectFlags aspect = plane_format.aspect;
359 bool ok;
360
361 /* The aux surface must not be already added. */
362 assert(image->planes[plane].aux_surface.isl.size_B == 0);
363
364 if ((isl_extra_usage_flags & ISL_SURF_USAGE_DISABLE_AUX_BIT))
365 return VK_SUCCESS;
366
367 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
368 /* We don't advertise that depth buffers could be used as storage
369 * images.
370 */
371 assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
372
373 /* Allow the user to control HiZ enabling. Disable by default on gen7
374 * because resolves are not currently implemented pre-BDW.
375 */
376 if (!(image->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) {
377 /* It will never be used as an attachment, HiZ is pointless. */
378 return VK_SUCCESS;
379 }
380
381 if (device->info.gen == 7) {
382 anv_perf_warn(device, image, "Implement gen7 HiZ");
383 return VK_SUCCESS;
384 }
385
386 if (image->levels > 1) {
387 anv_perf_warn(device, image, "Enable multi-LOD HiZ");
388 return VK_SUCCESS;
389 }
390
391 if (device->info.gen == 8 && image->samples > 1) {
392 anv_perf_warn(device, image, "Enable gen8 multisampled HiZ");
393 return VK_SUCCESS;
394 }
395
396 if (unlikely(INTEL_DEBUG & DEBUG_NO_HIZ))
397 return VK_SUCCESS;
398
399 ok = isl_surf_get_hiz_surf(&device->isl_dev,
400 &image->planes[plane].surface.isl,
401 &image->planes[plane].aux_surface.isl);
402 assert(ok);
403 if (!isl_surf_supports_ccs(&device->isl_dev,
404 &image->planes[plane].surface.isl)) {
405 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ;
406 } else if (image->usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
407 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT) &&
408 image->samples == 1) {
409 /* If it's used as an input attachment or a texture and it's
410 * single-sampled (this is a requirement for HiZ+CCS write-through
411 * mode), use write-through mode so that we don't need to resolve
412 * before texturing. This will make depth testing a bit slower but
413 * texturing faster.
414 *
415 * TODO: This is a heuristic trade-off; we haven't tuned it at all.
416 */
417 assert(device->info.gen >= 12);
418 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ_CCS_WT;
419 } else {
420 assert(device->info.gen >= 12);
421 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ_CCS;
422 }
423 add_surface(image, &image->planes[plane].aux_surface, plane);
424 } else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->samples == 1) {
425 if (image->n_planes != 1) {
426 /* Multiplanar images seem to hit a sampler bug with CCS and R16G16
427 * format. (Putting the clear state a page/4096bytes further fixes
428 * the issue).
429 */
430 return VK_SUCCESS;
431 }
432
433 if ((image->create_flags & VK_IMAGE_CREATE_ALIAS_BIT)) {
434 /* The image may alias a plane of a multiplanar image. Above we ban
435 * CCS on multiplanar images.
436 */
437 return VK_SUCCESS;
438 }
439
440 if (!isl_format_supports_rendering(&device->info,
441 plane_format.isl_format)) {
442 /* Disable CCS because it is not useful (we can't render to the image
443 * with CCS enabled). While it may be technically possible to enable
444 * CCS for this case, we currently don't have things hooked up to get
445 * it working.
446 */
447 anv_perf_warn(device, image,
448 "This image format doesn't support rendering. "
449 "Not allocating an CCS buffer.");
450 return VK_SUCCESS;
451 }
452
453 if (unlikely(INTEL_DEBUG & DEBUG_NO_RBC))
454 return VK_SUCCESS;
455
456 ok = isl_surf_get_ccs_surf(&device->isl_dev,
457 &image->planes[plane].surface.isl,
458 &image->planes[plane].aux_surface.isl,
459 NULL, 0);
460 if (!ok)
461 return VK_SUCCESS;
462
463 /* Choose aux usage */
464 if (!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
465 anv_formats_ccs_e_compatible(&device->info,
466 image->create_flags,
467 image->vk_format,
468 image->tiling,
469 fmt_list)) {
470 /* For images created without MUTABLE_FORMAT_BIT set, we know that
471 * they will always be used with the original format. In particular,
472 * they will always be used with a format that supports color
473 * compression. If it's never used as a storage image, then it will
474 * only be used through the sampler or the as a render target. This
475 * means that it's safe to just leave compression on at all times for
476 * these formats.
477 */
478 image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_E;
479 } else if (device->info.gen >= 12) {
480 anv_perf_warn(device, image,
481 "The CCS_D aux mode is not yet handled on "
482 "Gen12+. Not allocating a CCS buffer.");
483 image->planes[plane].aux_surface.isl.size_B = 0;
484 return VK_SUCCESS;
485 } else {
486 image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_D;
487 }
488
489 if (!device->physical->has_implicit_ccs)
490 add_surface(image, &image->planes[plane].aux_surface, plane);
491
492 add_aux_state_tracking_buffer(image, plane, device);
493 } else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->samples > 1) {
494 assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
495 ok = isl_surf_get_mcs_surf(&device->isl_dev,
496 &image->planes[plane].surface.isl,
497 &image->planes[plane].aux_surface.isl);
498 if (!ok)
499 return VK_SUCCESS;
500
501 image->planes[plane].aux_usage = ISL_AUX_USAGE_MCS;
502 add_surface(image, &image->planes[plane].aux_surface, plane);
503 add_aux_state_tracking_buffer(image, plane, device);
504 }
505
506 return VK_SUCCESS;
507 }
508
509 /**
510 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
511 * image's memory requirements (that is, the image's size and alignment).
512 */
513 static VkResult
514 make_surface(struct anv_device *device,
515 struct anv_image *image,
516 const VkImageFormatListCreateInfoKHR *fmt_list,
517 uint32_t stride,
518 isl_tiling_flags_t tiling_flags,
519 isl_surf_usage_flags_t isl_extra_usage_flags,
520 VkImageAspectFlagBits aspect)
521 {
522 VkResult result;
523 bool ok;
524
525 static const enum isl_surf_dim vk_to_isl_surf_dim[] = {
526 [VK_IMAGE_TYPE_1D] = ISL_SURF_DIM_1D,
527 [VK_IMAGE_TYPE_2D] = ISL_SURF_DIM_2D,
528 [VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D,
529 };
530
531 image->extent = anv_sanitize_image_extent(image->type, image->extent);
532
533 const unsigned plane = anv_image_aspect_to_plane(image->aspects, aspect);
534 const struct anv_format_plane plane_format =
535 anv_get_format_plane(&device->info, image->vk_format, aspect, image->tiling);
536 struct anv_surface *anv_surf = &image->planes[plane].surface;
537
538 const isl_surf_usage_flags_t usage =
539 choose_isl_surf_usage(image->create_flags, image->usage,
540 isl_extra_usage_flags, aspect);
541
542 VkImageUsageFlags plane_vk_usage =
543 aspect == VK_IMAGE_ASPECT_STENCIL_BIT ?
544 image->stencil_usage : image->usage;
545
546 bool needs_shadow =
547 anv_image_plane_needs_shadow_surface(&device->info,
548 plane_format,
549 image->tiling,
550 plane_vk_usage,
551 image->create_flags,
552 &tiling_flags);
553
554 ok = isl_surf_init(&device->isl_dev, &anv_surf->isl,
555 .dim = vk_to_isl_surf_dim[image->type],
556 .format = plane_format.isl_format,
557 .width = image->extent.width / plane_format.denominator_scales[0],
558 .height = image->extent.height / plane_format.denominator_scales[1],
559 .depth = image->extent.depth,
560 .levels = image->levels,
561 .array_len = image->array_size,
562 .samples = image->samples,
563 .min_alignment_B = 0,
564 .row_pitch_B = stride,
565 .usage = usage,
566 .tiling_flags = tiling_flags);
567
568 if (!ok)
569 return VK_ERROR_OUT_OF_DEVICE_MEMORY;
570
571 image->planes[plane].aux_usage = ISL_AUX_USAGE_NONE;
572
573 add_surface(image, anv_surf, plane);
574
575 if (needs_shadow) {
576 ok = isl_surf_init(&device->isl_dev, &image->planes[plane].shadow_surface.isl,
577 .dim = vk_to_isl_surf_dim[image->type],
578 .format = plane_format.isl_format,
579 .width = image->extent.width,
580 .height = image->extent.height,
581 .depth = image->extent.depth,
582 .levels = image->levels,
583 .array_len = image->array_size,
584 .samples = image->samples,
585 .min_alignment_B = 0,
586 .row_pitch_B = stride,
587 .usage = ISL_SURF_USAGE_TEXTURE_BIT |
588 (usage & ISL_SURF_USAGE_CUBE_BIT),
589 .tiling_flags = ISL_TILING_ANY_MASK);
590
591 /* isl_surf_init() will fail only if provided invalid input. Invalid input
592 * is illegal in Vulkan.
593 */
594 assert(ok);
595
596 add_surface(image, &image->planes[plane].shadow_surface, plane);
597 }
598
599 result = add_aux_surface_if_supported(device, image, plane, plane_format,
600 fmt_list, isl_extra_usage_flags);
601 if (result != VK_SUCCESS)
602 return result;
603
604 assert((image->planes[plane].offset + image->planes[plane].size) == image->size);
605
606 /* Upper bound of the last surface should be smaller than the plane's
607 * size.
608 */
609 assert((MAX2(image->planes[plane].surface.offset,
610 image->planes[plane].aux_surface.offset) +
611 (image->planes[plane].aux_surface.isl.size_B > 0 ?
612 image->planes[plane].aux_surface.isl.size_B :
613 image->planes[plane].surface.isl.size_B)) <=
614 (image->planes[plane].offset + image->planes[plane].size));
615
616 if (image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE) {
617 /* assert(image->planes[plane].fast_clear_state_offset == */
618 /* (image->planes[plane].aux_surface.offset + image->planes[plane].aux_surface.isl.size_B)); */
619 assert(image->planes[plane].fast_clear_state_offset <
620 (image->planes[plane].offset + image->planes[plane].size));
621 }
622
623 return VK_SUCCESS;
624 }
625
626 static uint32_t
627 score_drm_format_mod(uint64_t modifier)
628 {
629 switch (modifier) {
630 case DRM_FORMAT_MOD_LINEAR: return 1;
631 case I915_FORMAT_MOD_X_TILED: return 2;
632 case I915_FORMAT_MOD_Y_TILED: return 3;
633 case I915_FORMAT_MOD_Y_TILED_CCS: return 4;
634 default: unreachable("bad DRM format modifier");
635 }
636 }
637
638 static const struct isl_drm_modifier_info *
639 choose_drm_format_mod(const struct anv_physical_device *device,
640 uint32_t modifier_count, const uint64_t *modifiers)
641 {
642 uint64_t best_mod = UINT64_MAX;
643 uint32_t best_score = 0;
644
645 for (uint32_t i = 0; i < modifier_count; ++i) {
646 uint32_t score = score_drm_format_mod(modifiers[i]);
647 if (score > best_score) {
648 best_mod = modifiers[i];
649 best_score = score;
650 }
651 }
652
653 if (best_score > 0)
654 return isl_drm_modifier_get_info(best_mod);
655 else
656 return NULL;
657 }
658
659 VkResult
660 anv_image_create(VkDevice _device,
661 const struct anv_image_create_info *create_info,
662 const VkAllocationCallbacks* alloc,
663 VkImage *pImage)
664 {
665 ANV_FROM_HANDLE(anv_device, device, _device);
666 const VkImageCreateInfo *pCreateInfo = create_info->vk_info;
667 const struct isl_drm_modifier_info *isl_mod_info = NULL;
668 struct anv_image *image = NULL;
669 VkResult r;
670
671 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
672
673 const struct wsi_image_create_info *wsi_info =
674 vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
675
676 if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
677 const VkImageDrmFormatModifierListCreateInfoEXT *mod_info =
678 vk_find_struct_const(pCreateInfo->pNext,
679 IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT);
680 isl_mod_info = choose_drm_format_mod(device->physical,
681 mod_info->drmFormatModifierCount,
682 mod_info->pDrmFormatModifiers);
683 assert(isl_mod_info);
684 }
685
686 anv_assert(pCreateInfo->mipLevels > 0);
687 anv_assert(pCreateInfo->arrayLayers > 0);
688 anv_assert(pCreateInfo->samples > 0);
689 anv_assert(pCreateInfo->extent.width > 0);
690 anv_assert(pCreateInfo->extent.height > 0);
691 anv_assert(pCreateInfo->extent.depth > 0);
692
693 image = vk_zalloc2(&device->vk.alloc, alloc, sizeof(*image), 8,
694 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
695 if (!image)
696 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
697
698 image->type = pCreateInfo->imageType;
699 image->extent = pCreateInfo->extent;
700 image->vk_format = pCreateInfo->format;
701 image->format = anv_get_format(pCreateInfo->format);
702 image->aspects = vk_format_aspects(image->vk_format);
703 image->levels = pCreateInfo->mipLevels;
704 image->array_size = pCreateInfo->arrayLayers;
705 image->samples = pCreateInfo->samples;
706 image->usage = pCreateInfo->usage;
707 image->create_flags = pCreateInfo->flags;
708 image->tiling = pCreateInfo->tiling;
709 image->disjoint = pCreateInfo->flags & VK_IMAGE_CREATE_DISJOINT_BIT;
710 image->needs_set_tiling = wsi_info && wsi_info->scanout;
711 image->drm_format_mod = isl_mod_info ? isl_mod_info->modifier :
712 DRM_FORMAT_MOD_INVALID;
713
714 if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
715 image->stencil_usage = pCreateInfo->usage;
716 const VkImageStencilUsageCreateInfoEXT *stencil_usage_info =
717 vk_find_struct_const(pCreateInfo->pNext,
718 IMAGE_STENCIL_USAGE_CREATE_INFO_EXT);
719 if (stencil_usage_info)
720 image->stencil_usage = stencil_usage_info->stencilUsage;
721 }
722
723 /* In case of external format, We don't know format yet,
724 * so skip the rest for now.
725 */
726 if (create_info->external_format) {
727 image->external_format = true;
728 *pImage = anv_image_to_handle(image);
729 return VK_SUCCESS;
730 }
731
732 const struct anv_format *format = anv_get_format(image->vk_format);
733 assert(format != NULL);
734
735 const isl_tiling_flags_t isl_tiling_flags =
736 choose_isl_tiling_flags(create_info, isl_mod_info,
737 image->needs_set_tiling);
738
739 image->n_planes = format->n_planes;
740
741 const VkImageFormatListCreateInfoKHR *fmt_list =
742 vk_find_struct_const(pCreateInfo->pNext,
743 IMAGE_FORMAT_LIST_CREATE_INFO_KHR);
744
745 uint32_t b;
746 for_each_bit(b, image->aspects) {
747 r = make_surface(device, image, fmt_list, create_info->stride,
748 isl_tiling_flags, create_info->isl_extra_usage_flags,
749 (1 << b));
750 if (r != VK_SUCCESS)
751 goto fail;
752 }
753
754 *pImage = anv_image_to_handle(image);
755
756 return VK_SUCCESS;
757
758 fail:
759 if (image)
760 vk_free2(&device->vk.alloc, alloc, image);
761
762 return r;
763 }
764
765 static struct anv_image *
766 anv_swapchain_get_image(VkSwapchainKHR swapchain,
767 uint32_t index)
768 {
769 uint32_t n_images = index + 1;
770 VkImage *images = malloc(sizeof(*images) * n_images);
771 VkResult result = wsi_common_get_images(swapchain, &n_images, images);
772
773 if (result != VK_SUCCESS && result != VK_INCOMPLETE) {
774 free(images);
775 return NULL;
776 }
777
778 ANV_FROM_HANDLE(anv_image, image, images[index]);
779 free(images);
780
781 return image;
782 }
783
784 static VkResult
785 anv_image_from_swapchain(VkDevice device,
786 const VkImageCreateInfo *pCreateInfo,
787 const VkImageSwapchainCreateInfoKHR *swapchain_info,
788 const VkAllocationCallbacks *pAllocator,
789 VkImage *pImage)
790 {
791 struct anv_image *swapchain_image = anv_swapchain_get_image(swapchain_info->swapchain, 0);
792 assert(swapchain_image);
793
794 assert(swapchain_image->type == pCreateInfo->imageType);
795 assert(swapchain_image->vk_format == pCreateInfo->format);
796 assert(swapchain_image->extent.width == pCreateInfo->extent.width);
797 assert(swapchain_image->extent.height == pCreateInfo->extent.height);
798 assert(swapchain_image->extent.depth == pCreateInfo->extent.depth);
799 assert(swapchain_image->array_size == pCreateInfo->arrayLayers);
800 /* Color attachment is added by the wsi code. */
801 assert(swapchain_image->usage == (pCreateInfo->usage | VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT));
802
803 VkImageCreateInfo local_create_info;
804 local_create_info = *pCreateInfo;
805 local_create_info.pNext = NULL;
806 /* The following parameters are implictly selected by the wsi code. */
807 local_create_info.tiling = VK_IMAGE_TILING_OPTIMAL;
808 local_create_info.samples = VK_SAMPLE_COUNT_1_BIT;
809 local_create_info.usage |= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
810
811 /* If the image has a particular modifier, specify that modifier. */
812 VkImageDrmFormatModifierListCreateInfoEXT local_modifier_info = {
813 .sType = VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT,
814 .drmFormatModifierCount = 1,
815 .pDrmFormatModifiers = &swapchain_image->drm_format_mod,
816 };
817 if (swapchain_image->drm_format_mod != DRM_FORMAT_MOD_INVALID)
818 __vk_append_struct(&local_create_info, &local_modifier_info);
819
820 return anv_image_create(device,
821 &(struct anv_image_create_info) {
822 .vk_info = &local_create_info,
823 .external_format = swapchain_image->external_format,
824 },
825 pAllocator,
826 pImage);
827 }
828
829 VkResult
830 anv_CreateImage(VkDevice device,
831 const VkImageCreateInfo *pCreateInfo,
832 const VkAllocationCallbacks *pAllocator,
833 VkImage *pImage)
834 {
835 const VkExternalMemoryImageCreateInfo *create_info =
836 vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_MEMORY_IMAGE_CREATE_INFO);
837
838 if (create_info && (create_info->handleTypes &
839 VK_EXTERNAL_MEMORY_HANDLE_TYPE_ANDROID_HARDWARE_BUFFER_BIT_ANDROID))
840 return anv_image_from_external(device, pCreateInfo, create_info,
841 pAllocator, pImage);
842
843 bool use_external_format = false;
844 const VkExternalFormatANDROID *ext_format =
845 vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_FORMAT_ANDROID);
846
847 /* "If externalFormat is zero, the effect is as if the
848 * VkExternalFormatANDROID structure was not present. Otherwise, the image
849 * will have the specified external format."
850 */
851 if (ext_format && ext_format->externalFormat != 0)
852 use_external_format = true;
853
854 const VkNativeBufferANDROID *gralloc_info =
855 vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);
856 if (gralloc_info)
857 return anv_image_from_gralloc(device, pCreateInfo, gralloc_info,
858 pAllocator, pImage);
859
860 const VkImageSwapchainCreateInfoKHR *swapchain_info =
861 vk_find_struct_const(pCreateInfo->pNext, IMAGE_SWAPCHAIN_CREATE_INFO_KHR);
862 if (swapchain_info && swapchain_info->swapchain != VK_NULL_HANDLE)
863 return anv_image_from_swapchain(device, pCreateInfo, swapchain_info,
864 pAllocator, pImage);
865
866 return anv_image_create(device,
867 &(struct anv_image_create_info) {
868 .vk_info = pCreateInfo,
869 .external_format = use_external_format,
870 },
871 pAllocator,
872 pImage);
873 }
874
875 void
876 anv_DestroyImage(VkDevice _device, VkImage _image,
877 const VkAllocationCallbacks *pAllocator)
878 {
879 ANV_FROM_HANDLE(anv_device, device, _device);
880 ANV_FROM_HANDLE(anv_image, image, _image);
881
882 if (!image)
883 return;
884
885 for (uint32_t p = 0; p < image->n_planes; ++p) {
886 if (image->planes[p].bo_is_owned) {
887 assert(image->planes[p].address.bo != NULL);
888 anv_device_release_bo(device, image->planes[p].address.bo);
889 }
890 }
891
892 vk_free2(&device->vk.alloc, pAllocator, image);
893 }
894
895 static void anv_image_bind_memory_plane(struct anv_device *device,
896 struct anv_image *image,
897 uint32_t plane,
898 struct anv_device_memory *memory,
899 uint32_t memory_offset)
900 {
901 assert(!image->planes[plane].bo_is_owned);
902
903 if (!memory) {
904 image->planes[plane].address = ANV_NULL_ADDRESS;
905 return;
906 }
907
908 image->planes[plane].address = (struct anv_address) {
909 .bo = memory->bo,
910 .offset = memory_offset,
911 };
912
913 /* If we're on a platform that uses implicit CCS and our buffer does not
914 * have any implicit CCS data, disable compression on that image.
915 */
916 if (device->physical->has_implicit_ccs && !memory->bo->has_implicit_ccs)
917 image->planes[plane].aux_usage = ISL_AUX_USAGE_NONE;
918 }
919
920 /* We are binding AHardwareBuffer. Get a description, resolve the
921 * format and prepare anv_image properly.
922 */
923 static void
924 resolve_ahw_image(struct anv_device *device,
925 struct anv_image *image,
926 struct anv_device_memory *mem)
927 {
928 #if defined(ANDROID) && ANDROID_API_LEVEL >= 26
929 assert(mem->ahw);
930 AHardwareBuffer_Desc desc;
931 AHardwareBuffer_describe(mem->ahw, &desc);
932
933 /* Check tiling. */
934 int i915_tiling = anv_gem_get_tiling(device, mem->bo->gem_handle);
935 VkImageTiling vk_tiling;
936 isl_tiling_flags_t isl_tiling_flags = 0;
937
938 switch (i915_tiling) {
939 case I915_TILING_NONE:
940 vk_tiling = VK_IMAGE_TILING_LINEAR;
941 isl_tiling_flags = ISL_TILING_LINEAR_BIT;
942 break;
943 case I915_TILING_X:
944 vk_tiling = VK_IMAGE_TILING_OPTIMAL;
945 isl_tiling_flags = ISL_TILING_X_BIT;
946 break;
947 case I915_TILING_Y:
948 vk_tiling = VK_IMAGE_TILING_OPTIMAL;
949 isl_tiling_flags = ISL_TILING_Y0_BIT;
950 break;
951 case -1:
952 default:
953 unreachable("Invalid tiling flags.");
954 }
955
956 assert(vk_tiling == VK_IMAGE_TILING_LINEAR ||
957 vk_tiling == VK_IMAGE_TILING_OPTIMAL);
958
959 /* Check format. */
960 VkFormat vk_format = vk_format_from_android(desc.format, desc.usage);
961 enum isl_format isl_fmt = anv_get_isl_format(&device->info,
962 vk_format,
963 VK_IMAGE_ASPECT_COLOR_BIT,
964 vk_tiling);
965 assert(isl_fmt != ISL_FORMAT_UNSUPPORTED);
966
967 /* Handle RGB(X)->RGBA fallback. */
968 switch (desc.format) {
969 case AHARDWAREBUFFER_FORMAT_R8G8B8_UNORM:
970 case AHARDWAREBUFFER_FORMAT_R8G8B8X8_UNORM:
971 if (isl_format_is_rgb(isl_fmt))
972 isl_fmt = isl_format_rgb_to_rgba(isl_fmt);
973 break;
974 }
975
976 /* Now we are able to fill anv_image fields properly and create
977 * isl_surface for it.
978 */
979 image->vk_format = vk_format;
980 image->format = anv_get_format(vk_format);
981 image->aspects = vk_format_aspects(image->vk_format);
982 image->n_planes = image->format->n_planes;
983
984 uint32_t stride = desc.stride *
985 (isl_format_get_layout(isl_fmt)->bpb / 8);
986
987 uint32_t b;
988 for_each_bit(b, image->aspects) {
989 VkResult r = make_surface(device, image, NULL, stride, isl_tiling_flags,
990 ISL_SURF_USAGE_DISABLE_AUX_BIT, (1 << b));
991 assert(r == VK_SUCCESS);
992 }
993 #endif
994 }
995
996 VkResult anv_BindImageMemory(
997 VkDevice _device,
998 VkImage _image,
999 VkDeviceMemory _memory,
1000 VkDeviceSize memoryOffset)
1001 {
1002 ANV_FROM_HANDLE(anv_device, device, _device);
1003 ANV_FROM_HANDLE(anv_device_memory, mem, _memory);
1004 ANV_FROM_HANDLE(anv_image, image, _image);
1005
1006 if (mem->ahw)
1007 resolve_ahw_image(device, image, mem);
1008
1009 uint32_t aspect_bit;
1010 anv_foreach_image_aspect_bit(aspect_bit, image, image->aspects) {
1011 uint32_t plane =
1012 anv_image_aspect_to_plane(image->aspects, 1UL << aspect_bit);
1013 anv_image_bind_memory_plane(device, image, plane, mem, memoryOffset);
1014 }
1015
1016 return VK_SUCCESS;
1017 }
1018
1019 VkResult anv_BindImageMemory2(
1020 VkDevice _device,
1021 uint32_t bindInfoCount,
1022 const VkBindImageMemoryInfo* pBindInfos)
1023 {
1024 ANV_FROM_HANDLE(anv_device, device, _device);
1025
1026 for (uint32_t i = 0; i < bindInfoCount; i++) {
1027 const VkBindImageMemoryInfo *bind_info = &pBindInfos[i];
1028 ANV_FROM_HANDLE(anv_device_memory, mem, bind_info->memory);
1029 ANV_FROM_HANDLE(anv_image, image, bind_info->image);
1030
1031 /* Resolve will alter the image's aspects, do this first. */
1032 if (mem && mem->ahw)
1033 resolve_ahw_image(device, image, mem);
1034
1035 VkImageAspectFlags aspects = image->aspects;
1036 vk_foreach_struct_const(s, bind_info->pNext) {
1037 switch (s->sType) {
1038 case VK_STRUCTURE_TYPE_BIND_IMAGE_PLANE_MEMORY_INFO: {
1039 const VkBindImagePlaneMemoryInfo *plane_info =
1040 (const VkBindImagePlaneMemoryInfo *) s;
1041
1042 aspects = plane_info->planeAspect;
1043 break;
1044 }
1045 case VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_SWAPCHAIN_INFO_KHR: {
1046 const VkBindImageMemorySwapchainInfoKHR *swapchain_info =
1047 (const VkBindImageMemorySwapchainInfoKHR *) s;
1048 struct anv_image *swapchain_image =
1049 anv_swapchain_get_image(swapchain_info->swapchain,
1050 swapchain_info->imageIndex);
1051 assert(swapchain_image);
1052 assert(image->aspects == swapchain_image->aspects);
1053 assert(mem == NULL);
1054
1055 uint32_t aspect_bit;
1056 anv_foreach_image_aspect_bit(aspect_bit, image, aspects) {
1057 uint32_t plane =
1058 anv_image_aspect_to_plane(image->aspects, 1UL << aspect_bit);
1059 struct anv_device_memory mem = {
1060 .bo = swapchain_image->planes[plane].address.bo,
1061 };
1062 anv_image_bind_memory_plane(device, image, plane,
1063 &mem, bind_info->memoryOffset);
1064 }
1065 break;
1066 }
1067 default:
1068 anv_debug_ignored_stype(s->sType);
1069 break;
1070 }
1071 }
1072
1073 /* VkBindImageMemorySwapchainInfoKHR requires memory to be
1074 * VK_NULL_HANDLE. In such case, just carry one with the next bind
1075 * item.
1076 */
1077 if (!mem)
1078 continue;
1079
1080 uint32_t aspect_bit;
1081 anv_foreach_image_aspect_bit(aspect_bit, image, aspects) {
1082 uint32_t plane =
1083 anv_image_aspect_to_plane(image->aspects, 1UL << aspect_bit);
1084 anv_image_bind_memory_plane(device, image, plane,
1085 mem, bind_info->memoryOffset);
1086 }
1087 }
1088
1089 return VK_SUCCESS;
1090 }
1091
1092 void anv_GetImageSubresourceLayout(
1093 VkDevice device,
1094 VkImage _image,
1095 const VkImageSubresource* subresource,
1096 VkSubresourceLayout* layout)
1097 {
1098 ANV_FROM_HANDLE(anv_image, image, _image);
1099
1100 const struct anv_surface *surface;
1101 if (subresource->aspectMask == VK_IMAGE_ASPECT_PLANE_1_BIT &&
1102 image->drm_format_mod != DRM_FORMAT_MOD_INVALID &&
1103 isl_drm_modifier_has_aux(image->drm_format_mod)) {
1104 surface = &image->planes[0].aux_surface;
1105 } else {
1106 uint32_t plane = anv_image_aspect_to_plane(image->aspects,
1107 subresource->aspectMask);
1108 surface = &image->planes[plane].surface;
1109 }
1110
1111 assert(__builtin_popcount(subresource->aspectMask) == 1);
1112
1113 layout->offset = surface->offset;
1114 layout->rowPitch = surface->isl.row_pitch_B;
1115 layout->depthPitch = isl_surf_get_array_pitch(&surface->isl);
1116 layout->arrayPitch = isl_surf_get_array_pitch(&surface->isl);
1117
1118 if (subresource->mipLevel > 0 || subresource->arrayLayer > 0) {
1119 assert(surface->isl.tiling == ISL_TILING_LINEAR);
1120
1121 uint32_t offset_B;
1122 isl_surf_get_image_offset_B_tile_sa(&surface->isl,
1123 subresource->mipLevel,
1124 subresource->arrayLayer,
1125 0 /* logical_z_offset_px */,
1126 &offset_B, NULL, NULL);
1127 layout->offset += offset_B;
1128 layout->size = layout->rowPitch * anv_minify(image->extent.height,
1129 subresource->mipLevel);
1130 } else {
1131 layout->size = surface->isl.size_B;
1132 }
1133 }
1134
1135 VkResult anv_GetImageDrmFormatModifierPropertiesEXT(
1136 VkDevice device,
1137 VkImage _image,
1138 VkImageDrmFormatModifierPropertiesEXT* pProperties)
1139 {
1140 ANV_FROM_HANDLE(anv_image, image, _image);
1141
1142 assert(pProperties->sType ==
1143 VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT);
1144
1145 pProperties->drmFormatModifier = image->drm_format_mod;
1146
1147 return VK_SUCCESS;
1148 }
1149
1150 static VkImageUsageFlags
1151 vk_image_layout_to_usage_flags(VkImageLayout layout,
1152 VkImageAspectFlagBits aspect)
1153 {
1154 assert(util_bitcount(aspect) == 1);
1155
1156 switch (layout) {
1157 case VK_IMAGE_LAYOUT_UNDEFINED:
1158 case VK_IMAGE_LAYOUT_PREINITIALIZED:
1159 return 0u;
1160
1161 case VK_IMAGE_LAYOUT_GENERAL:
1162 return ~0u;
1163
1164 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
1165 assert(aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
1166 return VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
1167
1168 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
1169 assert(aspect & (VK_IMAGE_ASPECT_DEPTH_BIT |
1170 VK_IMAGE_ASPECT_STENCIL_BIT));
1171 return VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT;
1172
1173 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL:
1174 assert(aspect & VK_IMAGE_ASPECT_DEPTH_BIT);
1175 return vk_image_layout_to_usage_flags(
1176 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, aspect);
1177
1178 case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL:
1179 assert(aspect & VK_IMAGE_ASPECT_STENCIL_BIT);
1180 return vk_image_layout_to_usage_flags(
1181 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, aspect);
1182
1183 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
1184 assert(aspect & (VK_IMAGE_ASPECT_DEPTH_BIT |
1185 VK_IMAGE_ASPECT_STENCIL_BIT));
1186 return VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT |
1187 VK_IMAGE_USAGE_SAMPLED_BIT |
1188 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT;
1189
1190 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL:
1191 assert(aspect & VK_IMAGE_ASPECT_DEPTH_BIT);
1192 return vk_image_layout_to_usage_flags(
1193 VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL, aspect);
1194
1195 case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL:
1196 assert(aspect & VK_IMAGE_ASPECT_STENCIL_BIT);
1197 return vk_image_layout_to_usage_flags(
1198 VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL, aspect);
1199
1200 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
1201 return VK_IMAGE_USAGE_SAMPLED_BIT |
1202 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT;
1203
1204 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
1205 return VK_IMAGE_USAGE_TRANSFER_SRC_BIT;
1206
1207 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
1208 return VK_IMAGE_USAGE_TRANSFER_DST_BIT;
1209
1210 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL:
1211 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
1212 return vk_image_layout_to_usage_flags(
1213 VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL, aspect);
1214 } else if (aspect == VK_IMAGE_ASPECT_STENCIL_BIT) {
1215 return vk_image_layout_to_usage_flags(
1216 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, aspect);
1217 } else {
1218 assert(!"Must be a depth/stencil aspect");
1219 return 0;
1220 }
1221
1222 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL:
1223 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
1224 return vk_image_layout_to_usage_flags(
1225 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, aspect);
1226 } else if (aspect == VK_IMAGE_ASPECT_STENCIL_BIT) {
1227 return vk_image_layout_to_usage_flags(
1228 VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL, aspect);
1229 } else {
1230 assert(!"Must be a depth/stencil aspect");
1231 return 0;
1232 }
1233
1234 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR:
1235 assert(aspect == VK_IMAGE_ASPECT_COLOR_BIT);
1236 /* This needs to be handled specially by the caller */
1237 return 0;
1238
1239 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:
1240 assert(aspect == VK_IMAGE_ASPECT_COLOR_BIT);
1241 return vk_image_layout_to_usage_flags(VK_IMAGE_LAYOUT_GENERAL, aspect);
1242
1243 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV:
1244 assert(aspect == VK_IMAGE_ASPECT_COLOR_BIT);
1245 return VK_IMAGE_USAGE_SHADING_RATE_IMAGE_BIT_NV;
1246
1247 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT:
1248 assert(aspect == VK_IMAGE_ASPECT_COLOR_BIT);
1249 return VK_IMAGE_USAGE_FRAGMENT_DENSITY_MAP_BIT_EXT;
1250
1251 case VK_IMAGE_LAYOUT_RANGE_SIZE:
1252 case VK_IMAGE_LAYOUT_MAX_ENUM:
1253 unreachable("Invalid image layout.");
1254 }
1255
1256 unreachable("Invalid image layout.");
1257 }
1258
1259 static bool
1260 vk_image_layout_is_read_only(VkImageLayout layout,
1261 VkImageAspectFlagBits aspect)
1262 {
1263 assert(util_bitcount(aspect) == 1);
1264
1265 switch (layout) {
1266 case VK_IMAGE_LAYOUT_UNDEFINED:
1267 case VK_IMAGE_LAYOUT_PREINITIALIZED:
1268 return true; /* These are only used for layout transitions */
1269
1270 case VK_IMAGE_LAYOUT_GENERAL:
1271 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
1272 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
1273 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
1274 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:
1275 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL:
1276 case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL:
1277 return false;
1278
1279 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
1280 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
1281 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
1282 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR:
1283 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV:
1284 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT:
1285 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL:
1286 case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL:
1287 return true;
1288
1289 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL:
1290 return aspect == VK_IMAGE_ASPECT_DEPTH_BIT;
1291
1292 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL:
1293 return aspect == VK_IMAGE_ASPECT_STENCIL_BIT;
1294
1295 case VK_IMAGE_LAYOUT_RANGE_SIZE:
1296 case VK_IMAGE_LAYOUT_MAX_ENUM:
1297 unreachable("Invalid image layout.");
1298 }
1299
1300 unreachable("Invalid image layout.");
1301 }
1302
1303 /**
1304 * This function returns the assumed isl_aux_state for a given VkImageLayout.
1305 * Because Vulkan image layouts don't map directly to isl_aux_state enums, the
1306 * returned enum is the assumed worst case.
1307 *
1308 * @param devinfo The device information of the Intel GPU.
1309 * @param image The image that may contain a collection of buffers.
1310 * @param aspect The aspect of the image to be accessed.
1311 * @param layout The current layout of the image aspect(s).
1312 *
1313 * @return The primary buffer that should be used for the given layout.
1314 */
1315 enum isl_aux_state
1316 anv_layout_to_aux_state(const struct gen_device_info * const devinfo,
1317 const struct anv_image * const image,
1318 const VkImageAspectFlagBits aspect,
1319 const VkImageLayout layout)
1320 {
1321 /* Validate the inputs. */
1322
1323 /* The devinfo is needed as the optimal buffer varies across generations. */
1324 assert(devinfo != NULL);
1325
1326 /* The layout of a NULL image is not properly defined. */
1327 assert(image != NULL);
1328
1329 /* The aspect must be exactly one of the image aspects. */
1330 assert(util_bitcount(aspect) == 1 && (aspect & image->aspects));
1331
1332 /* Determine the optimal buffer. */
1333
1334 uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
1335
1336 /* If we don't have an aux buffer then aux state makes no sense */
1337 const enum isl_aux_usage aux_usage = image->planes[plane].aux_usage;
1338 assert(aux_usage != ISL_AUX_USAGE_NONE);
1339
1340 /* All images that use an auxiliary surface are required to be tiled. */
1341 assert(image->planes[plane].surface.isl.tiling != ISL_TILING_LINEAR);
1342
1343 /* Stencil has no aux */
1344 assert(aspect != VK_IMAGE_ASPECT_STENCIL_BIT);
1345
1346 /* Handle a few special cases */
1347 switch (layout) {
1348 /* Invalid layouts */
1349 case VK_IMAGE_LAYOUT_RANGE_SIZE:
1350 case VK_IMAGE_LAYOUT_MAX_ENUM:
1351 unreachable("Invalid image layout.");
1352
1353 /* Undefined layouts
1354 *
1355 * The pre-initialized layout is equivalent to the undefined layout for
1356 * optimally-tiled images. We can only do color compression (CCS or HiZ)
1357 * on tiled images.
1358 */
1359 case VK_IMAGE_LAYOUT_UNDEFINED:
1360 case VK_IMAGE_LAYOUT_PREINITIALIZED:
1361 return ISL_AUX_STATE_AUX_INVALID;
1362
1363 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR: {
1364 assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
1365
1366 enum isl_aux_state aux_state =
1367 isl_drm_modifier_get_default_aux_state(image->drm_format_mod);
1368
1369 switch (aux_state) {
1370 default:
1371 assert(!"unexpected isl_aux_state");
1372 case ISL_AUX_STATE_AUX_INVALID:
1373 /* The modifier does not support compression. But, if we arrived
1374 * here, then we have enabled compression on it anyway, in which case
1375 * we must resolve the aux surface before we release ownership to the
1376 * presentation engine (because, having no modifier, the presentation
1377 * engine will not be aware of the aux surface). The presentation
1378 * engine will not access the aux surface (because it is unware of
1379 * it), and so the aux surface will still be resolved when we
1380 * re-acquire ownership.
1381 *
1382 * Therefore, at ownership transfers in either direction, there does
1383 * exist an aux surface despite the lack of modifier and its state is
1384 * pass-through.
1385 */
1386 return ISL_AUX_STATE_PASS_THROUGH;
1387 case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
1388 return ISL_AUX_STATE_COMPRESSED_NO_CLEAR;
1389 }
1390 }
1391
1392 default:
1393 break;
1394 }
1395
1396 const bool read_only = vk_image_layout_is_read_only(layout, aspect);
1397
1398 const VkImageUsageFlags image_aspect_usage =
1399 aspect == VK_IMAGE_ASPECT_STENCIL_BIT ? image->stencil_usage :
1400 image->usage;
1401 const VkImageUsageFlags usage =
1402 vk_image_layout_to_usage_flags(layout, aspect) & image_aspect_usage;
1403
1404 bool aux_supported = true;
1405
1406 if ((usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT) && !read_only) {
1407 /* This image could be used as both an input attachment and a render
1408 * target (depth, stencil, or color) at the same time and this can cause
1409 * corruption.
1410 *
1411 * We currently only disable aux in this way for depth even though we
1412 * disable it for color in GL.
1413 *
1414 * TODO: Should we be disabling this in more cases?
1415 */
1416 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT)
1417 aux_supported = false;
1418 }
1419
1420 if (usage & VK_IMAGE_USAGE_STORAGE_BIT)
1421 aux_supported = false;
1422
1423 if (usage & (VK_IMAGE_USAGE_TRANSFER_SRC_BIT |
1424 VK_IMAGE_USAGE_SAMPLED_BIT |
1425 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)) {
1426 switch (aux_usage) {
1427 case ISL_AUX_USAGE_HIZ:
1428 if (!anv_can_sample_with_hiz(devinfo, image))
1429 aux_supported = false;
1430 break;
1431
1432 case ISL_AUX_USAGE_HIZ_CCS:
1433 aux_supported = false;
1434 break;
1435
1436 case ISL_AUX_USAGE_HIZ_CCS_WT:
1437 break;
1438
1439 case ISL_AUX_USAGE_CCS_D:
1440 aux_supported = false;
1441 break;
1442
1443 case ISL_AUX_USAGE_CCS_E:
1444 case ISL_AUX_USAGE_MCS:
1445 break;
1446
1447 default:
1448 unreachable("Unsupported aux usage");
1449 }
1450 }
1451
1452 switch (aux_usage) {
1453 case ISL_AUX_USAGE_HIZ:
1454 case ISL_AUX_USAGE_HIZ_CCS:
1455 case ISL_AUX_USAGE_HIZ_CCS_WT:
1456 if (aux_supported) {
1457 return ISL_AUX_STATE_COMPRESSED_CLEAR;
1458 } else if (read_only) {
1459 return ISL_AUX_STATE_RESOLVED;
1460 } else {
1461 return ISL_AUX_STATE_AUX_INVALID;
1462 }
1463
1464 case ISL_AUX_USAGE_CCS_D:
1465 /* We only support clear in exactly one state */
1466 if (layout == VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL) {
1467 assert(aux_supported);
1468 return ISL_AUX_STATE_PARTIAL_CLEAR;
1469 } else {
1470 return ISL_AUX_STATE_PASS_THROUGH;
1471 }
1472
1473 case ISL_AUX_USAGE_CCS_E:
1474 case ISL_AUX_USAGE_MCS:
1475 if (aux_supported) {
1476 return ISL_AUX_STATE_COMPRESSED_CLEAR;
1477 } else {
1478 return ISL_AUX_STATE_PASS_THROUGH;
1479 }
1480
1481 default:
1482 unreachable("Unsupported aux usage");
1483 }
1484 }
1485
1486 /**
1487 * This function determines the optimal buffer to use for a given
1488 * VkImageLayout and other pieces of information needed to make that
1489 * determination. This does not determine the optimal buffer to use
1490 * during a resolve operation.
1491 *
1492 * @param devinfo The device information of the Intel GPU.
1493 * @param image The image that may contain a collection of buffers.
1494 * @param aspect The aspect of the image to be accessed.
1495 * @param usage The usage which describes how the image will be accessed.
1496 * @param layout The current layout of the image aspect(s).
1497 *
1498 * @return The primary buffer that should be used for the given layout.
1499 */
1500 enum isl_aux_usage
1501 anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
1502 const struct anv_image * const image,
1503 const VkImageAspectFlagBits aspect,
1504 const VkImageUsageFlagBits usage,
1505 const VkImageLayout layout)
1506 {
1507 uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
1508
1509 /* If there is no auxiliary surface allocated, we must use the one and only
1510 * main buffer.
1511 */
1512 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_NONE)
1513 return ISL_AUX_USAGE_NONE;
1514
1515 enum isl_aux_state aux_state =
1516 anv_layout_to_aux_state(devinfo, image, aspect, layout);
1517
1518 switch (aux_state) {
1519 case ISL_AUX_STATE_CLEAR:
1520 unreachable("We never use this state");
1521
1522 case ISL_AUX_STATE_PARTIAL_CLEAR:
1523 assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
1524 assert(image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D);
1525 assert(image->samples == 1);
1526 return ISL_AUX_USAGE_CCS_D;
1527
1528 case ISL_AUX_STATE_COMPRESSED_CLEAR:
1529 case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
1530 return image->planes[plane].aux_usage;
1531
1532 case ISL_AUX_STATE_RESOLVED:
1533 /* We can only use RESOLVED in read-only layouts because any write will
1534 * either land us in AUX_INVALID or COMPRESSED_NO_CLEAR. We can do
1535 * writes in PASS_THROUGH without destroying it so that is allowed.
1536 */
1537 assert(vk_image_layout_is_read_only(layout, aspect));
1538 assert(util_is_power_of_two_or_zero(usage));
1539 if (usage == VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT) {
1540 /* If we have valid HiZ data and are using the image as a read-only
1541 * depth/stencil attachment, we should enable HiZ so that we can get
1542 * faster depth testing.
1543 */
1544 return image->planes[plane].aux_usage;
1545 } else {
1546 return ISL_AUX_USAGE_NONE;
1547 }
1548
1549 case ISL_AUX_STATE_PASS_THROUGH:
1550 case ISL_AUX_STATE_AUX_INVALID:
1551 return ISL_AUX_USAGE_NONE;
1552 }
1553
1554 unreachable("Invalid isl_aux_state");
1555 }
1556
1557 /**
1558 * This function returns the level of unresolved fast-clear support of the
1559 * given image in the given VkImageLayout.
1560 *
1561 * @param devinfo The device information of the Intel GPU.
1562 * @param image The image that may contain a collection of buffers.
1563 * @param aspect The aspect of the image to be accessed.
1564 * @param usage The usage which describes how the image will be accessed.
1565 * @param layout The current layout of the image aspect(s).
1566 */
1567 enum anv_fast_clear_type
1568 anv_layout_to_fast_clear_type(const struct gen_device_info * const devinfo,
1569 const struct anv_image * const image,
1570 const VkImageAspectFlagBits aspect,
1571 const VkImageLayout layout)
1572 {
1573 if (INTEL_DEBUG & DEBUG_NO_FAST_CLEAR)
1574 return ANV_FAST_CLEAR_NONE;
1575
1576 uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
1577
1578 /* If there is no auxiliary surface allocated, there are no fast-clears */
1579 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_NONE)
1580 return ANV_FAST_CLEAR_NONE;
1581
1582 /* We don't support MSAA fast-clears on Ivybridge or Bay Trail because they
1583 * lack the MI ALU which we need to determine the predicates.
1584 */
1585 if (devinfo->gen == 7 && !devinfo->is_haswell && image->samples > 1)
1586 return ANV_FAST_CLEAR_NONE;
1587
1588 enum isl_aux_state aux_state =
1589 anv_layout_to_aux_state(devinfo, image, aspect, layout);
1590
1591 switch (aux_state) {
1592 case ISL_AUX_STATE_CLEAR:
1593 unreachable("We never use this state");
1594
1595 case ISL_AUX_STATE_PARTIAL_CLEAR:
1596 case ISL_AUX_STATE_COMPRESSED_CLEAR:
1597 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
1598 return ANV_FAST_CLEAR_DEFAULT_VALUE;
1599 } else if (layout == VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL) {
1600 /* When we're in a render pass we have the clear color data from the
1601 * VkRenderPassBeginInfo and we can use arbitrary clear colors. They
1602 * must get partially resolved before we leave the render pass.
1603 */
1604 return ANV_FAST_CLEAR_ANY;
1605 } else if (image->planes[plane].aux_usage == ISL_AUX_USAGE_MCS ||
1606 image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
1607 if (devinfo->gen >= 11) {
1608 /* On ICL and later, the sampler hardware uses a copy of the clear
1609 * value that is encoded as a pixel value. Therefore, we can use
1610 * any clear color we like for sampling.
1611 */
1612 return ANV_FAST_CLEAR_ANY;
1613 } else {
1614 /* If the image has MCS or CCS_E enabled all the time then we can
1615 * use fast-clear as long as the clear color is the default value
1616 * of zero since this is the default value we program into every
1617 * surface state used for texturing.
1618 */
1619 return ANV_FAST_CLEAR_DEFAULT_VALUE;
1620 }
1621 } else {
1622 return ANV_FAST_CLEAR_NONE;
1623 }
1624
1625 case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
1626 case ISL_AUX_STATE_RESOLVED:
1627 case ISL_AUX_STATE_PASS_THROUGH:
1628 case ISL_AUX_STATE_AUX_INVALID:
1629 return ANV_FAST_CLEAR_NONE;
1630 }
1631
1632 unreachable("Invalid isl_aux_state");
1633 }
1634
1635
1636 static struct anv_state
1637 alloc_surface_state(struct anv_device *device)
1638 {
1639 return anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
1640 }
1641
1642 static enum isl_channel_select
1643 remap_swizzle(VkComponentSwizzle swizzle, VkComponentSwizzle component,
1644 struct isl_swizzle format_swizzle)
1645 {
1646 if (swizzle == VK_COMPONENT_SWIZZLE_IDENTITY)
1647 swizzle = component;
1648
1649 switch (swizzle) {
1650 case VK_COMPONENT_SWIZZLE_ZERO: return ISL_CHANNEL_SELECT_ZERO;
1651 case VK_COMPONENT_SWIZZLE_ONE: return ISL_CHANNEL_SELECT_ONE;
1652 case VK_COMPONENT_SWIZZLE_R: return format_swizzle.r;
1653 case VK_COMPONENT_SWIZZLE_G: return format_swizzle.g;
1654 case VK_COMPONENT_SWIZZLE_B: return format_swizzle.b;
1655 case VK_COMPONENT_SWIZZLE_A: return format_swizzle.a;
1656 default:
1657 unreachable("Invalid swizzle");
1658 }
1659 }
1660
1661 void
1662 anv_image_fill_surface_state(struct anv_device *device,
1663 const struct anv_image *image,
1664 VkImageAspectFlagBits aspect,
1665 const struct isl_view *view_in,
1666 isl_surf_usage_flags_t view_usage,
1667 enum isl_aux_usage aux_usage,
1668 const union isl_color_value *clear_color,
1669 enum anv_image_view_state_flags flags,
1670 struct anv_surface_state *state_inout,
1671 struct brw_image_param *image_param_out)
1672 {
1673 uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
1674
1675 const struct anv_surface *surface = &image->planes[plane].surface,
1676 *aux_surface = &image->planes[plane].aux_surface;
1677
1678 struct isl_view view = *view_in;
1679 view.usage |= view_usage;
1680
1681 /* For texturing with VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL from a
1682 * compressed surface with a shadow surface, we use the shadow instead of
1683 * the primary surface. The shadow surface will be tiled, unlike the main
1684 * surface, so it should get significantly better performance.
1685 */
1686 if (image->planes[plane].shadow_surface.isl.size_B > 0 &&
1687 isl_format_is_compressed(view.format) &&
1688 (flags & ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL)) {
1689 assert(isl_format_is_compressed(surface->isl.format));
1690 assert(surface->isl.tiling == ISL_TILING_LINEAR);
1691 assert(image->planes[plane].shadow_surface.isl.tiling != ISL_TILING_LINEAR);
1692 surface = &image->planes[plane].shadow_surface;
1693 }
1694
1695 /* For texturing from stencil on gen7, we have to sample from a shadow
1696 * surface because we don't support W-tiling in the sampler.
1697 */
1698 if (image->planes[plane].shadow_surface.isl.size_B > 0 &&
1699 aspect == VK_IMAGE_ASPECT_STENCIL_BIT) {
1700 assert(device->info.gen == 7);
1701 assert(view_usage & ISL_SURF_USAGE_TEXTURE_BIT);
1702 surface = &image->planes[plane].shadow_surface;
1703 }
1704
1705 if (view_usage == ISL_SURF_USAGE_RENDER_TARGET_BIT)
1706 view.swizzle = anv_swizzle_for_render(view.swizzle);
1707
1708 /* On Ivy Bridge and Bay Trail we do the swizzle in the shader */
1709 if (device->info.gen == 7 && !device->info.is_haswell)
1710 view.swizzle = ISL_SWIZZLE_IDENTITY;
1711
1712 /* If this is a HiZ buffer we can sample from with a programmable clear
1713 * value (SKL+), define the clear value to the optimal constant.
1714 */
1715 union isl_color_value default_clear_color = { .u32 = { 0, } };
1716 if (device->info.gen >= 9 && aspect == VK_IMAGE_ASPECT_DEPTH_BIT)
1717 default_clear_color.f32[0] = ANV_HZ_FC_VAL;
1718 if (!clear_color)
1719 clear_color = &default_clear_color;
1720
1721 const struct anv_address address =
1722 anv_address_add(image->planes[plane].address, surface->offset);
1723
1724 if (view_usage == ISL_SURF_USAGE_STORAGE_BIT &&
1725 !(flags & ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY) &&
1726 !isl_has_matching_typed_storage_image_format(&device->info,
1727 view.format)) {
1728 /* In this case, we are a writeable storage buffer which needs to be
1729 * lowered to linear. All tiling and offset calculations will be done in
1730 * the shader.
1731 */
1732 assert(aux_usage == ISL_AUX_USAGE_NONE);
1733 isl_buffer_fill_state(&device->isl_dev, state_inout->state.map,
1734 .address = anv_address_physical(address),
1735 .size_B = surface->isl.size_B,
1736 .format = ISL_FORMAT_RAW,
1737 .swizzle = ISL_SWIZZLE_IDENTITY,
1738 .stride_B = 1,
1739 .mocs = anv_mocs_for_bo(device, address.bo));
1740 state_inout->address = address,
1741 state_inout->aux_address = ANV_NULL_ADDRESS;
1742 state_inout->clear_address = ANV_NULL_ADDRESS;
1743 } else {
1744 if (view_usage == ISL_SURF_USAGE_STORAGE_BIT &&
1745 !(flags & ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY)) {
1746 /* Typed surface reads support a very limited subset of the shader
1747 * image formats. Translate it into the closest format the hardware
1748 * supports.
1749 */
1750 assert(aux_usage == ISL_AUX_USAGE_NONE);
1751 view.format = isl_lower_storage_image_format(&device->info,
1752 view.format);
1753 }
1754
1755 const struct isl_surf *isl_surf = &surface->isl;
1756
1757 struct isl_surf tmp_surf;
1758 uint32_t offset_B = 0, tile_x_sa = 0, tile_y_sa = 0;
1759 if (isl_format_is_compressed(surface->isl.format) &&
1760 !isl_format_is_compressed(view.format)) {
1761 /* We're creating an uncompressed view of a compressed surface. This
1762 * is allowed but only for a single level/layer.
1763 */
1764 assert(surface->isl.samples == 1);
1765 assert(view.levels == 1);
1766 assert(view.array_len == 1);
1767
1768 isl_surf_get_image_surf(&device->isl_dev, isl_surf,
1769 view.base_level,
1770 surface->isl.dim == ISL_SURF_DIM_3D ?
1771 0 : view.base_array_layer,
1772 surface->isl.dim == ISL_SURF_DIM_3D ?
1773 view.base_array_layer : 0,
1774 &tmp_surf,
1775 &offset_B, &tile_x_sa, &tile_y_sa);
1776
1777 /* The newly created image represents the one subimage we're
1778 * referencing with this view so it only has one array slice and
1779 * miplevel.
1780 */
1781 view.base_array_layer = 0;
1782 view.base_level = 0;
1783
1784 /* We're making an uncompressed view here. The image dimensions need
1785 * to be scaled down by the block size.
1786 */
1787 const struct isl_format_layout *fmtl =
1788 isl_format_get_layout(surface->isl.format);
1789 tmp_surf.logical_level0_px =
1790 isl_surf_get_logical_level0_el(&tmp_surf);
1791 tmp_surf.phys_level0_sa = isl_surf_get_phys_level0_el(&tmp_surf);
1792 tmp_surf.format = view.format;
1793 tile_x_sa /= fmtl->bw;
1794 tile_y_sa /= fmtl->bh;
1795
1796 isl_surf = &tmp_surf;
1797
1798 if (device->info.gen <= 8) {
1799 assert(surface->isl.tiling == ISL_TILING_LINEAR);
1800 assert(tile_x_sa == 0);
1801 assert(tile_y_sa == 0);
1802 }
1803 }
1804
1805 state_inout->address = anv_address_add(address, offset_B);
1806
1807 struct anv_address aux_address = ANV_NULL_ADDRESS;
1808 if (aux_usage != ISL_AUX_USAGE_NONE) {
1809 aux_address = anv_address_add(image->planes[plane].address,
1810 aux_surface->offset);
1811 }
1812 state_inout->aux_address = aux_address;
1813
1814 struct anv_address clear_address = ANV_NULL_ADDRESS;
1815 if (device->info.gen >= 10 && aux_usage != ISL_AUX_USAGE_NONE) {
1816 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
1817 clear_address = (struct anv_address) {
1818 .bo = device->hiz_clear_bo,
1819 .offset = 0,
1820 };
1821 } else {
1822 clear_address = anv_image_get_clear_color_addr(device, image, aspect);
1823 }
1824 }
1825 state_inout->clear_address = clear_address;
1826
1827 isl_surf_fill_state(&device->isl_dev, state_inout->state.map,
1828 .surf = isl_surf,
1829 .view = &view,
1830 .address = anv_address_physical(state_inout->address),
1831 .clear_color = *clear_color,
1832 .aux_surf = &aux_surface->isl,
1833 .aux_usage = aux_usage,
1834 .aux_address = anv_address_physical(aux_address),
1835 .clear_address = anv_address_physical(clear_address),
1836 .use_clear_address = !anv_address_is_null(clear_address),
1837 .mocs = anv_mocs_for_bo(device,
1838 state_inout->address.bo),
1839 .x_offset_sa = tile_x_sa,
1840 .y_offset_sa = tile_y_sa);
1841
1842 /* With the exception of gen8, the bottom 12 bits of the MCS base address
1843 * are used to store other information. This should be ok, however,
1844 * because the surface buffer addresses are always 4K page aligned.
1845 */
1846 uint32_t *aux_addr_dw = state_inout->state.map +
1847 device->isl_dev.ss.aux_addr_offset;
1848 assert((aux_address.offset & 0xfff) == 0);
1849 state_inout->aux_address.offset |= *aux_addr_dw & 0xfff;
1850
1851 if (device->info.gen >= 10 && clear_address.bo) {
1852 uint32_t *clear_addr_dw = state_inout->state.map +
1853 device->isl_dev.ss.clear_color_state_offset;
1854 assert((clear_address.offset & 0x3f) == 0);
1855 state_inout->clear_address.offset |= *clear_addr_dw & 0x3f;
1856 }
1857 }
1858
1859 if (image_param_out) {
1860 assert(view_usage == ISL_SURF_USAGE_STORAGE_BIT);
1861 isl_surf_fill_image_param(&device->isl_dev, image_param_out,
1862 &surface->isl, &view);
1863 }
1864 }
1865
1866 static VkImageAspectFlags
1867 remap_aspect_flags(VkImageAspectFlags view_aspects)
1868 {
1869 if (view_aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) {
1870 if (util_bitcount(view_aspects) == 1)
1871 return VK_IMAGE_ASPECT_COLOR_BIT;
1872
1873 VkImageAspectFlags color_aspects = 0;
1874 for (uint32_t i = 0; i < util_bitcount(view_aspects); i++)
1875 color_aspects |= VK_IMAGE_ASPECT_PLANE_0_BIT << i;
1876 return color_aspects;
1877 }
1878 /* No special remapping needed for depth & stencil aspects. */
1879 return view_aspects;
1880 }
1881
1882 static uint32_t
1883 anv_image_aspect_get_planes(VkImageAspectFlags aspect_mask)
1884 {
1885 uint32_t planes = 0;
1886
1887 if (aspect_mask & (VK_IMAGE_ASPECT_COLOR_BIT |
1888 VK_IMAGE_ASPECT_DEPTH_BIT |
1889 VK_IMAGE_ASPECT_STENCIL_BIT |
1890 VK_IMAGE_ASPECT_PLANE_0_BIT))
1891 planes++;
1892 if (aspect_mask & VK_IMAGE_ASPECT_PLANE_1_BIT)
1893 planes++;
1894 if (aspect_mask & VK_IMAGE_ASPECT_PLANE_2_BIT)
1895 planes++;
1896
1897 if ((aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT) != 0 &&
1898 (aspect_mask & VK_IMAGE_ASPECT_STENCIL_BIT) != 0)
1899 planes++;
1900
1901 return planes;
1902 }
1903
1904 VkResult
1905 anv_CreateImageView(VkDevice _device,
1906 const VkImageViewCreateInfo *pCreateInfo,
1907 const VkAllocationCallbacks *pAllocator,
1908 VkImageView *pView)
1909 {
1910 ANV_FROM_HANDLE(anv_device, device, _device);
1911 ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
1912 struct anv_image_view *iview;
1913
1914 iview = vk_zalloc2(&device->vk.alloc, pAllocator, sizeof(*iview), 8,
1915 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1916 if (iview == NULL)
1917 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1918
1919 const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
1920
1921 assert(range->layerCount > 0);
1922 assert(range->baseMipLevel < image->levels);
1923
1924 /* Check if a conversion info was passed. */
1925 const struct anv_format *conv_format = NULL;
1926 const VkSamplerYcbcrConversionInfo *conv_info =
1927 vk_find_struct_const(pCreateInfo->pNext, SAMPLER_YCBCR_CONVERSION_INFO);
1928
1929 /* If image has an external format, the pNext chain must contain an instance of
1930 * VKSamplerYcbcrConversionInfo with a conversion object created with the same
1931 * external format as image."
1932 */
1933 assert(!image->external_format || conv_info);
1934
1935 if (conv_info) {
1936 ANV_FROM_HANDLE(anv_ycbcr_conversion, conversion, conv_info->conversion);
1937 conv_format = conversion->format;
1938 }
1939
1940 VkImageUsageFlags image_usage = image->usage;
1941 if (range->aspectMask & (VK_IMAGE_ASPECT_DEPTH_BIT |
1942 VK_IMAGE_ASPECT_STENCIL_BIT)) {
1943 assert(!(range->aspectMask & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV));
1944 /* From the Vulkan 1.2.131 spec:
1945 *
1946 * "If the image was has a depth-stencil format and was created with
1947 * a VkImageStencilUsageCreateInfo structure included in the pNext
1948 * chain of VkImageCreateInfo, the usage is calculated based on the
1949 * subresource.aspectMask provided:
1950 *
1951 * - If aspectMask includes only VK_IMAGE_ASPECT_STENCIL_BIT, the
1952 * implicit usage is equal to
1953 * VkImageStencilUsageCreateInfo::stencilUsage.
1954 *
1955 * - If aspectMask includes only VK_IMAGE_ASPECT_DEPTH_BIT, the
1956 * implicit usage is equal to VkImageCreateInfo::usage.
1957 *
1958 * - If both aspects are included in aspectMask, the implicit usage
1959 * is equal to the intersection of VkImageCreateInfo::usage and
1960 * VkImageStencilUsageCreateInfo::stencilUsage.
1961 */
1962 if (range->aspectMask == VK_IMAGE_ASPECT_STENCIL_BIT) {
1963 image_usage = image->stencil_usage;
1964 } else if (range->aspectMask == VK_IMAGE_ASPECT_DEPTH_BIT) {
1965 image_usage = image->usage;
1966 } else {
1967 assert(range->aspectMask == (VK_IMAGE_ASPECT_DEPTH_BIT |
1968 VK_IMAGE_ASPECT_STENCIL_BIT));
1969 image_usage = image->usage & image->stencil_usage;
1970 }
1971 }
1972
1973 const VkImageViewUsageCreateInfo *usage_info =
1974 vk_find_struct_const(pCreateInfo, IMAGE_VIEW_USAGE_CREATE_INFO);
1975 VkImageUsageFlags view_usage = usage_info ? usage_info->usage : image_usage;
1976
1977 /* View usage should be a subset of image usage */
1978 assert((view_usage & ~image_usage) == 0);
1979 assert(view_usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
1980 VK_IMAGE_USAGE_STORAGE_BIT |
1981 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT |
1982 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT |
1983 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT));
1984
1985 switch (image->type) {
1986 default:
1987 unreachable("bad VkImageType");
1988 case VK_IMAGE_TYPE_1D:
1989 case VK_IMAGE_TYPE_2D:
1990 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1 <= image->array_size);
1991 break;
1992 case VK_IMAGE_TYPE_3D:
1993 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1
1994 <= anv_minify(image->extent.depth, range->baseMipLevel));
1995 break;
1996 }
1997
1998 /* First expand aspects to the image's ones (for example
1999 * VK_IMAGE_ASPECT_COLOR_BIT will be converted to
2000 * VK_IMAGE_ASPECT_PLANE_0_BIT | VK_IMAGE_ASPECT_PLANE_1_BIT |
2001 * VK_IMAGE_ASPECT_PLANE_2_BIT for an image of format
2002 * VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM.
2003 */
2004 VkImageAspectFlags expanded_aspects =
2005 anv_image_expand_aspects(image, range->aspectMask);
2006
2007 iview->image = image;
2008
2009 /* Remap the expanded aspects for the image view. For example if only
2010 * VK_IMAGE_ASPECT_PLANE_1_BIT was given in range->aspectMask, we will
2011 * convert it to VK_IMAGE_ASPECT_COLOR_BIT since from the point of view of
2012 * the image view, it only has a single plane.
2013 */
2014 iview->aspect_mask = remap_aspect_flags(expanded_aspects);
2015 iview->n_planes = anv_image_aspect_get_planes(iview->aspect_mask);
2016 iview->vk_format = pCreateInfo->format;
2017
2018 /* "If image has an external format, format must be VK_FORMAT_UNDEFINED." */
2019 assert(!image->external_format || pCreateInfo->format == VK_FORMAT_UNDEFINED);
2020
2021 /* Format is undefined, this can happen when using external formats. Set
2022 * view format from the passed conversion info.
2023 */
2024 if (iview->vk_format == VK_FORMAT_UNDEFINED && conv_format)
2025 iview->vk_format = conv_format->vk_format;
2026
2027 iview->extent = (VkExtent3D) {
2028 .width = anv_minify(image->extent.width , range->baseMipLevel),
2029 .height = anv_minify(image->extent.height, range->baseMipLevel),
2030 .depth = anv_minify(image->extent.depth , range->baseMipLevel),
2031 };
2032
2033 /* Now go through the underlying image selected planes (computed in
2034 * expanded_aspects) and map them to planes in the image view.
2035 */
2036 uint32_t iaspect_bit, vplane = 0;
2037 anv_foreach_image_aspect_bit(iaspect_bit, image, expanded_aspects) {
2038 uint32_t iplane =
2039 anv_image_aspect_to_plane(image->aspects, 1UL << iaspect_bit);
2040 VkImageAspectFlags vplane_aspect =
2041 anv_plane_to_aspect(iview->aspect_mask, vplane);
2042 struct anv_format_plane format =
2043 anv_get_format_plane(&device->info, iview->vk_format,
2044 vplane_aspect, image->tiling);
2045
2046 iview->planes[vplane].image_plane = iplane;
2047
2048 iview->planes[vplane].isl = (struct isl_view) {
2049 .format = format.isl_format,
2050 .base_level = range->baseMipLevel,
2051 .levels = anv_get_levelCount(image, range),
2052 .base_array_layer = range->baseArrayLayer,
2053 .array_len = anv_get_layerCount(image, range),
2054 .swizzle = {
2055 .r = remap_swizzle(pCreateInfo->components.r,
2056 VK_COMPONENT_SWIZZLE_R, format.swizzle),
2057 .g = remap_swizzle(pCreateInfo->components.g,
2058 VK_COMPONENT_SWIZZLE_G, format.swizzle),
2059 .b = remap_swizzle(pCreateInfo->components.b,
2060 VK_COMPONENT_SWIZZLE_B, format.swizzle),
2061 .a = remap_swizzle(pCreateInfo->components.a,
2062 VK_COMPONENT_SWIZZLE_A, format.swizzle),
2063 },
2064 };
2065
2066 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
2067 iview->planes[vplane].isl.base_array_layer = 0;
2068 iview->planes[vplane].isl.array_len = iview->extent.depth;
2069 }
2070
2071 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
2072 pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
2073 iview->planes[vplane].isl.usage = ISL_SURF_USAGE_CUBE_BIT;
2074 } else {
2075 iview->planes[vplane].isl.usage = 0;
2076 }
2077
2078 if (view_usage & VK_IMAGE_USAGE_SAMPLED_BIT ||
2079 (view_usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT &&
2080 !(iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT))) {
2081 iview->planes[vplane].optimal_sampler_surface_state.state = alloc_surface_state(device);
2082 iview->planes[vplane].general_sampler_surface_state.state = alloc_surface_state(device);
2083
2084 enum isl_aux_usage general_aux_usage =
2085 anv_layout_to_aux_usage(&device->info, image, 1UL << iaspect_bit,
2086 VK_IMAGE_USAGE_SAMPLED_BIT,
2087 VK_IMAGE_LAYOUT_GENERAL);
2088 enum isl_aux_usage optimal_aux_usage =
2089 anv_layout_to_aux_usage(&device->info, image, 1UL << iaspect_bit,
2090 VK_IMAGE_USAGE_SAMPLED_BIT,
2091 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL);
2092
2093 anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
2094 &iview->planes[vplane].isl,
2095 ISL_SURF_USAGE_TEXTURE_BIT,
2096 optimal_aux_usage, NULL,
2097 ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL,
2098 &iview->planes[vplane].optimal_sampler_surface_state,
2099 NULL);
2100
2101 anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
2102 &iview->planes[vplane].isl,
2103 ISL_SURF_USAGE_TEXTURE_BIT,
2104 general_aux_usage, NULL,
2105 0,
2106 &iview->planes[vplane].general_sampler_surface_state,
2107 NULL);
2108 }
2109
2110 /* NOTE: This one needs to go last since it may stomp isl_view.format */
2111 if (view_usage & VK_IMAGE_USAGE_STORAGE_BIT) {
2112 iview->planes[vplane].storage_surface_state.state = alloc_surface_state(device);
2113 iview->planes[vplane].writeonly_storage_surface_state.state = alloc_surface_state(device);
2114
2115 anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
2116 &iview->planes[vplane].isl,
2117 ISL_SURF_USAGE_STORAGE_BIT,
2118 ISL_AUX_USAGE_NONE, NULL,
2119 0,
2120 &iview->planes[vplane].storage_surface_state,
2121 &iview->planes[vplane].storage_image_param);
2122
2123 anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
2124 &iview->planes[vplane].isl,
2125 ISL_SURF_USAGE_STORAGE_BIT,
2126 ISL_AUX_USAGE_NONE, NULL,
2127 ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY,
2128 &iview->planes[vplane].writeonly_storage_surface_state,
2129 NULL);
2130 }
2131
2132 vplane++;
2133 }
2134
2135 *pView = anv_image_view_to_handle(iview);
2136
2137 return VK_SUCCESS;
2138 }
2139
2140 void
2141 anv_DestroyImageView(VkDevice _device, VkImageView _iview,
2142 const VkAllocationCallbacks *pAllocator)
2143 {
2144 ANV_FROM_HANDLE(anv_device, device, _device);
2145 ANV_FROM_HANDLE(anv_image_view, iview, _iview);
2146
2147 if (!iview)
2148 return;
2149
2150 for (uint32_t plane = 0; plane < iview->n_planes; plane++) {
2151 if (iview->planes[plane].optimal_sampler_surface_state.state.alloc_size > 0) {
2152 anv_state_pool_free(&device->surface_state_pool,
2153 iview->planes[plane].optimal_sampler_surface_state.state);
2154 }
2155
2156 if (iview->planes[plane].general_sampler_surface_state.state.alloc_size > 0) {
2157 anv_state_pool_free(&device->surface_state_pool,
2158 iview->planes[plane].general_sampler_surface_state.state);
2159 }
2160
2161 if (iview->planes[plane].storage_surface_state.state.alloc_size > 0) {
2162 anv_state_pool_free(&device->surface_state_pool,
2163 iview->planes[plane].storage_surface_state.state);
2164 }
2165
2166 if (iview->planes[plane].writeonly_storage_surface_state.state.alloc_size > 0) {
2167 anv_state_pool_free(&device->surface_state_pool,
2168 iview->planes[plane].writeonly_storage_surface_state.state);
2169 }
2170 }
2171
2172 vk_free2(&device->vk.alloc, pAllocator, iview);
2173 }
2174
2175
2176 VkResult
2177 anv_CreateBufferView(VkDevice _device,
2178 const VkBufferViewCreateInfo *pCreateInfo,
2179 const VkAllocationCallbacks *pAllocator,
2180 VkBufferView *pView)
2181 {
2182 ANV_FROM_HANDLE(anv_device, device, _device);
2183 ANV_FROM_HANDLE(anv_buffer, buffer, pCreateInfo->buffer);
2184 struct anv_buffer_view *view;
2185
2186 view = vk_alloc2(&device->vk.alloc, pAllocator, sizeof(*view), 8,
2187 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
2188 if (!view)
2189 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2190
2191 /* TODO: Handle the format swizzle? */
2192
2193 view->format = anv_get_isl_format(&device->info, pCreateInfo->format,
2194 VK_IMAGE_ASPECT_COLOR_BIT,
2195 VK_IMAGE_TILING_LINEAR);
2196 const uint32_t format_bs = isl_format_get_layout(view->format)->bpb / 8;
2197 view->range = anv_buffer_get_range(buffer, pCreateInfo->offset,
2198 pCreateInfo->range);
2199 view->range = align_down_npot_u32(view->range, format_bs);
2200
2201 view->address = anv_address_add(buffer->address, pCreateInfo->offset);
2202
2203 if (buffer->usage & VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT) {
2204 view->surface_state = alloc_surface_state(device);
2205
2206 anv_fill_buffer_surface_state(device, view->surface_state,
2207 view->format,
2208 view->address, view->range, format_bs);
2209 } else {
2210 view->surface_state = (struct anv_state){ 0 };
2211 }
2212
2213 if (buffer->usage & VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT) {
2214 view->storage_surface_state = alloc_surface_state(device);
2215 view->writeonly_storage_surface_state = alloc_surface_state(device);
2216
2217 enum isl_format storage_format =
2218 isl_has_matching_typed_storage_image_format(&device->info,
2219 view->format) ?
2220 isl_lower_storage_image_format(&device->info, view->format) :
2221 ISL_FORMAT_RAW;
2222
2223 anv_fill_buffer_surface_state(device, view->storage_surface_state,
2224 storage_format,
2225 view->address, view->range,
2226 (storage_format == ISL_FORMAT_RAW ? 1 :
2227 isl_format_get_layout(storage_format)->bpb / 8));
2228
2229 /* Write-only accesses should use the original format. */
2230 anv_fill_buffer_surface_state(device, view->writeonly_storage_surface_state,
2231 view->format,
2232 view->address, view->range,
2233 isl_format_get_layout(view->format)->bpb / 8);
2234
2235 isl_buffer_fill_image_param(&device->isl_dev,
2236 &view->storage_image_param,
2237 view->format, view->range);
2238 } else {
2239 view->storage_surface_state = (struct anv_state){ 0 };
2240 view->writeonly_storage_surface_state = (struct anv_state){ 0 };
2241 }
2242
2243 *pView = anv_buffer_view_to_handle(view);
2244
2245 return VK_SUCCESS;
2246 }
2247
2248 void
2249 anv_DestroyBufferView(VkDevice _device, VkBufferView bufferView,
2250 const VkAllocationCallbacks *pAllocator)
2251 {
2252 ANV_FROM_HANDLE(anv_device, device, _device);
2253 ANV_FROM_HANDLE(anv_buffer_view, view, bufferView);
2254
2255 if (!view)
2256 return;
2257
2258 if (view->surface_state.alloc_size > 0)
2259 anv_state_pool_free(&device->surface_state_pool,
2260 view->surface_state);
2261
2262 if (view->storage_surface_state.alloc_size > 0)
2263 anv_state_pool_free(&device->surface_state_pool,
2264 view->storage_surface_state);
2265
2266 if (view->writeonly_storage_surface_state.alloc_size > 0)
2267 anv_state_pool_free(&device->surface_state_pool,
2268 view->writeonly_storage_surface_state);
2269
2270 vk_free2(&device->vk.alloc, pAllocator, view);
2271 }