src/intel/vulkan/anv_pipeline_cache.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "util/blob.h"
  25 #include "util/hash_table.h"
  26 #include "util/debug.h"
  27 #include "util/disk_cache.h"
  28 #include "util/mesa-sha1.h"
  29 #include "nir/nir_serialize.h"
  30 #include "anv_private.h"
  31 #include "nir/nir_xfb_info.h"
  32
  33 struct anv_shader_bin *
  34 anv_shader_bin_create(struct anv_device *device,
  35                       gl_shader_stage stage,
  36                       const void *key_data, uint32_t key_size,
  37                       const void *kernel_data, uint32_t kernel_size,
  38                       const void *constant_data, uint32_t constant_data_size,
  39                       const struct brw_stage_prog_data *prog_data_in,
  40                       uint32_t prog_data_size,
  41                       const struct brw_compile_stats *stats, uint32_t num_stats,
  42                       const nir_xfb_info *xfb_info_in,
  43                       const struct anv_pipeline_bind_map *bind_map)
  44 {
  45    struct anv_shader_bin *shader;
  46    struct anv_shader_bin_key *key;
  47    struct brw_stage_prog_data *prog_data;
  48    uint32_t *prog_data_param;
  49    nir_xfb_info *xfb_info;
  50    struct anv_pipeline_binding *surface_to_descriptor, *sampler_to_descriptor;
  51
  52    ANV_MULTIALLOC(ma);
  53    anv_multialloc_add(&ma, &shader, 1);
  54    anv_multialloc_add_size(&ma, &key, sizeof(*key) + key_size);
  55    anv_multialloc_add_size(&ma, &prog_data, prog_data_size);
  56    anv_multialloc_add(&ma, &prog_data_param, prog_data_in->nr_params);
  57    if (xfb_info_in) {
  58       uint32_t xfb_info_size = nir_xfb_info_size(xfb_info_in->output_count);
  59       anv_multialloc_add_size(&ma, &xfb_info, xfb_info_size);
  60    }
  61    anv_multialloc_add(&ma, &surface_to_descriptor,
  62                            bind_map->surface_count);
  63    anv_multialloc_add(&ma, &sampler_to_descriptor,
  64                            bind_map->sampler_count);
  65
  66    if (!anv_multialloc_alloc(&ma, &device->vk.alloc,
  67                              VK_SYSTEM_ALLOCATION_SCOPE_DEVICE))
  68       return NULL;
  69
  70    shader->ref_cnt = 1;
  71
  72    shader->stage = stage;
  73
  74    key->size = key_size;
  75    memcpy(key->data, key_data, key_size);
  76    shader->key = key;
  77
  78    shader->kernel =
  79       anv_state_pool_alloc(&device->instruction_state_pool, kernel_size, 64);
  80    memcpy(shader->kernel.map, kernel_data, kernel_size);
  81    shader->kernel_size = kernel_size;
  82
  83    if (constant_data_size) {
  84       shader->constant_data =
  85          anv_state_pool_alloc(&device->dynamic_state_pool,
  86                               constant_data_size, 32);
  87       memcpy(shader->constant_data.map, constant_data, constant_data_size);
  88    } else {
  89       shader->constant_data = ANV_STATE_NULL;
  90    }
  91    shader->constant_data_size = constant_data_size;
  92
  93    memcpy(prog_data, prog_data_in, prog_data_size);
  94    memset(prog_data_param, 0,
  95           prog_data->nr_params * sizeof(*prog_data_param));
  96    prog_data->param = prog_data_param;
  97    shader->prog_data = prog_data;
  98    shader->prog_data_size = prog_data_size;
  99
 100    assert(num_stats <= ARRAY_SIZE(shader->stats));
 101    typed_memcpy(shader->stats, stats, num_stats);
 102    shader->num_stats = num_stats;
 103
 104    if (xfb_info_in) {
 105       *xfb_info = *xfb_info_in;
 106       typed_memcpy(xfb_info->outputs, xfb_info_in->outputs,
 107                    xfb_info_in->output_count);
 108       shader->xfb_info = xfb_info;
 109    } else {
 110       shader->xfb_info = NULL;
 111    }
 112
 113    shader->bind_map = *bind_map;
 114    typed_memcpy(surface_to_descriptor, bind_map->surface_to_descriptor,
 115                 bind_map->surface_count);
 116    shader->bind_map.surface_to_descriptor = surface_to_descriptor;
 117    typed_memcpy(sampler_to_descriptor, bind_map->sampler_to_descriptor,
 118                 bind_map->sampler_count);
 119    shader->bind_map.sampler_to_descriptor = sampler_to_descriptor;
 120
 121    return shader;
 122 }
 123
 124 void
 125 anv_shader_bin_destroy(struct anv_device *device,
 126                        struct anv_shader_bin *shader)
 127 {
 128    assert(shader->ref_cnt == 0);
 129    anv_state_pool_free(&device->instruction_state_pool, shader->kernel);
 130    anv_state_pool_free(&device->dynamic_state_pool, shader->constant_data);
 131    vk_free(&device->vk.alloc, shader);
 132 }
 133
 134 static bool
 135 anv_shader_bin_write_to_blob(const struct anv_shader_bin *shader,
 136                              struct blob *blob)
 137 {
 138    blob_write_uint32(blob, shader->stage);
 139
 140    blob_write_uint32(blob, shader->key->size);
 141    blob_write_bytes(blob, shader->key->data, shader->key->size);
 142
 143    blob_write_uint32(blob, shader->kernel_size);
 144    blob_write_bytes(blob, shader->kernel.map, shader->kernel_size);
 145
 146    blob_write_uint32(blob, shader->constant_data_size);
 147    blob_write_bytes(blob, shader->constant_data.map,
 148                     shader->constant_data_size);
 149
 150    blob_write_uint32(blob, shader->prog_data_size);
 151    blob_write_bytes(blob, shader->prog_data, shader->prog_data_size);
 152
 153    blob_write_uint32(blob, shader->num_stats);
 154    blob_write_bytes(blob, shader->stats,
 155                     shader->num_stats * sizeof(shader->stats[0]));
 156
 157    if (shader->xfb_info) {
 158       uint32_t xfb_info_size =
 159          nir_xfb_info_size(shader->xfb_info->output_count);
 160       blob_write_uint32(blob, xfb_info_size);
 161       blob_write_bytes(blob, shader->xfb_info, xfb_info_size);
 162    } else {
 163       blob_write_uint32(blob, 0);
 164    }
 165
 166    blob_write_bytes(blob, shader->bind_map.surface_sha1,
 167                     sizeof(shader->bind_map.surface_sha1));
 168    blob_write_bytes(blob, shader->bind_map.sampler_sha1,
 169                     sizeof(shader->bind_map.sampler_sha1));
 170    blob_write_bytes(blob, shader->bind_map.push_sha1,
 171                     sizeof(shader->bind_map.push_sha1));
 172    blob_write_uint32(blob, shader->bind_map.surface_count);
 173    blob_write_uint32(blob, shader->bind_map.sampler_count);
 174    blob_write_bytes(blob, shader->bind_map.surface_to_descriptor,
 175                     shader->bind_map.surface_count *
 176                     sizeof(*shader->bind_map.surface_to_descriptor));
 177    blob_write_bytes(blob, shader->bind_map.sampler_to_descriptor,
 178                     shader->bind_map.sampler_count *
 179                     sizeof(*shader->bind_map.sampler_to_descriptor));
 180    blob_write_bytes(blob, shader->bind_map.push_ranges,
 181                     sizeof(shader->bind_map.push_ranges));
 182
 183    return !blob->out_of_memory;
 184 }
 185
 186 static struct anv_shader_bin *
 187 anv_shader_bin_create_from_blob(struct anv_device *device,
 188                                 struct blob_reader *blob)
 189 {
 190    gl_shader_stage stage = blob_read_uint32(blob);
 191
 192    uint32_t key_size = blob_read_uint32(blob);
 193    const void *key_data = blob_read_bytes(blob, key_size);
 194
 195    uint32_t kernel_size = blob_read_uint32(blob);
 196    const void *kernel_data = blob_read_bytes(blob, kernel_size);
 197
 198    uint32_t constant_data_size = blob_read_uint32(blob);
 199    const void *constant_data = blob_read_bytes(blob, constant_data_size);
 200
 201    uint32_t prog_data_size = blob_read_uint32(blob);
 202    const struct brw_stage_prog_data *prog_data =
 203       blob_read_bytes(blob, prog_data_size);
 204    if (blob->overrun)
 205       return NULL;
 206
 207    uint32_t num_stats = blob_read_uint32(blob);
 208    const struct brw_compile_stats *stats =
 209       blob_read_bytes(blob, num_stats * sizeof(stats[0]));
 210
 211    const nir_xfb_info *xfb_info = NULL;
 212    uint32_t xfb_size = blob_read_uint32(blob);
 213    if (xfb_size)
 214       xfb_info = blob_read_bytes(blob, xfb_size);
 215
 216    struct anv_pipeline_bind_map bind_map;
 217    blob_copy_bytes(blob, bind_map.surface_sha1, sizeof(bind_map.surface_sha1));
 218    blob_copy_bytes(blob, bind_map.sampler_sha1, sizeof(bind_map.sampler_sha1));
 219    blob_copy_bytes(blob, bind_map.push_sha1, sizeof(bind_map.push_sha1));
 220    bind_map.surface_count = blob_read_uint32(blob);
 221    bind_map.sampler_count = blob_read_uint32(blob);
 222    bind_map.surface_to_descriptor = (void *)
 223       blob_read_bytes(blob, bind_map.surface_count *
 224                             sizeof(*bind_map.surface_to_descriptor));
 225    bind_map.sampler_to_descriptor = (void *)
 226       blob_read_bytes(blob, bind_map.sampler_count *
 227                             sizeof(*bind_map.sampler_to_descriptor));
 228    blob_copy_bytes(blob, bind_map.push_ranges, sizeof(bind_map.push_ranges));
 229
 230    if (blob->overrun)
 231       return NULL;
 232
 233    return anv_shader_bin_create(device, stage,
 234                                 key_data, key_size,
 235                                 kernel_data, kernel_size,
 236                                 constant_data, constant_data_size,
 237                                 prog_data, prog_data_size,
 238                                 stats, num_stats, xfb_info, &bind_map);
 239 }
 240
 241 /* Remaining work:
 242  *
 243  * - Compact binding table layout so it's tight and not dependent on
 244  *   descriptor set layout.
 245  *
 246  * - Review prog_data struct for size and cacheability: struct
 247  *   brw_stage_prog_data has binding_table which uses a lot of uint32_t for 8
 248  *   bit quantities etc; use bit fields for all bools, eg dual_src_blend.
 249  */
 250
 251 static uint32_t
 252 shader_bin_key_hash_func(const void *void_key)
 253 {
 254    const struct anv_shader_bin_key *key = void_key;
 255    return _mesa_hash_data(key->data, key->size);
 256 }
 257
 258 static bool
 259 shader_bin_key_compare_func(const void *void_a, const void *void_b)
 260 {
 261    const struct anv_shader_bin_key *a = void_a, *b = void_b;
 262    if (a->size != b->size)
 263       return false;
 264
 265    return memcmp(a->data, b->data, a->size) == 0;
 266 }
 267
 268 static uint32_t
 269 sha1_hash_func(const void *sha1)
 270 {
 271    return _mesa_hash_data(sha1, 20);
 272 }
 273
 274 static bool
 275 sha1_compare_func(const void *sha1_a, const void *sha1_b)
 276 {
 277    return memcmp(sha1_a, sha1_b, 20) == 0;
 278 }
 279
 280 void
 281 anv_pipeline_cache_init(struct anv_pipeline_cache *cache,
 282                         struct anv_device *device,
 283                         bool cache_enabled)
 284 {
 285    cache->device = device;
 286    pthread_mutex_init(&cache->mutex, NULL);
 287
 288    if (cache_enabled) {
 289       cache->cache = _mesa_hash_table_create(NULL, shader_bin_key_hash_func,
 290                                              shader_bin_key_compare_func);
 291       cache->nir_cache = _mesa_hash_table_create(NULL, sha1_hash_func,
 292                                                  sha1_compare_func);
 293    } else {
 294       cache->cache = NULL;
 295       cache->nir_cache = NULL;
 296    }
 297 }
 298
 299 void
 300 anv_pipeline_cache_finish(struct anv_pipeline_cache *cache)
 301 {
 302    pthread_mutex_destroy(&cache->mutex);
 303
 304    if (cache->cache) {
 305       /* This is a bit unfortunate.  In order to keep things from randomly
 306        * going away, the shader cache has to hold a reference to all shader
 307        * binaries it contains.  We unref them when we destroy the cache.
 308        */
 309       hash_table_foreach(cache->cache, entry)
 310          anv_shader_bin_unref(cache->device, entry->data);
 311
 312       _mesa_hash_table_destroy(cache->cache, NULL);
 313    }
 314
 315    if (cache->nir_cache) {
 316       hash_table_foreach(cache->nir_cache, entry)
 317          ralloc_free(entry->data);
 318
 319       _mesa_hash_table_destroy(cache->nir_cache, NULL);
 320    }
 321 }
 322
 323 static struct anv_shader_bin *
 324 anv_pipeline_cache_search_locked(struct anv_pipeline_cache *cache,
 325                                  const void *key_data, uint32_t key_size)
 326 {
 327    uint32_t vla[1 + DIV_ROUND_UP(key_size, sizeof(uint32_t))];
 328    struct anv_shader_bin_key *key = (void *)vla;
 329    key->size = key_size;
 330    memcpy(key->data, key_data, key_size);
 331
 332    struct hash_entry *entry = _mesa_hash_table_search(cache->cache, key);
 333    if (entry)
 334       return entry->data;
 335    else
 336       return NULL;
 337 }
 338
 339 struct anv_shader_bin *
 340 anv_pipeline_cache_search(struct anv_pipeline_cache *cache,
 341                           const void *key_data, uint32_t key_size)
 342 {
 343    if (!cache->cache)
 344       return NULL;
 345
 346    pthread_mutex_lock(&cache->mutex);
 347
 348    struct anv_shader_bin *shader =
 349       anv_pipeline_cache_search_locked(cache, key_data, key_size);
 350
 351    pthread_mutex_unlock(&cache->mutex);
 352
 353    /* We increment refcount before handing it to the caller */
 354    if (shader)
 355       anv_shader_bin_ref(shader);
 356
 357    return shader;
 358 }
 359
 360 static void
 361 anv_pipeline_cache_add_shader_bin(struct anv_pipeline_cache *cache,
 362                                   struct anv_shader_bin *bin)
 363 {
 364    if (!cache->cache)
 365       return;
 366
 367    pthread_mutex_lock(&cache->mutex);
 368
 369    struct hash_entry *entry = _mesa_hash_table_search(cache->cache, bin->key);
 370    if (entry == NULL) {
 371       /* Take a reference for the cache */
 372       anv_shader_bin_ref(bin);
 373       _mesa_hash_table_insert(cache->cache, bin->key, bin);
 374    }
 375
 376    pthread_mutex_unlock(&cache->mutex);
 377 }
 378
 379 static struct anv_shader_bin *
 380 anv_pipeline_cache_add_shader_locked(struct anv_pipeline_cache *cache,
 381                                      gl_shader_stage stage,
 382                                      const void *key_data, uint32_t key_size,
 383                                      const void *kernel_data,
 384                                      uint32_t kernel_size,
 385                                      const void *constant_data,
 386                                      uint32_t constant_data_size,
 387                                      const struct brw_stage_prog_data *prog_data,
 388                                      uint32_t prog_data_size,
 389                                      const struct brw_compile_stats *stats,
 390                                      uint32_t num_stats,
 391                                      const nir_xfb_info *xfb_info,
 392                                      const struct anv_pipeline_bind_map *bind_map)
 393 {
 394    struct anv_shader_bin *shader =
 395       anv_pipeline_cache_search_locked(cache, key_data, key_size);
 396    if (shader)
 397       return shader;
 398
 399    struct anv_shader_bin *bin =
 400       anv_shader_bin_create(cache->device, stage,
 401                             key_data, key_size,
 402                             kernel_data, kernel_size,
 403                             constant_data, constant_data_size,
 404                             prog_data, prog_data_size,
 405                             stats, num_stats, xfb_info, bind_map);
 406    if (!bin)
 407       return NULL;
 408
 409    _mesa_hash_table_insert(cache->cache, bin->key, bin);
 410
 411    return bin;
 412 }
 413
 414 struct anv_shader_bin *
 415 anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache,
 416                                  gl_shader_stage stage,
 417                                  const void *key_data, uint32_t key_size,
 418                                  const void *kernel_data, uint32_t kernel_size,
 419                                  const void *constant_data,
 420                                  uint32_t constant_data_size,
 421                                  const struct brw_stage_prog_data *prog_data,
 422                                  uint32_t prog_data_size,
 423                                  const struct brw_compile_stats *stats,
 424                                  uint32_t num_stats,
 425                                  const nir_xfb_info *xfb_info,
 426                                  const struct anv_pipeline_bind_map *bind_map)
 427 {
 428    if (cache->cache) {
 429       pthread_mutex_lock(&cache->mutex);
 430
 431       struct anv_shader_bin *bin =
 432          anv_pipeline_cache_add_shader_locked(cache, stage, key_data, key_size,
 433                                               kernel_data, kernel_size,
 434                                               constant_data, constant_data_size,
 435                                               prog_data, prog_data_size,
 436                                               stats, num_stats,
 437                                               xfb_info, bind_map);
 438
 439       pthread_mutex_unlock(&cache->mutex);
 440
 441       /* We increment refcount before handing it to the caller */
 442       if (bin)
 443          anv_shader_bin_ref(bin);
 444
 445       return bin;
 446    } else {
 447       /* In this case, we're not caching it so the caller owns it entirely */
 448       return anv_shader_bin_create(cache->device, stage,
 449                                    key_data, key_size,
 450                                    kernel_data, kernel_size,
 451                                    constant_data, constant_data_size,
 452                                    prog_data, prog_data_size,
 453                                    stats, num_stats,
 454                                    xfb_info, bind_map);
 455    }
 456 }
 457
 458 struct cache_header {
 459    uint32_t header_size;
 460    uint32_t header_version;
 461    uint32_t vendor_id;
 462    uint32_t device_id;
 463    uint8_t  uuid[VK_UUID_SIZE];
 464 };
 465
 466 static void
 467 anv_pipeline_cache_load(struct anv_pipeline_cache *cache,
 468                         const void *data, size_t size)
 469 {
 470    struct anv_device *device = cache->device;
 471    struct anv_physical_device *pdevice = device->physical;
 472
 473    if (cache->cache == NULL)
 474       return;
 475
 476    struct blob_reader blob;
 477    blob_reader_init(&blob, data, size);
 478
 479    struct cache_header header;
 480    blob_copy_bytes(&blob, &header, sizeof(header));
 481    uint32_t count = blob_read_uint32(&blob);
 482    if (blob.overrun)
 483       return;
 484
 485    if (header.header_size < sizeof(header))
 486       return;
 487    if (header.header_version != VK_PIPELINE_CACHE_HEADER_VERSION_ONE)
 488       return;
 489    if (header.vendor_id != 0x8086)
 490       return;
 491    if (header.device_id != device->info.chipset_id)
 492       return;
 493    if (memcmp(header.uuid, pdevice->pipeline_cache_uuid, VK_UUID_SIZE) != 0)
 494       return;
 495
 496    for (uint32_t i = 0; i < count; i++) {
 497       struct anv_shader_bin *bin =
 498          anv_shader_bin_create_from_blob(device, &blob);
 499       if (!bin)
 500          break;
 501       _mesa_hash_table_insert(cache->cache, bin->key, bin);
 502    }
 503 }
 504
 505 VkResult anv_CreatePipelineCache(
 506     VkDevice                                    _device,
 507     const VkPipelineCacheCreateInfo*            pCreateInfo,
 508     const VkAllocationCallbacks*                pAllocator,
 509     VkPipelineCache*                            pPipelineCache)
 510 {
 511    ANV_FROM_HANDLE(anv_device, device, _device);
 512    struct anv_pipeline_cache *cache;
 513
 514    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO);
 515    assert(pCreateInfo->flags == 0);
 516
 517    cache = vk_alloc2(&device->vk.alloc, pAllocator,
 518                        sizeof(*cache), 8,
 519                        VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
 520    if (cache == NULL)
 521       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 522
 523    anv_pipeline_cache_init(cache, device,
 524                            device->physical->instance->pipeline_cache_enabled);
 525
 526    if (pCreateInfo->initialDataSize > 0)
 527       anv_pipeline_cache_load(cache,
 528                               pCreateInfo->pInitialData,
 529                               pCreateInfo->initialDataSize);
 530
 531    *pPipelineCache = anv_pipeline_cache_to_handle(cache);
 532
 533    return VK_SUCCESS;
 534 }
 535
 536 void anv_DestroyPipelineCache(
 537     VkDevice                                    _device,
 538     VkPipelineCache                             _cache,
 539     const VkAllocationCallbacks*                pAllocator)
 540 {
 541    ANV_FROM_HANDLE(anv_device, device, _device);
 542    ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache);
 543
 544    if (!cache)
 545       return;
 546
 547    anv_pipeline_cache_finish(cache);
 548
 549    vk_free2(&device->vk.alloc, pAllocator, cache);
 550 }
 551
 552 VkResult anv_GetPipelineCacheData(
 553     VkDevice                                    _device,
 554     VkPipelineCache                             _cache,
 555     size_t*                                     pDataSize,
 556     void*                                       pData)
 557 {
 558    ANV_FROM_HANDLE(anv_device, device, _device);
 559    ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache);
 560
 561    struct blob blob;
 562    if (pData) {
 563       blob_init_fixed(&blob, pData, *pDataSize);
 564    } else {
 565       blob_init_fixed(&blob, NULL, SIZE_MAX);
 566    }
 567
 568    struct cache_header header = {
 569       .header_size = sizeof(struct cache_header),
 570       .header_version = VK_PIPELINE_CACHE_HEADER_VERSION_ONE,
 571       .vendor_id = 0x8086,
 572       .device_id = device->info.chipset_id,
 573    };
 574    memcpy(header.uuid, device->physical->pipeline_cache_uuid, VK_UUID_SIZE);
 575    blob_write_bytes(&blob, &header, sizeof(header));
 576
 577    uint32_t count = 0;
 578    intptr_t count_offset = blob_reserve_uint32(&blob);
 579    if (count_offset < 0) {
 580       *pDataSize = 0;
 581       blob_finish(&blob);
 582       return VK_INCOMPLETE;
 583    }
 584
 585    VkResult result = VK_SUCCESS;
 586    if (cache->cache) {
 587       hash_table_foreach(cache->cache, entry) {
 588          struct anv_shader_bin *shader = entry->data;
 589
 590          size_t save_size = blob.size;
 591          if (!anv_shader_bin_write_to_blob(shader, &blob)) {
 592             /* If it fails reset to the previous size and bail */
 593             blob.size = save_size;
 594             result = VK_INCOMPLETE;
 595             break;
 596          }
 597
 598          count++;
 599       }
 600    }
 601
 602    blob_overwrite_uint32(&blob, count_offset, count);
 603
 604    *pDataSize = blob.size;
 605
 606    blob_finish(&blob);
 607
 608    return result;
 609 }
 610
 611 VkResult anv_MergePipelineCaches(
 612     VkDevice                                    _device,
 613     VkPipelineCache                             destCache,
 614     uint32_t                                    srcCacheCount,
 615     const VkPipelineCache*                      pSrcCaches)
 616 {
 617    ANV_FROM_HANDLE(anv_pipeline_cache, dst, destCache);
 618
 619    if (!dst->cache)
 620       return VK_SUCCESS;
 621
 622    for (uint32_t i = 0; i < srcCacheCount; i++) {
 623       ANV_FROM_HANDLE(anv_pipeline_cache, src, pSrcCaches[i]);
 624       if (!src->cache)
 625          continue;
 626
 627       hash_table_foreach(src->cache, entry) {
 628          struct anv_shader_bin *bin = entry->data;
 629          assert(bin);
 630
 631          if (_mesa_hash_table_search(dst->cache, bin->key))
 632             continue;
 633
 634          anv_shader_bin_ref(bin);
 635          _mesa_hash_table_insert(dst->cache, bin->key, bin);
 636       }
 637    }
 638
 639    return VK_SUCCESS;
 640 }
 641
 642 struct anv_shader_bin *
 643 anv_device_search_for_kernel(struct anv_device *device,
 644                              struct anv_pipeline_cache *cache,
 645                              const void *key_data, uint32_t key_size,
 646                              bool *user_cache_hit)
 647 {
 648    struct anv_shader_bin *bin;
 649
 650    *user_cache_hit = false;
 651
 652    if (cache) {
 653       bin = anv_pipeline_cache_search(cache, key_data, key_size);
 654       if (bin) {
 655          *user_cache_hit = cache != &device->default_pipeline_cache;
 656          return bin;
 657       }
 658    }
 659
 660 #ifdef ENABLE_SHADER_CACHE
 661    struct disk_cache *disk_cache = device->physical->disk_cache;
 662    if (disk_cache && device->physical->instance->pipeline_cache_enabled) {
 663       cache_key cache_key;
 664       disk_cache_compute_key(disk_cache, key_data, key_size, cache_key);
 665
 666       size_t buffer_size;
 667       uint8_t *buffer = disk_cache_get(disk_cache, cache_key, &buffer_size);
 668       if (buffer) {
 669          struct blob_reader blob;
 670          blob_reader_init(&blob, buffer, buffer_size);
 671          bin = anv_shader_bin_create_from_blob(device, &blob);
 672          free(buffer);
 673
 674          if (bin) {
 675             if (cache)
 676                anv_pipeline_cache_add_shader_bin(cache, bin);
 677             return bin;
 678          }
 679       }
 680    }
 681 #endif
 682
 683    return NULL;
 684 }
 685
 686 struct anv_shader_bin *
 687 anv_device_upload_kernel(struct anv_device *device,
 688                          struct anv_pipeline_cache *cache,
 689                          gl_shader_stage stage,
 690                          const void *key_data, uint32_t key_size,
 691                          const void *kernel_data, uint32_t kernel_size,
 692                          const void *constant_data,
 693                          uint32_t constant_data_size,
 694                          const struct brw_stage_prog_data *prog_data,
 695                          uint32_t prog_data_size,
 696                          const struct brw_compile_stats *stats,
 697                          uint32_t num_stats,
 698                          const nir_xfb_info *xfb_info,
 699                          const struct anv_pipeline_bind_map *bind_map)
 700 {
 701    struct anv_shader_bin *bin;
 702    if (cache) {
 703       bin = anv_pipeline_cache_upload_kernel(cache, stage, key_data, key_size,
 704                                              kernel_data, kernel_size,
 705                                              constant_data, constant_data_size,
 706                                              prog_data, prog_data_size,
 707                                              stats, num_stats,
 708                                              xfb_info, bind_map);
 709    } else {
 710       bin = anv_shader_bin_create(device, stage, key_data, key_size,
 711                                   kernel_data, kernel_size,
 712                                   constant_data, constant_data_size,
 713                                   prog_data, prog_data_size,
 714                                   stats, num_stats,
 715                                   xfb_info, bind_map);
 716    }
 717
 718    if (bin == NULL)
 719       return NULL;
 720
 721 #ifdef ENABLE_SHADER_CACHE
 722    struct disk_cache *disk_cache = device->physical->disk_cache;
 723    if (disk_cache) {
 724       struct blob binary;
 725       blob_init(&binary);
 726       if (anv_shader_bin_write_to_blob(bin, &binary)) {
 727          cache_key cache_key;
 728          disk_cache_compute_key(disk_cache, key_data, key_size, cache_key);
 729
 730          disk_cache_put(disk_cache, cache_key, binary.data, binary.size, NULL);
 731       }
 732
 733       blob_finish(&binary);
 734    }
 735 #endif
 736
 737    return bin;
 738 }
 739
 740 struct serialized_nir {
 741    unsigned char sha1_key[20];
 742    size_t size;
 743    char data[0];
 744 };
 745
 746 struct nir_shader *
 747 anv_device_search_for_nir(struct anv_device *device,
 748                           struct anv_pipeline_cache *cache,
 749                           const nir_shader_compiler_options *nir_options,
 750                           unsigned char sha1_key[20],
 751                           void *mem_ctx)
 752 {
 753    if (cache && cache->nir_cache) {
 754       const struct serialized_nir *snir = NULL;
 755
 756       pthread_mutex_lock(&cache->mutex);
 757       struct hash_entry *entry =
 758          _mesa_hash_table_search(cache->nir_cache, sha1_key);
 759       if (entry)
 760          snir = entry->data;
 761       pthread_mutex_unlock(&cache->mutex);
 762
 763       if (snir) {
 764          struct blob_reader blob;
 765          blob_reader_init(&blob, snir->data, snir->size);
 766
 767          nir_shader *nir = nir_deserialize(mem_ctx, nir_options, &blob);
 768          if (blob.overrun) {
 769             ralloc_free(nir);
 770          } else {
 771             return nir;
 772          }
 773       }
 774    }
 775
 776    return NULL;
 777 }
 778
 779 void
 780 anv_device_upload_nir(struct anv_device *device,
 781                       struct anv_pipeline_cache *cache,
 782                       const struct nir_shader *nir,
 783                       unsigned char sha1_key[20])
 784 {
 785    if (cache && cache->nir_cache) {
 786       pthread_mutex_lock(&cache->mutex);
 787       struct hash_entry *entry =
 788          _mesa_hash_table_search(cache->nir_cache, sha1_key);
 789       pthread_mutex_unlock(&cache->mutex);
 790       if (entry)
 791          return;
 792
 793       struct blob blob;
 794       blob_init(&blob);
 795
 796       nir_serialize(&blob, nir, false);
 797       if (blob.out_of_memory) {
 798          blob_finish(&blob);
 799          return;
 800       }
 801
 802       pthread_mutex_lock(&cache->mutex);
 803       /* Because ralloc isn't thread-safe, we have to do all this inside the
 804        * lock.  We could unlock for the big memcpy but it's probably not worth
 805        * the hassle.
 806        */
 807       entry = _mesa_hash_table_search(cache->nir_cache, sha1_key);
 808       if (entry) {
 809          blob_finish(&blob);
 810          pthread_mutex_unlock(&cache->mutex);
 811          return;
 812       }
 813
 814       struct serialized_nir *snir =
 815          ralloc_size(cache->nir_cache, sizeof(*snir) + blob.size);
 816       memcpy(snir->sha1_key, sha1_key, 20);
 817       snir->size = blob.size;
 818       memcpy(snir->data, blob.data, blob.size);
 819
 820       blob_finish(&blob);
 821
 822       _mesa_hash_table_insert(cache->nir_cache, snir->sha1_key, snir);
 823
 824       pthread_mutex_unlock(&cache->mutex);
 825    }
 826 }