2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "util/blob.h"
25 #include "util/hash_table.h"
26 #include "util/debug.h"
27 #include "util/disk_cache.h"
28 #include "util/mesa-sha1.h"
29 #include "nir/nir_serialize.h"
30 #include "anv_private.h"
31 #include "nir/nir_xfb_info.h"
32 #include "vulkan/util/vk_util.h"
34 struct anv_shader_bin
*
35 anv_shader_bin_create(struct anv_device
*device
,
36 gl_shader_stage stage
,
37 const void *key_data
, uint32_t key_size
,
38 const void *kernel_data
, uint32_t kernel_size
,
39 const struct brw_stage_prog_data
*prog_data_in
,
40 uint32_t prog_data_size
,
41 const struct brw_compile_stats
*stats
, uint32_t num_stats
,
42 const nir_xfb_info
*xfb_info_in
,
43 const struct anv_pipeline_bind_map
*bind_map
)
45 struct anv_shader_bin
*shader
;
46 struct anv_shader_bin_key
*key
;
47 struct brw_stage_prog_data
*prog_data
;
48 struct brw_shader_reloc
*prog_data_relocs
;
49 uint32_t *prog_data_param
;
50 nir_xfb_info
*xfb_info
;
51 struct anv_pipeline_binding
*surface_to_descriptor
, *sampler_to_descriptor
;
54 anv_multialloc_add(&ma
, &shader
, 1);
55 anv_multialloc_add_size(&ma
, &key
, sizeof(*key
) + key_size
);
56 anv_multialloc_add_size(&ma
, &prog_data
, prog_data_size
);
57 anv_multialloc_add(&ma
, &prog_data_relocs
, prog_data_in
->num_relocs
);
58 anv_multialloc_add(&ma
, &prog_data_param
, prog_data_in
->nr_params
);
60 uint32_t xfb_info_size
= nir_xfb_info_size(xfb_info_in
->output_count
);
61 anv_multialloc_add_size(&ma
, &xfb_info
, xfb_info_size
);
63 anv_multialloc_add(&ma
, &surface_to_descriptor
,
64 bind_map
->surface_count
);
65 anv_multialloc_add(&ma
, &sampler_to_descriptor
,
66 bind_map
->sampler_count
);
68 if (!anv_multialloc_alloc(&ma
, &device
->vk
.alloc
,
69 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE
))
74 shader
->stage
= stage
;
77 memcpy(key
->data
, key_data
, key_size
);
81 anv_state_pool_alloc(&device
->instruction_state_pool
, kernel_size
, 64);
82 memcpy(shader
->kernel
.map
, kernel_data
, kernel_size
);
83 shader
->kernel_size
= kernel_size
;
85 memcpy(prog_data
, prog_data_in
, prog_data_size
);
86 typed_memcpy(prog_data_relocs
, prog_data_in
->relocs
,
87 prog_data_in
->num_relocs
);
88 prog_data
->relocs
= prog_data_relocs
;
89 memset(prog_data_param
, 0,
90 prog_data
->nr_params
* sizeof(*prog_data_param
));
91 prog_data
->param
= prog_data_param
;
92 shader
->prog_data
= prog_data
;
93 shader
->prog_data_size
= prog_data_size
;
95 assert(num_stats
<= ARRAY_SIZE(shader
->stats
));
96 typed_memcpy(shader
->stats
, stats
, num_stats
);
97 shader
->num_stats
= num_stats
;
100 *xfb_info
= *xfb_info_in
;
101 typed_memcpy(xfb_info
->outputs
, xfb_info_in
->outputs
,
102 xfb_info_in
->output_count
);
103 shader
->xfb_info
= xfb_info
;
105 shader
->xfb_info
= NULL
;
108 shader
->bind_map
= *bind_map
;
109 typed_memcpy(surface_to_descriptor
, bind_map
->surface_to_descriptor
,
110 bind_map
->surface_count
);
111 shader
->bind_map
.surface_to_descriptor
= surface_to_descriptor
;
112 typed_memcpy(sampler_to_descriptor
, bind_map
->sampler_to_descriptor
,
113 bind_map
->sampler_count
);
114 shader
->bind_map
.sampler_to_descriptor
= sampler_to_descriptor
;
120 anv_shader_bin_destroy(struct anv_device
*device
,
121 struct anv_shader_bin
*shader
)
123 assert(shader
->ref_cnt
== 0);
124 anv_state_pool_free(&device
->instruction_state_pool
, shader
->kernel
);
125 vk_free(&device
->vk
.alloc
, shader
);
129 anv_shader_bin_write_to_blob(const struct anv_shader_bin
*shader
,
132 blob_write_uint32(blob
, shader
->stage
);
134 blob_write_uint32(blob
, shader
->key
->size
);
135 blob_write_bytes(blob
, shader
->key
->data
, shader
->key
->size
);
137 blob_write_uint32(blob
, shader
->kernel_size
);
138 blob_write_bytes(blob
, shader
->kernel
.map
, shader
->kernel_size
);
140 blob_write_uint32(blob
, shader
->prog_data_size
);
141 blob_write_bytes(blob
, shader
->prog_data
, shader
->prog_data_size
);
142 blob_write_bytes(blob
, shader
->prog_data
->relocs
,
143 shader
->prog_data
->num_relocs
*
144 sizeof(shader
->prog_data
->relocs
[0]));
146 blob_write_uint32(blob
, shader
->num_stats
);
147 blob_write_bytes(blob
, shader
->stats
,
148 shader
->num_stats
* sizeof(shader
->stats
[0]));
150 if (shader
->xfb_info
) {
151 uint32_t xfb_info_size
=
152 nir_xfb_info_size(shader
->xfb_info
->output_count
);
153 blob_write_uint32(blob
, xfb_info_size
);
154 blob_write_bytes(blob
, shader
->xfb_info
, xfb_info_size
);
156 blob_write_uint32(blob
, 0);
159 blob_write_bytes(blob
, shader
->bind_map
.surface_sha1
,
160 sizeof(shader
->bind_map
.surface_sha1
));
161 blob_write_bytes(blob
, shader
->bind_map
.sampler_sha1
,
162 sizeof(shader
->bind_map
.sampler_sha1
));
163 blob_write_bytes(blob
, shader
->bind_map
.push_sha1
,
164 sizeof(shader
->bind_map
.push_sha1
));
165 blob_write_uint32(blob
, shader
->bind_map
.surface_count
);
166 blob_write_uint32(blob
, shader
->bind_map
.sampler_count
);
167 blob_write_bytes(blob
, shader
->bind_map
.surface_to_descriptor
,
168 shader
->bind_map
.surface_count
*
169 sizeof(*shader
->bind_map
.surface_to_descriptor
));
170 blob_write_bytes(blob
, shader
->bind_map
.sampler_to_descriptor
,
171 shader
->bind_map
.sampler_count
*
172 sizeof(*shader
->bind_map
.sampler_to_descriptor
));
173 blob_write_bytes(blob
, shader
->bind_map
.push_ranges
,
174 sizeof(shader
->bind_map
.push_ranges
));
176 return !blob
->out_of_memory
;
179 static struct anv_shader_bin
*
180 anv_shader_bin_create_from_blob(struct anv_device
*device
,
181 struct blob_reader
*blob
)
183 gl_shader_stage stage
= blob_read_uint32(blob
);
185 uint32_t key_size
= blob_read_uint32(blob
);
186 const void *key_data
= blob_read_bytes(blob
, key_size
);
188 uint32_t kernel_size
= blob_read_uint32(blob
);
189 const void *kernel_data
= blob_read_bytes(blob
, kernel_size
);
191 uint32_t prog_data_size
= blob_read_uint32(blob
);
192 const void *prog_data_bytes
= blob_read_bytes(blob
, prog_data_size
);
196 union brw_any_prog_data prog_data
;
197 memcpy(&prog_data
, prog_data_bytes
,
198 MIN2(sizeof(prog_data
), prog_data_size
));
199 prog_data
.base
.relocs
=
200 blob_read_bytes(blob
, prog_data
.base
.num_relocs
*
201 sizeof(prog_data
.base
.relocs
[0]));
203 uint32_t num_stats
= blob_read_uint32(blob
);
204 const struct brw_compile_stats
*stats
=
205 blob_read_bytes(blob
, num_stats
* sizeof(stats
[0]));
207 const nir_xfb_info
*xfb_info
= NULL
;
208 uint32_t xfb_size
= blob_read_uint32(blob
);
210 xfb_info
= blob_read_bytes(blob
, xfb_size
);
212 struct anv_pipeline_bind_map bind_map
;
213 blob_copy_bytes(blob
, bind_map
.surface_sha1
, sizeof(bind_map
.surface_sha1
));
214 blob_copy_bytes(blob
, bind_map
.sampler_sha1
, sizeof(bind_map
.sampler_sha1
));
215 blob_copy_bytes(blob
, bind_map
.push_sha1
, sizeof(bind_map
.push_sha1
));
216 bind_map
.surface_count
= blob_read_uint32(blob
);
217 bind_map
.sampler_count
= blob_read_uint32(blob
);
218 bind_map
.surface_to_descriptor
= (void *)
219 blob_read_bytes(blob
, bind_map
.surface_count
*
220 sizeof(*bind_map
.surface_to_descriptor
));
221 bind_map
.sampler_to_descriptor
= (void *)
222 blob_read_bytes(blob
, bind_map
.sampler_count
*
223 sizeof(*bind_map
.sampler_to_descriptor
));
224 blob_copy_bytes(blob
, bind_map
.push_ranges
, sizeof(bind_map
.push_ranges
));
229 return anv_shader_bin_create(device
, stage
,
231 kernel_data
, kernel_size
,
232 &prog_data
.base
, prog_data_size
,
233 stats
, num_stats
, xfb_info
, &bind_map
);
238 * - Compact binding table layout so it's tight and not dependent on
239 * descriptor set layout.
241 * - Review prog_data struct for size and cacheability: struct
242 * brw_stage_prog_data has binding_table which uses a lot of uint32_t for 8
243 * bit quantities etc; use bit fields for all bools, eg dual_src_blend.
247 shader_bin_key_hash_func(const void *void_key
)
249 const struct anv_shader_bin_key
*key
= void_key
;
250 return _mesa_hash_data(key
->data
, key
->size
);
254 shader_bin_key_compare_func(const void *void_a
, const void *void_b
)
256 const struct anv_shader_bin_key
*a
= void_a
, *b
= void_b
;
257 if (a
->size
!= b
->size
)
260 return memcmp(a
->data
, b
->data
, a
->size
) == 0;
264 sha1_hash_func(const void *sha1
)
266 return _mesa_hash_data(sha1
, 20);
270 sha1_compare_func(const void *sha1_a
, const void *sha1_b
)
272 return memcmp(sha1_a
, sha1_b
, 20) == 0;
276 anv_pipeline_cache_init(struct anv_pipeline_cache
*cache
,
277 struct anv_device
*device
,
281 vk_object_base_init(&device
->vk
, &cache
->base
,
282 VK_OBJECT_TYPE_PIPELINE_CACHE
);
283 cache
->device
= device
;
284 cache
->external_sync
= external_sync
;
285 pthread_mutex_init(&cache
->mutex
, NULL
);
288 cache
->cache
= _mesa_hash_table_create(NULL
, shader_bin_key_hash_func
,
289 shader_bin_key_compare_func
);
290 cache
->nir_cache
= _mesa_hash_table_create(NULL
, sha1_hash_func
,
294 cache
->nir_cache
= NULL
;
299 anv_pipeline_cache_finish(struct anv_pipeline_cache
*cache
)
301 pthread_mutex_destroy(&cache
->mutex
);
304 /* This is a bit unfortunate. In order to keep things from randomly
305 * going away, the shader cache has to hold a reference to all shader
306 * binaries it contains. We unref them when we destroy the cache.
308 hash_table_foreach(cache
->cache
, entry
)
309 anv_shader_bin_unref(cache
->device
, entry
->data
);
311 _mesa_hash_table_destroy(cache
->cache
, NULL
);
314 if (cache
->nir_cache
) {
315 hash_table_foreach(cache
->nir_cache
, entry
)
316 ralloc_free(entry
->data
);
318 _mesa_hash_table_destroy(cache
->nir_cache
, NULL
);
321 vk_object_base_finish(&cache
->base
);
324 static struct anv_shader_bin
*
325 anv_pipeline_cache_search_locked(struct anv_pipeline_cache
*cache
,
326 const void *key_data
, uint32_t key_size
)
328 uint32_t vla
[1 + DIV_ROUND_UP(key_size
, sizeof(uint32_t))];
329 struct anv_shader_bin_key
*key
= (void *)vla
;
330 key
->size
= key_size
;
331 memcpy(key
->data
, key_data
, key_size
);
333 struct hash_entry
*entry
= _mesa_hash_table_search(cache
->cache
, key
);
341 anv_cache_lock(struct anv_pipeline_cache
*cache
)
343 if (!cache
->external_sync
)
344 pthread_mutex_lock(&cache
->mutex
);
348 anv_cache_unlock(struct anv_pipeline_cache
*cache
)
350 if (!cache
->external_sync
)
351 pthread_mutex_unlock(&cache
->mutex
);
354 struct anv_shader_bin
*
355 anv_pipeline_cache_search(struct anv_pipeline_cache
*cache
,
356 const void *key_data
, uint32_t key_size
)
361 anv_cache_lock(cache
);
363 struct anv_shader_bin
*shader
=
364 anv_pipeline_cache_search_locked(cache
, key_data
, key_size
);
366 anv_cache_unlock(cache
);
368 /* We increment refcount before handing it to the caller */
370 anv_shader_bin_ref(shader
);
376 anv_pipeline_cache_add_shader_bin(struct anv_pipeline_cache
*cache
,
377 struct anv_shader_bin
*bin
)
382 anv_cache_lock(cache
);
384 struct hash_entry
*entry
= _mesa_hash_table_search(cache
->cache
, bin
->key
);
386 /* Take a reference for the cache */
387 anv_shader_bin_ref(bin
);
388 _mesa_hash_table_insert(cache
->cache
, bin
->key
, bin
);
391 anv_cache_unlock(cache
);
394 static struct anv_shader_bin
*
395 anv_pipeline_cache_add_shader_locked(struct anv_pipeline_cache
*cache
,
396 gl_shader_stage stage
,
397 const void *key_data
, uint32_t key_size
,
398 const void *kernel_data
,
399 uint32_t kernel_size
,
400 const struct brw_stage_prog_data
*prog_data
,
401 uint32_t prog_data_size
,
402 const struct brw_compile_stats
*stats
,
404 const nir_xfb_info
*xfb_info
,
405 const struct anv_pipeline_bind_map
*bind_map
)
407 struct anv_shader_bin
*shader
=
408 anv_pipeline_cache_search_locked(cache
, key_data
, key_size
);
412 struct anv_shader_bin
*bin
=
413 anv_shader_bin_create(cache
->device
, stage
,
415 kernel_data
, kernel_size
,
416 prog_data
, prog_data_size
,
417 stats
, num_stats
, xfb_info
, bind_map
);
421 _mesa_hash_table_insert(cache
->cache
, bin
->key
, bin
);
426 struct anv_shader_bin
*
427 anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache
*cache
,
428 gl_shader_stage stage
,
429 const void *key_data
, uint32_t key_size
,
430 const void *kernel_data
, uint32_t kernel_size
,
431 const struct brw_stage_prog_data
*prog_data
,
432 uint32_t prog_data_size
,
433 const struct brw_compile_stats
*stats
,
435 const nir_xfb_info
*xfb_info
,
436 const struct anv_pipeline_bind_map
*bind_map
)
439 anv_cache_lock(cache
);
441 struct anv_shader_bin
*bin
=
442 anv_pipeline_cache_add_shader_locked(cache
, stage
, key_data
, key_size
,
443 kernel_data
, kernel_size
,
444 prog_data
, prog_data_size
,
448 anv_cache_unlock(cache
);
450 /* We increment refcount before handing it to the caller */
452 anv_shader_bin_ref(bin
);
456 /* In this case, we're not caching it so the caller owns it entirely */
457 return anv_shader_bin_create(cache
->device
, stage
,
459 kernel_data
, kernel_size
,
460 prog_data
, prog_data_size
,
467 anv_pipeline_cache_load(struct anv_pipeline_cache
*cache
,
468 const void *data
, size_t size
)
470 struct anv_device
*device
= cache
->device
;
471 struct anv_physical_device
*pdevice
= device
->physical
;
473 if (cache
->cache
== NULL
)
476 struct blob_reader blob
;
477 blob_reader_init(&blob
, data
, size
);
479 struct vk_pipeline_cache_header header
;
480 blob_copy_bytes(&blob
, &header
, sizeof(header
));
481 uint32_t count
= blob_read_uint32(&blob
);
485 if (header
.header_size
< sizeof(header
))
487 if (header
.header_version
!= VK_PIPELINE_CACHE_HEADER_VERSION_ONE
)
489 if (header
.vendor_id
!= 0x8086)
491 if (header
.device_id
!= device
->info
.chipset_id
)
493 if (memcmp(header
.uuid
, pdevice
->pipeline_cache_uuid
, VK_UUID_SIZE
) != 0)
496 for (uint32_t i
= 0; i
< count
; i
++) {
497 struct anv_shader_bin
*bin
=
498 anv_shader_bin_create_from_blob(device
, &blob
);
501 _mesa_hash_table_insert(cache
->cache
, bin
->key
, bin
);
505 VkResult
anv_CreatePipelineCache(
507 const VkPipelineCacheCreateInfo
* pCreateInfo
,
508 const VkAllocationCallbacks
* pAllocator
,
509 VkPipelineCache
* pPipelineCache
)
511 ANV_FROM_HANDLE(anv_device
, device
, _device
);
512 struct anv_pipeline_cache
*cache
;
514 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO
);
515 assert(pCreateInfo
->flags
== 0);
517 cache
= vk_alloc2(&device
->vk
.alloc
, pAllocator
,
519 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
521 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
523 anv_pipeline_cache_init(cache
, device
,
524 device
->physical
->instance
->pipeline_cache_enabled
,
525 pCreateInfo
->flags
& VK_PIPELINE_CACHE_CREATE_EXTERNALLY_SYNCHRONIZED_BIT_EXT
);
527 if (pCreateInfo
->initialDataSize
> 0)
528 anv_pipeline_cache_load(cache
,
529 pCreateInfo
->pInitialData
,
530 pCreateInfo
->initialDataSize
);
532 *pPipelineCache
= anv_pipeline_cache_to_handle(cache
);
537 void anv_DestroyPipelineCache(
539 VkPipelineCache _cache
,
540 const VkAllocationCallbacks
* pAllocator
)
542 ANV_FROM_HANDLE(anv_device
, device
, _device
);
543 ANV_FROM_HANDLE(anv_pipeline_cache
, cache
, _cache
);
548 anv_pipeline_cache_finish(cache
);
550 vk_free2(&device
->vk
.alloc
, pAllocator
, cache
);
553 VkResult
anv_GetPipelineCacheData(
555 VkPipelineCache _cache
,
559 ANV_FROM_HANDLE(anv_device
, device
, _device
);
560 ANV_FROM_HANDLE(anv_pipeline_cache
, cache
, _cache
);
564 blob_init_fixed(&blob
, pData
, *pDataSize
);
566 blob_init_fixed(&blob
, NULL
, SIZE_MAX
);
569 struct vk_pipeline_cache_header header
= {
570 .header_size
= sizeof(struct vk_pipeline_cache_header
),
571 .header_version
= VK_PIPELINE_CACHE_HEADER_VERSION_ONE
,
573 .device_id
= device
->info
.chipset_id
,
575 memcpy(header
.uuid
, device
->physical
->pipeline_cache_uuid
, VK_UUID_SIZE
);
576 blob_write_bytes(&blob
, &header
, sizeof(header
));
579 intptr_t count_offset
= blob_reserve_uint32(&blob
);
580 if (count_offset
< 0) {
583 return VK_INCOMPLETE
;
586 VkResult result
= VK_SUCCESS
;
588 hash_table_foreach(cache
->cache
, entry
) {
589 struct anv_shader_bin
*shader
= entry
->data
;
591 size_t save_size
= blob
.size
;
592 if (!anv_shader_bin_write_to_blob(shader
, &blob
)) {
593 /* If it fails reset to the previous size and bail */
594 blob
.size
= save_size
;
595 result
= VK_INCOMPLETE
;
603 blob_overwrite_uint32(&blob
, count_offset
, count
);
605 *pDataSize
= blob
.size
;
612 VkResult
anv_MergePipelineCaches(
614 VkPipelineCache destCache
,
615 uint32_t srcCacheCount
,
616 const VkPipelineCache
* pSrcCaches
)
618 ANV_FROM_HANDLE(anv_pipeline_cache
, dst
, destCache
);
623 for (uint32_t i
= 0; i
< srcCacheCount
; i
++) {
624 ANV_FROM_HANDLE(anv_pipeline_cache
, src
, pSrcCaches
[i
]);
628 hash_table_foreach(src
->cache
, entry
) {
629 struct anv_shader_bin
*bin
= entry
->data
;
632 if (_mesa_hash_table_search(dst
->cache
, bin
->key
))
635 anv_shader_bin_ref(bin
);
636 _mesa_hash_table_insert(dst
->cache
, bin
->key
, bin
);
643 struct anv_shader_bin
*
644 anv_device_search_for_kernel(struct anv_device
*device
,
645 struct anv_pipeline_cache
*cache
,
646 const void *key_data
, uint32_t key_size
,
647 bool *user_cache_hit
)
649 struct anv_shader_bin
*bin
;
651 *user_cache_hit
= false;
654 bin
= anv_pipeline_cache_search(cache
, key_data
, key_size
);
656 *user_cache_hit
= cache
!= &device
->default_pipeline_cache
;
661 #ifdef ENABLE_SHADER_CACHE
662 struct disk_cache
*disk_cache
= device
->physical
->disk_cache
;
663 if (disk_cache
&& device
->physical
->instance
->pipeline_cache_enabled
) {
665 disk_cache_compute_key(disk_cache
, key_data
, key_size
, cache_key
);
668 uint8_t *buffer
= disk_cache_get(disk_cache
, cache_key
, &buffer_size
);
670 struct blob_reader blob
;
671 blob_reader_init(&blob
, buffer
, buffer_size
);
672 bin
= anv_shader_bin_create_from_blob(device
, &blob
);
677 anv_pipeline_cache_add_shader_bin(cache
, bin
);
687 struct anv_shader_bin
*
688 anv_device_upload_kernel(struct anv_device
*device
,
689 struct anv_pipeline_cache
*cache
,
690 gl_shader_stage stage
,
691 const void *key_data
, uint32_t key_size
,
692 const void *kernel_data
, uint32_t kernel_size
,
693 const struct brw_stage_prog_data
*prog_data
,
694 uint32_t prog_data_size
,
695 const struct brw_compile_stats
*stats
,
697 const nir_xfb_info
*xfb_info
,
698 const struct anv_pipeline_bind_map
*bind_map
)
700 struct anv_shader_bin
*bin
;
702 bin
= anv_pipeline_cache_upload_kernel(cache
, stage
, key_data
, key_size
,
703 kernel_data
, kernel_size
,
704 prog_data
, prog_data_size
,
708 bin
= anv_shader_bin_create(device
, stage
, key_data
, key_size
,
709 kernel_data
, kernel_size
,
710 prog_data
, prog_data_size
,
718 #ifdef ENABLE_SHADER_CACHE
719 struct disk_cache
*disk_cache
= device
->physical
->disk_cache
;
723 if (anv_shader_bin_write_to_blob(bin
, &binary
)) {
725 disk_cache_compute_key(disk_cache
, key_data
, key_size
, cache_key
);
727 disk_cache_put(disk_cache
, cache_key
, binary
.data
, binary
.size
, NULL
);
730 blob_finish(&binary
);
737 struct serialized_nir
{
738 unsigned char sha1_key
[20];
744 anv_device_search_for_nir(struct anv_device
*device
,
745 struct anv_pipeline_cache
*cache
,
746 const nir_shader_compiler_options
*nir_options
,
747 unsigned char sha1_key
[20],
750 if (cache
&& cache
->nir_cache
) {
751 const struct serialized_nir
*snir
= NULL
;
753 anv_cache_lock(cache
);
754 struct hash_entry
*entry
=
755 _mesa_hash_table_search(cache
->nir_cache
, sha1_key
);
758 anv_cache_unlock(cache
);
761 struct blob_reader blob
;
762 blob_reader_init(&blob
, snir
->data
, snir
->size
);
764 nir_shader
*nir
= nir_deserialize(mem_ctx
, nir_options
, &blob
);
777 anv_device_upload_nir(struct anv_device
*device
,
778 struct anv_pipeline_cache
*cache
,
779 const struct nir_shader
*nir
,
780 unsigned char sha1_key
[20])
782 if (cache
&& cache
->nir_cache
) {
783 anv_cache_lock(cache
);
784 struct hash_entry
*entry
=
785 _mesa_hash_table_search(cache
->nir_cache
, sha1_key
);
786 anv_cache_unlock(cache
);
793 nir_serialize(&blob
, nir
, false);
794 if (blob
.out_of_memory
) {
799 anv_cache_lock(cache
);
800 /* Because ralloc isn't thread-safe, we have to do all this inside the
801 * lock. We could unlock for the big memcpy but it's probably not worth
804 entry
= _mesa_hash_table_search(cache
->nir_cache
, sha1_key
);
807 anv_cache_unlock(cache
);
811 struct serialized_nir
*snir
=
812 ralloc_size(cache
->nir_cache
, sizeof(*snir
) + blob
.size
);
813 memcpy(snir
->sha1_key
, sha1_key
, 20);
814 snir
->size
= blob
.size
;
815 memcpy(snir
->data
, blob
.data
, blob
.size
);
819 _mesa_hash_table_insert(cache
->nir_cache
, snir
->sha1_key
, snir
);
821 anv_cache_unlock(cache
);