src/intel/vulkan/anv_pipeline_cache.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "compiler/blob.h"
  25 #include "util/hash_table.h"
  26 #include "util/debug.h"
  27 #include "util/disk_cache.h"
  28 #include "util/mesa-sha1.h"
  29 #include "nir/nir_serialize.h"
  30 #include "anv_private.h"
  31
  32 struct anv_shader_bin *
  33 anv_shader_bin_create(struct anv_device *device,
  34                       const void *key_data, uint32_t key_size,
  35                       const void *kernel_data, uint32_t kernel_size,
  36                       const void *constant_data, uint32_t constant_data_size,
  37                       const struct brw_stage_prog_data *prog_data_in,
  38                       uint32_t prog_data_size, const void *prog_data_param_in,
  39                       const struct anv_pipeline_bind_map *bind_map)
  40 {
  41    struct anv_shader_bin *shader;
  42    struct anv_shader_bin_key *key;
  43    struct brw_stage_prog_data *prog_data;
  44    uint32_t *prog_data_param;
  45    struct anv_pipeline_binding *surface_to_descriptor, *sampler_to_descriptor;
  46
  47    ANV_MULTIALLOC(ma);
  48    anv_multialloc_add(&ma, &shader, 1);
  49    anv_multialloc_add_size(&ma, &key, sizeof(*key) + key_size);
  50    anv_multialloc_add_size(&ma, &prog_data, prog_data_size);
  51    anv_multialloc_add(&ma, &prog_data_param, prog_data_in->nr_params);
  52    anv_multialloc_add(&ma, &surface_to_descriptor,
  53                            bind_map->surface_count);
  54    anv_multialloc_add(&ma, &sampler_to_descriptor,
  55                            bind_map->sampler_count);
  56
  57    if (!anv_multialloc_alloc(&ma, &device->alloc,
  58                              VK_SYSTEM_ALLOCATION_SCOPE_DEVICE))
  59       return NULL;
  60
  61    shader->ref_cnt = 1;
  62
  63    key->size = key_size;
  64    memcpy(key->data, key_data, key_size);
  65    shader->key = key;
  66
  67    shader->kernel =
  68       anv_state_pool_alloc(&device->instruction_state_pool, kernel_size, 64);
  69    memcpy(shader->kernel.map, kernel_data, kernel_size);
  70    shader->kernel_size = kernel_size;
  71
  72    if (constant_data_size) {
  73       shader->constant_data =
  74          anv_state_pool_alloc(&device->dynamic_state_pool,
  75                               constant_data_size, 32);
  76       memcpy(shader->constant_data.map, constant_data, constant_data_size);
  77    } else {
  78       shader->constant_data = ANV_STATE_NULL;
  79    }
  80    shader->constant_data_size = constant_data_size;
  81
  82    memcpy(prog_data, prog_data_in, prog_data_size);
  83    memcpy(prog_data_param, prog_data_param_in,
  84           prog_data->nr_params * sizeof(*prog_data_param));
  85    prog_data->param = prog_data_param;
  86    shader->prog_data = prog_data;
  87    shader->prog_data_size = prog_data_size;
  88
  89    shader->bind_map = *bind_map;
  90    typed_memcpy(surface_to_descriptor, bind_map->surface_to_descriptor,
  91                 bind_map->surface_count);
  92    shader->bind_map.surface_to_descriptor = surface_to_descriptor;
  93    typed_memcpy(sampler_to_descriptor, bind_map->sampler_to_descriptor,
  94                 bind_map->sampler_count);
  95    shader->bind_map.sampler_to_descriptor = sampler_to_descriptor;
  96
  97    return shader;
  98 }
  99
 100 void
 101 anv_shader_bin_destroy(struct anv_device *device,
 102                        struct anv_shader_bin *shader)
 103 {
 104    assert(shader->ref_cnt == 0);
 105    anv_state_pool_free(&device->instruction_state_pool, shader->kernel);
 106    anv_state_pool_free(&device->dynamic_state_pool, shader->constant_data);
 107    vk_free(&device->alloc, shader);
 108 }
 109
 110 static bool
 111 anv_shader_bin_write_to_blob(const struct anv_shader_bin *shader,
 112                              struct blob *blob)
 113 {
 114    bool ok;
 115
 116    ok = blob_write_uint32(blob, shader->key->size);
 117    ok = blob_write_bytes(blob, shader->key->data, shader->key->size);
 118
 119    ok = blob_write_uint32(blob, shader->kernel_size);
 120    ok = blob_write_bytes(blob, shader->kernel.map, shader->kernel_size);
 121
 122    ok = blob_write_uint32(blob, shader->constant_data_size);
 123    ok = blob_write_bytes(blob, shader->constant_data.map,
 124                          shader->constant_data_size);
 125
 126    ok = blob_write_uint32(blob, shader->prog_data_size);
 127    ok = blob_write_bytes(blob, shader->prog_data, shader->prog_data_size);
 128    ok = blob_write_bytes(blob, shader->prog_data->param,
 129                                shader->prog_data->nr_params *
 130                                sizeof(*shader->prog_data->param));
 131
 132    ok = blob_write_uint32(blob, shader->bind_map.surface_count);
 133    ok = blob_write_uint32(blob, shader->bind_map.sampler_count);
 134    ok = blob_write_uint32(blob, shader->bind_map.image_count);
 135    ok = blob_write_bytes(blob, shader->bind_map.surface_to_descriptor,
 136                                shader->bind_map.surface_count *
 137                                sizeof(*shader->bind_map.surface_to_descriptor));
 138    ok = blob_write_bytes(blob, shader->bind_map.sampler_to_descriptor,
 139                                shader->bind_map.sampler_count *
 140                                sizeof(*shader->bind_map.sampler_to_descriptor));
 141
 142    return ok;
 143 }
 144
 145 static struct anv_shader_bin *
 146 anv_shader_bin_create_from_blob(struct anv_device *device,
 147                                 struct blob_reader *blob)
 148 {
 149    uint32_t key_size = blob_read_uint32(blob);
 150    const void *key_data = blob_read_bytes(blob, key_size);
 151
 152    uint32_t kernel_size = blob_read_uint32(blob);
 153    const void *kernel_data = blob_read_bytes(blob, kernel_size);
 154
 155    uint32_t constant_data_size = blob_read_uint32(blob);
 156    const void *constant_data = blob_read_bytes(blob, constant_data_size);
 157
 158    uint32_t prog_data_size = blob_read_uint32(blob);
 159    const struct brw_stage_prog_data *prog_data =
 160       blob_read_bytes(blob, prog_data_size);
 161    if (blob->overrun)
 162       return NULL;
 163    const void *prog_data_param =
 164       blob_read_bytes(blob, prog_data->nr_params * sizeof(*prog_data->param));
 165
 166    struct anv_pipeline_bind_map bind_map;
 167    bind_map.surface_count = blob_read_uint32(blob);
 168    bind_map.sampler_count = blob_read_uint32(blob);
 169    bind_map.image_count = blob_read_uint32(blob);
 170    bind_map.surface_to_descriptor = (void *)
 171       blob_read_bytes(blob, bind_map.surface_count *
 172                             sizeof(*bind_map.surface_to_descriptor));
 173    bind_map.sampler_to_descriptor = (void *)
 174       blob_read_bytes(blob, bind_map.sampler_count *
 175                             sizeof(*bind_map.sampler_to_descriptor));
 176
 177    if (blob->overrun)
 178       return NULL;
 179
 180    return anv_shader_bin_create(device,
 181                                 key_data, key_size,
 182                                 kernel_data, kernel_size,
 183                                 constant_data, constant_data_size,
 184                                 prog_data, prog_data_size, prog_data_param,
 185                                 &bind_map);
 186 }
 187
 188 /* Remaining work:
 189  *
 190  * - Compact binding table layout so it's tight and not dependent on
 191  *   descriptor set layout.
 192  *
 193  * - Review prog_data struct for size and cacheability: struct
 194  *   brw_stage_prog_data has binding_table which uses a lot of uint32_t for 8
 195  *   bit quantities etc; use bit fields for all bools, eg dual_src_blend.
 196  */
 197
 198 static uint32_t
 199 shader_bin_key_hash_func(const void *void_key)
 200 {
 201    const struct anv_shader_bin_key *key = void_key;
 202    return _mesa_hash_data(key->data, key->size);
 203 }
 204
 205 static bool
 206 shader_bin_key_compare_func(const void *void_a, const void *void_b)
 207 {
 208    const struct anv_shader_bin_key *a = void_a, *b = void_b;
 209    if (a->size != b->size)
 210       return false;
 211
 212    return memcmp(a->data, b->data, a->size) == 0;
 213 }
 214
 215 static uint32_t
 216 sha1_hash_func(const void *sha1)
 217 {
 218    return _mesa_hash_data(sha1, 20);
 219 }
 220
 221 static bool
 222 sha1_compare_func(const void *sha1_a, const void *sha1_b)
 223 {
 224    return memcmp(sha1_a, sha1_b, 20) == 0;
 225 }
 226
 227 void
 228 anv_pipeline_cache_init(struct anv_pipeline_cache *cache,
 229                         struct anv_device *device,
 230                         bool cache_enabled)
 231 {
 232    cache->device = device;
 233    pthread_mutex_init(&cache->mutex, NULL);
 234
 235    if (cache_enabled) {
 236       cache->cache = _mesa_hash_table_create(NULL, shader_bin_key_hash_func,
 237                                              shader_bin_key_compare_func);
 238       cache->nir_cache = _mesa_hash_table_create(NULL, sha1_hash_func,
 239                                                  sha1_compare_func);
 240    } else {
 241       cache->cache = NULL;
 242       cache->nir_cache = NULL;
 243    }
 244 }
 245
 246 void
 247 anv_pipeline_cache_finish(struct anv_pipeline_cache *cache)
 248 {
 249    pthread_mutex_destroy(&cache->mutex);
 250
 251    if (cache->cache) {
 252       /* This is a bit unfortunate.  In order to keep things from randomly
 253        * going away, the shader cache has to hold a reference to all shader
 254        * binaries it contains.  We unref them when we destroy the cache.
 255        */
 256       hash_table_foreach(cache->cache, entry)
 257          anv_shader_bin_unref(cache->device, entry->data);
 258
 259       _mesa_hash_table_destroy(cache->cache, NULL);
 260    }
 261 }
 262
 263 static struct anv_shader_bin *
 264 anv_pipeline_cache_search_locked(struct anv_pipeline_cache *cache,
 265                                  const void *key_data, uint32_t key_size)
 266 {
 267    uint32_t vla[1 + DIV_ROUND_UP(key_size, sizeof(uint32_t))];
 268    struct anv_shader_bin_key *key = (void *)vla;
 269    key->size = key_size;
 270    memcpy(key->data, key_data, key_size);
 271
 272    struct hash_entry *entry = _mesa_hash_table_search(cache->cache, key);
 273    if (entry)
 274       return entry->data;
 275    else
 276       return NULL;
 277 }
 278
 279 struct anv_shader_bin *
 280 anv_pipeline_cache_search(struct anv_pipeline_cache *cache,
 281                           const void *key_data, uint32_t key_size)
 282 {
 283    if (!cache->cache)
 284       return NULL;
 285
 286    pthread_mutex_lock(&cache->mutex);
 287
 288    struct anv_shader_bin *shader =
 289       anv_pipeline_cache_search_locked(cache, key_data, key_size);
 290
 291    pthread_mutex_unlock(&cache->mutex);
 292
 293    /* We increment refcount before handing it to the caller */
 294    if (shader)
 295       anv_shader_bin_ref(shader);
 296
 297    return shader;
 298 }
 299
 300 static void
 301 anv_pipeline_cache_add_shader_bin(struct anv_pipeline_cache *cache,
 302                                   struct anv_shader_bin *bin)
 303 {
 304    if (!cache->cache)
 305       return;
 306
 307    pthread_mutex_lock(&cache->mutex);
 308
 309    struct hash_entry *entry = _mesa_hash_table_search(cache->cache, bin->key);
 310    if (entry == NULL) {
 311       /* Take a reference for the cache */
 312       anv_shader_bin_ref(bin);
 313       _mesa_hash_table_insert(cache->cache, bin->key, bin);
 314    }
 315
 316    pthread_mutex_unlock(&cache->mutex);
 317 }
 318
 319 static struct anv_shader_bin *
 320 anv_pipeline_cache_add_shader_locked(struct anv_pipeline_cache *cache,
 321                                      const void *key_data, uint32_t key_size,
 322                                      const void *kernel_data,
 323                                      uint32_t kernel_size,
 324                                      const void *constant_data,
 325                                      uint32_t constant_data_size,
 326                                      const struct brw_stage_prog_data *prog_data,
 327                                      uint32_t prog_data_size,
 328                                      const void *prog_data_param,
 329                                      const struct anv_pipeline_bind_map *bind_map)
 330 {
 331    struct anv_shader_bin *shader =
 332       anv_pipeline_cache_search_locked(cache, key_data, key_size);
 333    if (shader)
 334       return shader;
 335
 336    struct anv_shader_bin *bin =
 337       anv_shader_bin_create(cache->device, key_data, key_size,
 338                             kernel_data, kernel_size,
 339                             constant_data, constant_data_size,
 340                             prog_data, prog_data_size, prog_data_param,
 341                             bind_map);
 342    if (!bin)
 343       return NULL;
 344
 345    _mesa_hash_table_insert(cache->cache, bin->key, bin);
 346
 347    return bin;
 348 }
 349
 350 struct anv_shader_bin *
 351 anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache,
 352                                  const void *key_data, uint32_t key_size,
 353                                  const void *kernel_data, uint32_t kernel_size,
 354                                  const void *constant_data,
 355                                  uint32_t constant_data_size,
 356                                  const struct brw_stage_prog_data *prog_data,
 357                                  uint32_t prog_data_size,
 358                                  const struct anv_pipeline_bind_map *bind_map)
 359 {
 360    if (cache->cache) {
 361       pthread_mutex_lock(&cache->mutex);
 362
 363       struct anv_shader_bin *bin =
 364          anv_pipeline_cache_add_shader_locked(cache, key_data, key_size,
 365                                               kernel_data, kernel_size,
 366                                               constant_data, constant_data_size,
 367                                               prog_data, prog_data_size,
 368                                               prog_data->param, bind_map);
 369
 370       pthread_mutex_unlock(&cache->mutex);
 371
 372       /* We increment refcount before handing it to the caller */
 373       if (bin)
 374          anv_shader_bin_ref(bin);
 375
 376       return bin;
 377    } else {
 378       /* In this case, we're not caching it so the caller owns it entirely */
 379       return anv_shader_bin_create(cache->device, key_data, key_size,
 380                                    kernel_data, kernel_size,
 381                                    constant_data, constant_data_size,
 382                                    prog_data, prog_data_size,
 383                                    prog_data->param, bind_map);
 384    }
 385 }
 386
 387 struct cache_header {
 388    uint32_t header_size;
 389    uint32_t header_version;
 390    uint32_t vendor_id;
 391    uint32_t device_id;
 392    uint8_t  uuid[VK_UUID_SIZE];
 393 };
 394
 395 static void
 396 anv_pipeline_cache_load(struct anv_pipeline_cache *cache,
 397                         const void *data, size_t size)
 398 {
 399    struct anv_device *device = cache->device;
 400    struct anv_physical_device *pdevice = &device->instance->physicalDevice;
 401
 402    if (cache->cache == NULL)
 403       return;
 404
 405    struct blob_reader blob;
 406    blob_reader_init(&blob, data, size);
 407
 408    struct cache_header header;
 409    blob_copy_bytes(&blob, &header, sizeof(header));
 410    uint32_t count = blob_read_uint32(&blob);
 411    if (blob.overrun)
 412       return;
 413
 414    if (header.header_size < sizeof(header))
 415       return;
 416    if (header.header_version != VK_PIPELINE_CACHE_HEADER_VERSION_ONE)
 417       return;
 418    if (header.vendor_id != 0x8086)
 419       return;
 420    if (header.device_id != device->chipset_id)
 421       return;
 422    if (memcmp(header.uuid, pdevice->pipeline_cache_uuid, VK_UUID_SIZE) != 0)
 423       return;
 424
 425    for (uint32_t i = 0; i < count; i++) {
 426       struct anv_shader_bin *bin =
 427          anv_shader_bin_create_from_blob(device, &blob);
 428       if (!bin)
 429          break;
 430       _mesa_hash_table_insert(cache->cache, bin->key, bin);
 431    }
 432 }
 433
 434 VkResult anv_CreatePipelineCache(
 435     VkDevice                                    _device,
 436     const VkPipelineCacheCreateInfo*            pCreateInfo,
 437     const VkAllocationCallbacks*                pAllocator,
 438     VkPipelineCache*                            pPipelineCache)
 439 {
 440    ANV_FROM_HANDLE(anv_device, device, _device);
 441    struct anv_pipeline_cache *cache;
 442
 443    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO);
 444    assert(pCreateInfo->flags == 0);
 445
 446    cache = vk_alloc2(&device->alloc, pAllocator,
 447                        sizeof(*cache), 8,
 448                        VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
 449    if (cache == NULL)
 450       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 451
 452    anv_pipeline_cache_init(cache, device,
 453                            device->instance->pipeline_cache_enabled);
 454
 455    if (pCreateInfo->initialDataSize > 0)
 456       anv_pipeline_cache_load(cache,
 457                               pCreateInfo->pInitialData,
 458                               pCreateInfo->initialDataSize);
 459
 460    *pPipelineCache = anv_pipeline_cache_to_handle(cache);
 461
 462    return VK_SUCCESS;
 463 }
 464
 465 void anv_DestroyPipelineCache(
 466     VkDevice                                    _device,
 467     VkPipelineCache                             _cache,
 468     const VkAllocationCallbacks*                pAllocator)
 469 {
 470    ANV_FROM_HANDLE(anv_device, device, _device);
 471    ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache);
 472
 473    if (!cache)
 474       return;
 475
 476    anv_pipeline_cache_finish(cache);
 477
 478    vk_free2(&device->alloc, pAllocator, cache);
 479 }
 480
 481 VkResult anv_GetPipelineCacheData(
 482     VkDevice                                    _device,
 483     VkPipelineCache                             _cache,
 484     size_t*                                     pDataSize,
 485     void*                                       pData)
 486 {
 487    ANV_FROM_HANDLE(anv_device, device, _device);
 488    ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache);
 489    struct anv_physical_device *pdevice = &device->instance->physicalDevice;
 490
 491    struct blob blob;
 492    if (pData) {
 493       blob_init_fixed(&blob, pData, *pDataSize);
 494    } else {
 495       blob_init_fixed(&blob, NULL, SIZE_MAX);
 496    }
 497
 498    struct cache_header header = {
 499       .header_size = sizeof(struct cache_header),
 500       .header_version = VK_PIPELINE_CACHE_HEADER_VERSION_ONE,
 501       .vendor_id = 0x8086,
 502       .device_id = device->chipset_id,
 503    };
 504    memcpy(header.uuid, pdevice->pipeline_cache_uuid, VK_UUID_SIZE);
 505    blob_write_bytes(&blob, &header, sizeof(header));
 506
 507    uint32_t count = 0;
 508    intptr_t count_offset = blob_reserve_uint32(&blob);
 509    if (count_offset < 0) {
 510       *pDataSize = 0;
 511       blob_finish(&blob);
 512       return VK_INCOMPLETE;
 513    }
 514
 515    VkResult result = VK_SUCCESS;
 516    if (cache->cache) {
 517       hash_table_foreach(cache->cache, entry) {
 518          struct anv_shader_bin *shader = entry->data;
 519
 520          size_t save_size = blob.size;
 521          if (!anv_shader_bin_write_to_blob(shader, &blob)) {
 522             /* If it fails reset to the previous size and bail */
 523             blob.size = save_size;
 524             result = VK_INCOMPLETE;
 525             break;
 526          }
 527
 528          count++;
 529       }
 530    }
 531
 532    blob_overwrite_uint32(&blob, count_offset, count);
 533
 534    *pDataSize = blob.size;
 535
 536    blob_finish(&blob);
 537
 538    return result;
 539 }
 540
 541 VkResult anv_MergePipelineCaches(
 542     VkDevice                                    _device,
 543     VkPipelineCache                             destCache,
 544     uint32_t                                    srcCacheCount,
 545     const VkPipelineCache*                      pSrcCaches)
 546 {
 547    ANV_FROM_HANDLE(anv_pipeline_cache, dst, destCache);
 548
 549    if (!dst->cache)
 550       return VK_SUCCESS;
 551
 552    for (uint32_t i = 0; i < srcCacheCount; i++) {
 553       ANV_FROM_HANDLE(anv_pipeline_cache, src, pSrcCaches[i]);
 554       if (!src->cache)
 555          continue;
 556
 557       hash_table_foreach(src->cache, entry) {
 558          struct anv_shader_bin *bin = entry->data;
 559          assert(bin);
 560
 561          if (_mesa_hash_table_search(dst->cache, bin->key))
 562             continue;
 563
 564          anv_shader_bin_ref(bin);
 565          _mesa_hash_table_insert(dst->cache, bin->key, bin);
 566       }
 567    }
 568
 569    return VK_SUCCESS;
 570 }
 571
 572 struct anv_shader_bin *
 573 anv_device_search_for_kernel(struct anv_device *device,
 574                              struct anv_pipeline_cache *cache,
 575                              const void *key_data, uint32_t key_size)
 576 {
 577    struct anv_shader_bin *bin;
 578
 579    if (cache) {
 580       bin = anv_pipeline_cache_search(cache, key_data, key_size);
 581       if (bin)
 582          return bin;
 583    }
 584
 585 #ifdef ENABLE_SHADER_CACHE
 586    struct disk_cache *disk_cache = device->instance->physicalDevice.disk_cache;
 587    if (disk_cache && device->instance->pipeline_cache_enabled) {
 588       cache_key cache_key;
 589       disk_cache_compute_key(disk_cache, key_data, key_size, cache_key);
 590
 591       size_t buffer_size;
 592       uint8_t *buffer = disk_cache_get(disk_cache, cache_key, &buffer_size);
 593       if (buffer) {
 594          struct blob_reader blob;
 595          blob_reader_init(&blob, buffer, buffer_size);
 596          bin = anv_shader_bin_create_from_blob(device, &blob);
 597          free(buffer);
 598
 599          if (bin) {
 600             if (cache)
 601                anv_pipeline_cache_add_shader_bin(cache, bin);
 602             return bin;
 603          }
 604       }
 605    }
 606 #endif
 607
 608    return NULL;
 609 }
 610
 611 struct anv_shader_bin *
 612 anv_device_upload_kernel(struct anv_device *device,
 613                          struct anv_pipeline_cache *cache,
 614                          const void *key_data, uint32_t key_size,
 615                          const void *kernel_data, uint32_t kernel_size,
 616                          const void *constant_data,
 617                          uint32_t constant_data_size,
 618                          const struct brw_stage_prog_data *prog_data,
 619                          uint32_t prog_data_size,
 620                          const struct anv_pipeline_bind_map *bind_map)
 621 {
 622    struct anv_shader_bin *bin;
 623    if (cache) {
 624       bin = anv_pipeline_cache_upload_kernel(cache, key_data, key_size,
 625                                              kernel_data, kernel_size,
 626                                              constant_data, constant_data_size,
 627                                              prog_data, prog_data_size,
 628                                              bind_map);
 629    } else {
 630       bin = anv_shader_bin_create(device, key_data, key_size,
 631                                   kernel_data, kernel_size,
 632                                   constant_data, constant_data_size,
 633                                   prog_data, prog_data_size,
 634                                   prog_data->param, bind_map);
 635    }
 636
 637    if (bin == NULL)
 638       return NULL;
 639
 640 #ifdef ENABLE_SHADER_CACHE
 641    struct disk_cache *disk_cache = device->instance->physicalDevice.disk_cache;
 642    if (disk_cache) {
 643       struct blob binary;
 644       blob_init(&binary);
 645       anv_shader_bin_write_to_blob(bin, &binary);
 646
 647       if (!binary.out_of_memory) {
 648          cache_key cache_key;
 649          disk_cache_compute_key(disk_cache, key_data, key_size, cache_key);
 650
 651          disk_cache_put(disk_cache, cache_key, binary.data, binary.size, NULL);
 652       }
 653
 654       blob_finish(&binary);
 655    }
 656 #endif
 657
 658    return bin;
 659 }
 660
 661 struct serialized_nir {
 662    unsigned char sha1_key[20];
 663    size_t size;
 664    char data[0];
 665 };
 666
 667 struct nir_shader *
 668 anv_device_search_for_nir(struct anv_device *device,
 669                           struct anv_pipeline_cache *cache,
 670                           const nir_shader_compiler_options *nir_options,
 671                           unsigned char sha1_key[20],
 672                           void *mem_ctx)
 673 {
 674    if (cache && cache->nir_cache) {
 675       const struct serialized_nir *snir = NULL;
 676
 677       pthread_mutex_lock(&cache->mutex);
 678       struct hash_entry *entry =
 679          _mesa_hash_table_search(cache->nir_cache, sha1_key);
 680       if (entry)
 681          snir = entry->data;
 682       pthread_mutex_unlock(&cache->mutex);
 683
 684       if (snir) {
 685          struct blob_reader blob;
 686          blob_reader_init(&blob, snir->data, snir->size);
 687
 688          nir_shader *nir = nir_deserialize(mem_ctx, nir_options, &blob);
 689          if (blob.overrun) {
 690             ralloc_free(nir);
 691          } else {
 692             return nir;
 693          }
 694       }
 695    }
 696
 697    return NULL;
 698 }
 699
 700 void
 701 anv_device_upload_nir(struct anv_device *device,
 702                       struct anv_pipeline_cache *cache,
 703                       const struct nir_shader *nir,
 704                       unsigned char sha1_key[20])
 705 {
 706    if (cache && cache->nir_cache) {
 707       pthread_mutex_lock(&cache->mutex);
 708       struct hash_entry *entry =
 709          _mesa_hash_table_search(cache->nir_cache, sha1_key);
 710       pthread_mutex_unlock(&cache->mutex);
 711       if (entry)
 712          return;
 713
 714       struct blob blob;
 715       blob_init(&blob);
 716
 717       nir_serialize(&blob, nir);
 718       if (blob.out_of_memory) {
 719          blob_finish(&blob);
 720          return;
 721       }
 722
 723       pthread_mutex_lock(&cache->mutex);
 724       /* Because ralloc isn't thread-safe, we have to do all this inside the
 725        * lock.  We could unlock for the big memcpy but it's probably not worth
 726        * the hassle.
 727        */
 728       entry = _mesa_hash_table_search(cache->nir_cache, sha1_key);
 729       if (entry) {
 730          pthread_mutex_unlock(&cache->mutex);
 731          return;
 732       }
 733
 734       struct serialized_nir *snir =
 735          ralloc_size(cache->nir_cache, sizeof(*snir) + blob.size);
 736       memcpy(snir->sha1_key, sha1_key, 20);
 737       snir->size = blob.size;
 738       memcpy(snir->data, blob.data, blob.size);
 739
 740       _mesa_hash_table_insert(cache->nir_cache, snir->sha1_key, snir);
 741
 742       pthread_mutex_unlock(&cache->mutex);
 743    }
 744 }