src/intel/vulkan/anv_pipeline_cache.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "compiler/blob.h"
  25 #include "util/hash_table.h"
  26 #include "util/debug.h"
  27 #include "util/disk_cache.h"
  28 #include "util/mesa-sha1.h"
  29 #include "nir/nir_serialize.h"
  30 #include "anv_private.h"
  31
  32 struct anv_shader_bin *
  33 anv_shader_bin_create(struct anv_device *device,
  34                       const void *key_data, uint32_t key_size,
  35                       const void *kernel_data, uint32_t kernel_size,
  36                       const void *constant_data, uint32_t constant_data_size,
  37                       const struct brw_stage_prog_data *prog_data_in,
  38                       uint32_t prog_data_size, const void *prog_data_param_in,
  39                       const struct anv_pipeline_bind_map *bind_map)
  40 {
  41    struct anv_shader_bin *shader;
  42    struct anv_shader_bin_key *key;
  43    struct brw_stage_prog_data *prog_data;
  44    uint32_t *prog_data_param;
  45    struct anv_pipeline_binding *surface_to_descriptor, *sampler_to_descriptor;
  46
  47    ANV_MULTIALLOC(ma);
  48    anv_multialloc_add(&ma, &shader, 1);
  49    anv_multialloc_add_size(&ma, &key, sizeof(*key) + key_size);
  50    anv_multialloc_add_size(&ma, &prog_data, prog_data_size);
  51    anv_multialloc_add(&ma, &prog_data_param, prog_data_in->nr_params);
  52    anv_multialloc_add(&ma, &surface_to_descriptor,
  53                            bind_map->surface_count);
  54    anv_multialloc_add(&ma, &sampler_to_descriptor,
  55                            bind_map->sampler_count);
  56
  57    if (!anv_multialloc_alloc(&ma, &device->alloc,
  58                              VK_SYSTEM_ALLOCATION_SCOPE_DEVICE))
  59       return NULL;
  60
  61    shader->ref_cnt = 1;
  62
  63    key->size = key_size;
  64    memcpy(key->data, key_data, key_size);
  65    shader->key = key;
  66
  67    shader->kernel =
  68       anv_state_pool_alloc(&device->instruction_state_pool, kernel_size, 64);
  69    memcpy(shader->kernel.map, kernel_data, kernel_size);
  70    shader->kernel_size = kernel_size;
  71
  72    if (constant_data_size) {
  73       shader->constant_data =
  74          anv_state_pool_alloc(&device->dynamic_state_pool,
  75                               constant_data_size, 32);
  76       memcpy(shader->constant_data.map, constant_data, constant_data_size);
  77    } else {
  78       shader->constant_data = ANV_STATE_NULL;
  79    }
  80    shader->constant_data_size = constant_data_size;
  81
  82    memcpy(prog_data, prog_data_in, prog_data_size);
  83    memcpy(prog_data_param, prog_data_param_in,
  84           prog_data->nr_params * sizeof(*prog_data_param));
  85    prog_data->param = prog_data_param;
  86    shader->prog_data = prog_data;
  87    shader->prog_data_size = prog_data_size;
  88
  89    shader->bind_map = *bind_map;
  90    typed_memcpy(surface_to_descriptor, bind_map->surface_to_descriptor,
  91                 bind_map->surface_count);
  92    shader->bind_map.surface_to_descriptor = surface_to_descriptor;
  93    typed_memcpy(sampler_to_descriptor, bind_map->sampler_to_descriptor,
  94                 bind_map->sampler_count);
  95    shader->bind_map.sampler_to_descriptor = sampler_to_descriptor;
  96
  97    return shader;
  98 }
  99
 100 void
 101 anv_shader_bin_destroy(struct anv_device *device,
 102                        struct anv_shader_bin *shader)
 103 {
 104    assert(shader->ref_cnt == 0);
 105    anv_state_pool_free(&device->instruction_state_pool, shader->kernel);
 106    anv_state_pool_free(&device->dynamic_state_pool, shader->constant_data);
 107    vk_free(&device->alloc, shader);
 108 }
 109
 110 static bool
 111 anv_shader_bin_write_to_blob(const struct anv_shader_bin *shader,
 112                              struct blob *blob)
 113 {
 114    bool ok;
 115
 116    ok = blob_write_uint32(blob, shader->key->size);
 117    ok = blob_write_bytes(blob, shader->key->data, shader->key->size);
 118
 119    ok = blob_write_uint32(blob, shader->kernel_size);
 120    ok = blob_write_bytes(blob, shader->kernel.map, shader->kernel_size);
 121
 122    ok = blob_write_uint32(blob, shader->constant_data_size);
 123    ok = blob_write_bytes(blob, shader->constant_data.map,
 124                          shader->constant_data_size);
 125
 126    ok = blob_write_uint32(blob, shader->prog_data_size);
 127    ok = blob_write_bytes(blob, shader->prog_data, shader->prog_data_size);
 128    ok = blob_write_bytes(blob, shader->prog_data->param,
 129                                shader->prog_data->nr_params *
 130                                sizeof(*shader->prog_data->param));
 131
 132    ok = blob_write_uint32(blob, shader->bind_map.surface_count);
 133    ok = blob_write_uint32(blob, shader->bind_map.sampler_count);
 134    ok = blob_write_uint32(blob, shader->bind_map.image_count);
 135    ok = blob_write_bytes(blob, shader->bind_map.surface_to_descriptor,
 136                                shader->bind_map.surface_count *
 137                                sizeof(*shader->bind_map.surface_to_descriptor));
 138    ok = blob_write_bytes(blob, shader->bind_map.sampler_to_descriptor,
 139                                shader->bind_map.sampler_count *
 140                                sizeof(*shader->bind_map.sampler_to_descriptor));
 141
 142    return ok;
 143 }
 144
 145 static struct anv_shader_bin *
 146 anv_shader_bin_create_from_blob(struct anv_device *device,
 147                                 struct blob_reader *blob)
 148 {
 149    uint32_t key_size = blob_read_uint32(blob);
 150    const void *key_data = blob_read_bytes(blob, key_size);
 151
 152    uint32_t kernel_size = blob_read_uint32(blob);
 153    const void *kernel_data = blob_read_bytes(blob, kernel_size);
 154
 155    uint32_t constant_data_size = blob_read_uint32(blob);
 156    const void *constant_data = blob_read_bytes(blob, constant_data_size);
 157
 158    uint32_t prog_data_size = blob_read_uint32(blob);
 159    const struct brw_stage_prog_data *prog_data =
 160       blob_read_bytes(blob, prog_data_size);
 161    if (blob->overrun)
 162       return NULL;
 163    const void *prog_data_param =
 164       blob_read_bytes(blob, prog_data->nr_params * sizeof(*prog_data->param));
 165
 166    struct anv_pipeline_bind_map bind_map;
 167    bind_map.surface_count = blob_read_uint32(blob);
 168    bind_map.sampler_count = blob_read_uint32(blob);
 169    bind_map.image_count = blob_read_uint32(blob);
 170    bind_map.surface_to_descriptor = (void *)
 171       blob_read_bytes(blob, bind_map.surface_count *
 172                             sizeof(*bind_map.surface_to_descriptor));
 173    bind_map.sampler_to_descriptor = (void *)
 174       blob_read_bytes(blob, bind_map.sampler_count *
 175                             sizeof(*bind_map.sampler_to_descriptor));
 176
 177    if (blob->overrun)
 178       return NULL;
 179
 180    return anv_shader_bin_create(device,
 181                                 key_data, key_size,
 182                                 kernel_data, kernel_size,
 183                                 constant_data, constant_data_size,
 184                                 prog_data, prog_data_size, prog_data_param,
 185                                 &bind_map);
 186 }
 187
 188 /* Remaining work:
 189  *
 190  * - Compact binding table layout so it's tight and not dependent on
 191  *   descriptor set layout.
 192  *
 193  * - Review prog_data struct for size and cacheability: struct
 194  *   brw_stage_prog_data has binding_table which uses a lot of uint32_t for 8
 195  *   bit quantities etc; use bit fields for all bools, eg dual_src_blend.
 196  */
 197
 198 static uint32_t
 199 shader_bin_key_hash_func(const void *void_key)
 200 {
 201    const struct anv_shader_bin_key *key = void_key;
 202    return _mesa_hash_data(key->data, key->size);
 203 }
 204
 205 static bool
 206 shader_bin_key_compare_func(const void *void_a, const void *void_b)
 207 {
 208    const struct anv_shader_bin_key *a = void_a, *b = void_b;
 209    if (a->size != b->size)
 210       return false;
 211
 212    return memcmp(a->data, b->data, a->size) == 0;
 213 }
 214
 215 static uint32_t
 216 sha1_hash_func(const void *sha1)
 217 {
 218    return _mesa_hash_data(sha1, 20);
 219 }
 220
 221 static bool
 222 sha1_compare_func(const void *sha1_a, const void *sha1_b)
 223 {
 224    return memcmp(sha1_a, sha1_b, 20) == 0;
 225 }
 226
 227 void
 228 anv_pipeline_cache_init(struct anv_pipeline_cache *cache,
 229                         struct anv_device *device,
 230                         bool cache_enabled)
 231 {
 232    cache->device = device;
 233    pthread_mutex_init(&cache->mutex, NULL);
 234
 235    if (cache_enabled) {
 236       cache->cache = _mesa_hash_table_create(NULL, shader_bin_key_hash_func,
 237                                              shader_bin_key_compare_func);
 238       cache->nir_cache = _mesa_hash_table_create(NULL, sha1_hash_func,
 239                                                  sha1_compare_func);
 240    } else {
 241       cache->cache = NULL;
 242    }
 243 }
 244
 245 void
 246 anv_pipeline_cache_finish(struct anv_pipeline_cache *cache)
 247 {
 248    pthread_mutex_destroy(&cache->mutex);
 249
 250    if (cache->cache) {
 251       /* This is a bit unfortunate.  In order to keep things from randomly
 252        * going away, the shader cache has to hold a reference to all shader
 253        * binaries it contains.  We unref them when we destroy the cache.
 254        */
 255       hash_table_foreach(cache->cache, entry)
 256          anv_shader_bin_unref(cache->device, entry->data);
 257
 258       _mesa_hash_table_destroy(cache->cache, NULL);
 259    }
 260 }
 261
 262 static struct anv_shader_bin *
 263 anv_pipeline_cache_search_locked(struct anv_pipeline_cache *cache,
 264                                  const void *key_data, uint32_t key_size)
 265 {
 266    uint32_t vla[1 + DIV_ROUND_UP(key_size, sizeof(uint32_t))];
 267    struct anv_shader_bin_key *key = (void *)vla;
 268    key->size = key_size;
 269    memcpy(key->data, key_data, key_size);
 270
 271    struct hash_entry *entry = _mesa_hash_table_search(cache->cache, key);
 272    if (entry)
 273       return entry->data;
 274    else
 275       return NULL;
 276 }
 277
 278 struct anv_shader_bin *
 279 anv_pipeline_cache_search(struct anv_pipeline_cache *cache,
 280                           const void *key_data, uint32_t key_size)
 281 {
 282    if (!cache->cache)
 283       return NULL;
 284
 285    pthread_mutex_lock(&cache->mutex);
 286
 287    struct anv_shader_bin *shader =
 288       anv_pipeline_cache_search_locked(cache, key_data, key_size);
 289
 290    pthread_mutex_unlock(&cache->mutex);
 291
 292    /* We increment refcount before handing it to the caller */
 293    if (shader)
 294       anv_shader_bin_ref(shader);
 295
 296    return shader;
 297 }
 298
 299 static void
 300 anv_pipeline_cache_add_shader_bin(struct anv_pipeline_cache *cache,
 301                                   struct anv_shader_bin *bin)
 302 {
 303    if (!cache->cache)
 304       return;
 305
 306    pthread_mutex_lock(&cache->mutex);
 307
 308    struct hash_entry *entry = _mesa_hash_table_search(cache->cache, bin->key);
 309    if (entry == NULL) {
 310       /* Take a reference for the cache */
 311       anv_shader_bin_ref(bin);
 312       _mesa_hash_table_insert(cache->cache, bin->key, bin);
 313    }
 314
 315    pthread_mutex_unlock(&cache->mutex);
 316 }
 317
 318 static struct anv_shader_bin *
 319 anv_pipeline_cache_add_shader_locked(struct anv_pipeline_cache *cache,
 320                                      const void *key_data, uint32_t key_size,
 321                                      const void *kernel_data,
 322                                      uint32_t kernel_size,
 323                                      const void *constant_data,
 324                                      uint32_t constant_data_size,
 325                                      const struct brw_stage_prog_data *prog_data,
 326                                      uint32_t prog_data_size,
 327                                      const void *prog_data_param,
 328                                      const struct anv_pipeline_bind_map *bind_map)
 329 {
 330    struct anv_shader_bin *shader =
 331       anv_pipeline_cache_search_locked(cache, key_data, key_size);
 332    if (shader)
 333       return shader;
 334
 335    struct anv_shader_bin *bin =
 336       anv_shader_bin_create(cache->device, key_data, key_size,
 337                             kernel_data, kernel_size,
 338                             constant_data, constant_data_size,
 339                             prog_data, prog_data_size, prog_data_param,
 340                             bind_map);
 341    if (!bin)
 342       return NULL;
 343
 344    _mesa_hash_table_insert(cache->cache, bin->key, bin);
 345
 346    return bin;
 347 }
 348
 349 struct anv_shader_bin *
 350 anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache,
 351                                  const void *key_data, uint32_t key_size,
 352                                  const void *kernel_data, uint32_t kernel_size,
 353                                  const void *constant_data,
 354                                  uint32_t constant_data_size,
 355                                  const struct brw_stage_prog_data *prog_data,
 356                                  uint32_t prog_data_size,
 357                                  const struct anv_pipeline_bind_map *bind_map)
 358 {
 359    if (cache->cache) {
 360       pthread_mutex_lock(&cache->mutex);
 361
 362       struct anv_shader_bin *bin =
 363          anv_pipeline_cache_add_shader_locked(cache, key_data, key_size,
 364                                               kernel_data, kernel_size,
 365                                               constant_data, constant_data_size,
 366                                               prog_data, prog_data_size,
 367                                               prog_data->param, bind_map);
 368
 369       pthread_mutex_unlock(&cache->mutex);
 370
 371       /* We increment refcount before handing it to the caller */
 372       if (bin)
 373          anv_shader_bin_ref(bin);
 374
 375       return bin;
 376    } else {
 377       /* In this case, we're not caching it so the caller owns it entirely */
 378       return anv_shader_bin_create(cache->device, key_data, key_size,
 379                                    kernel_data, kernel_size,
 380                                    constant_data, constant_data_size,
 381                                    prog_data, prog_data_size,
 382                                    prog_data->param, bind_map);
 383    }
 384 }
 385
 386 struct cache_header {
 387    uint32_t header_size;
 388    uint32_t header_version;
 389    uint32_t vendor_id;
 390    uint32_t device_id;
 391    uint8_t  uuid[VK_UUID_SIZE];
 392 };
 393
 394 static void
 395 anv_pipeline_cache_load(struct anv_pipeline_cache *cache,
 396                         const void *data, size_t size)
 397 {
 398    struct anv_device *device = cache->device;
 399    struct anv_physical_device *pdevice = &device->instance->physicalDevice;
 400
 401    if (cache->cache == NULL)
 402       return;
 403
 404    struct blob_reader blob;
 405    blob_reader_init(&blob, data, size);
 406
 407    struct cache_header header;
 408    blob_copy_bytes(&blob, &header, sizeof(header));
 409    uint32_t count = blob_read_uint32(&blob);
 410    if (blob.overrun)
 411       return;
 412
 413    if (header.header_size < sizeof(header))
 414       return;
 415    if (header.header_version != VK_PIPELINE_CACHE_HEADER_VERSION_ONE)
 416       return;
 417    if (header.vendor_id != 0x8086)
 418       return;
 419    if (header.device_id != device->chipset_id)
 420       return;
 421    if (memcmp(header.uuid, pdevice->pipeline_cache_uuid, VK_UUID_SIZE) != 0)
 422       return;
 423
 424    for (uint32_t i = 0; i < count; i++) {
 425       struct anv_shader_bin *bin =
 426          anv_shader_bin_create_from_blob(device, &blob);
 427       if (!bin)
 428          break;
 429       _mesa_hash_table_insert(cache->cache, bin->key, bin);
 430    }
 431 }
 432
 433 VkResult anv_CreatePipelineCache(
 434     VkDevice                                    _device,
 435     const VkPipelineCacheCreateInfo*            pCreateInfo,
 436     const VkAllocationCallbacks*                pAllocator,
 437     VkPipelineCache*                            pPipelineCache)
 438 {
 439    ANV_FROM_HANDLE(anv_device, device, _device);
 440    struct anv_pipeline_cache *cache;
 441
 442    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO);
 443    assert(pCreateInfo->flags == 0);
 444
 445    cache = vk_alloc2(&device->alloc, pAllocator,
 446                        sizeof(*cache), 8,
 447                        VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
 448    if (cache == NULL)
 449       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 450
 451    anv_pipeline_cache_init(cache, device,
 452                            device->instance->pipeline_cache_enabled);
 453
 454    if (pCreateInfo->initialDataSize > 0)
 455       anv_pipeline_cache_load(cache,
 456                               pCreateInfo->pInitialData,
 457                               pCreateInfo->initialDataSize);
 458
 459    *pPipelineCache = anv_pipeline_cache_to_handle(cache);
 460
 461    return VK_SUCCESS;
 462 }
 463
 464 void anv_DestroyPipelineCache(
 465     VkDevice                                    _device,
 466     VkPipelineCache                             _cache,
 467     const VkAllocationCallbacks*                pAllocator)
 468 {
 469    ANV_FROM_HANDLE(anv_device, device, _device);
 470    ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache);
 471
 472    if (!cache)
 473       return;
 474
 475    anv_pipeline_cache_finish(cache);
 476
 477    vk_free2(&device->alloc, pAllocator, cache);
 478 }
 479
 480 VkResult anv_GetPipelineCacheData(
 481     VkDevice                                    _device,
 482     VkPipelineCache                             _cache,
 483     size_t*                                     pDataSize,
 484     void*                                       pData)
 485 {
 486    ANV_FROM_HANDLE(anv_device, device, _device);
 487    ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache);
 488    struct anv_physical_device *pdevice = &device->instance->physicalDevice;
 489
 490    struct blob blob;
 491    if (pData) {
 492       blob_init_fixed(&blob, pData, *pDataSize);
 493    } else {
 494       blob_init_fixed(&blob, NULL, SIZE_MAX);
 495    }
 496
 497    struct cache_header header = {
 498       .header_size = sizeof(struct cache_header),
 499       .header_version = VK_PIPELINE_CACHE_HEADER_VERSION_ONE,
 500       .vendor_id = 0x8086,
 501       .device_id = device->chipset_id,
 502    };
 503    memcpy(header.uuid, pdevice->pipeline_cache_uuid, VK_UUID_SIZE);
 504    blob_write_bytes(&blob, &header, sizeof(header));
 505
 506    uint32_t count = 0;
 507    intptr_t count_offset = blob_reserve_uint32(&blob);
 508    if (count_offset < 0) {
 509       *pDataSize = 0;
 510       blob_finish(&blob);
 511       return VK_INCOMPLETE;
 512    }
 513
 514    VkResult result = VK_SUCCESS;
 515    if (cache->cache) {
 516       hash_table_foreach(cache->cache, entry) {
 517          struct anv_shader_bin *shader = entry->data;
 518
 519          size_t save_size = blob.size;
 520          if (!anv_shader_bin_write_to_blob(shader, &blob)) {
 521             /* If it fails reset to the previous size and bail */
 522             blob.size = save_size;
 523             result = VK_INCOMPLETE;
 524             break;
 525          }
 526
 527          count++;
 528       }
 529    }
 530
 531    blob_overwrite_uint32(&blob, count_offset, count);
 532
 533    *pDataSize = blob.size;
 534
 535    blob_finish(&blob);
 536
 537    return result;
 538 }
 539
 540 VkResult anv_MergePipelineCaches(
 541     VkDevice                                    _device,
 542     VkPipelineCache                             destCache,
 543     uint32_t                                    srcCacheCount,
 544     const VkPipelineCache*                      pSrcCaches)
 545 {
 546    ANV_FROM_HANDLE(anv_pipeline_cache, dst, destCache);
 547
 548    if (!dst->cache)
 549       return VK_SUCCESS;
 550
 551    for (uint32_t i = 0; i < srcCacheCount; i++) {
 552       ANV_FROM_HANDLE(anv_pipeline_cache, src, pSrcCaches[i]);
 553       if (!src->cache)
 554          continue;
 555
 556       hash_table_foreach(src->cache, entry) {
 557          struct anv_shader_bin *bin = entry->data;
 558          assert(bin);
 559
 560          if (_mesa_hash_table_search(dst->cache, bin->key))
 561             continue;
 562
 563          anv_shader_bin_ref(bin);
 564          _mesa_hash_table_insert(dst->cache, bin->key, bin);
 565       }
 566    }
 567
 568    return VK_SUCCESS;
 569 }
 570
 571 struct anv_shader_bin *
 572 anv_device_search_for_kernel(struct anv_device *device,
 573                              struct anv_pipeline_cache *cache,
 574                              const void *key_data, uint32_t key_size)
 575 {
 576    struct anv_shader_bin *bin;
 577
 578    if (cache) {
 579       bin = anv_pipeline_cache_search(cache, key_data, key_size);
 580       if (bin)
 581          return bin;
 582    }
 583
 584 #ifdef ENABLE_SHADER_CACHE
 585    struct disk_cache *disk_cache = device->instance->physicalDevice.disk_cache;
 586    if (disk_cache && device->instance->pipeline_cache_enabled) {
 587       cache_key cache_key;
 588       disk_cache_compute_key(disk_cache, key_data, key_size, cache_key);
 589
 590       size_t buffer_size;
 591       uint8_t *buffer = disk_cache_get(disk_cache, cache_key, &buffer_size);
 592       if (buffer) {
 593          struct blob_reader blob;
 594          blob_reader_init(&blob, buffer, buffer_size);
 595          bin = anv_shader_bin_create_from_blob(device, &blob);
 596          free(buffer);
 597
 598          if (bin) {
 599             if (cache)
 600                anv_pipeline_cache_add_shader_bin(cache, bin);
 601             return bin;
 602          }
 603       }
 604    }
 605 #endif
 606
 607    return NULL;
 608 }
 609
 610 struct anv_shader_bin *
 611 anv_device_upload_kernel(struct anv_device *device,
 612                          struct anv_pipeline_cache *cache,
 613                          const void *key_data, uint32_t key_size,
 614                          const void *kernel_data, uint32_t kernel_size,
 615                          const void *constant_data,
 616                          uint32_t constant_data_size,
 617                          const struct brw_stage_prog_data *prog_data,
 618                          uint32_t prog_data_size,
 619                          const struct anv_pipeline_bind_map *bind_map)
 620 {
 621    struct anv_shader_bin *bin;
 622    if (cache) {
 623       bin = anv_pipeline_cache_upload_kernel(cache, key_data, key_size,
 624                                              kernel_data, kernel_size,
 625                                              constant_data, constant_data_size,
 626                                              prog_data, prog_data_size,
 627                                              bind_map);
 628    } else {
 629       bin = anv_shader_bin_create(device, key_data, key_size,
 630                                   kernel_data, kernel_size,
 631                                   constant_data, constant_data_size,
 632                                   prog_data, prog_data_size,
 633                                   prog_data->param, bind_map);
 634    }
 635
 636    if (bin == NULL)
 637       return NULL;
 638
 639 #ifdef ENABLE_SHADER_CACHE
 640    struct disk_cache *disk_cache = device->instance->physicalDevice.disk_cache;
 641    if (disk_cache) {
 642       struct blob binary;
 643       blob_init(&binary);
 644       anv_shader_bin_write_to_blob(bin, &binary);
 645
 646       if (!binary.out_of_memory) {
 647          cache_key cache_key;
 648          disk_cache_compute_key(disk_cache, key_data, key_size, cache_key);
 649
 650          disk_cache_put(disk_cache, cache_key, binary.data, binary.size, NULL);
 651       }
 652
 653       blob_finish(&binary);
 654    }
 655 #endif
 656
 657    return bin;
 658 }
 659
 660 struct serialized_nir {
 661    unsigned char sha1_key[20];
 662    size_t size;
 663    char data[0];
 664 };
 665
 666 struct nir_shader *
 667 anv_device_search_for_nir(struct anv_device *device,
 668                           struct anv_pipeline_cache *cache,
 669                           const nir_shader_compiler_options *nir_options,
 670                           unsigned char sha1_key[20],
 671                           void *mem_ctx)
 672 {
 673    if (cache) {
 674       const struct serialized_nir *snir = NULL;
 675
 676       pthread_mutex_lock(&cache->mutex);
 677       struct hash_entry *entry =
 678          _mesa_hash_table_search(cache->nir_cache, sha1_key);
 679       if (entry)
 680          snir = entry->data;
 681       pthread_mutex_unlock(&cache->mutex);
 682
 683       if (snir) {
 684          struct blob_reader blob;
 685          blob_reader_init(&blob, snir->data, snir->size);
 686
 687          nir_shader *nir = nir_deserialize(mem_ctx, nir_options, &blob);
 688          if (blob.overrun) {
 689             ralloc_free(nir);
 690          } else {
 691             return nir;
 692          }
 693       }
 694    }
 695
 696    return NULL;
 697 }
 698
 699 void
 700 anv_device_upload_nir(struct anv_device *device,
 701                       struct anv_pipeline_cache *cache,
 702                       const struct nir_shader *nir,
 703                       unsigned char sha1_key[20])
 704 {
 705    if (cache) {
 706       pthread_mutex_lock(&cache->mutex);
 707       struct hash_entry *entry =
 708          _mesa_hash_table_search(cache->nir_cache, sha1_key);
 709       pthread_mutex_unlock(&cache->mutex);
 710       if (entry)
 711          return;
 712
 713       struct blob blob;
 714       blob_init(&blob);
 715
 716       nir_serialize(&blob, nir);
 717       if (blob.out_of_memory) {
 718          blob_finish(&blob);
 719          return;
 720       }
 721
 722       pthread_mutex_lock(&cache->mutex);
 723       /* Because ralloc isn't thread-safe, we have to do all this inside the
 724        * lock.  We could unlock for the big memcpy but it's probably not worth
 725        * the hassle.
 726        */
 727       entry = _mesa_hash_table_search(cache->nir_cache, sha1_key);
 728       if (entry) {
 729          pthread_mutex_unlock(&cache->mutex);
 730          return;
 731       }
 732
 733       struct serialized_nir *snir =
 734          ralloc_size(cache->nir_cache, sizeof(*snir) + blob.size);
 735       memcpy(snir->sha1_key, sha1_key, 20);
 736       snir->size = blob.size;
 737       memcpy(snir->data, blob.data, blob.size);
 738
 739       _mesa_hash_table_insert(cache->nir_cache, snir->sha1_key, snir);
 740
 741       pthread_mutex_unlock(&cache->mutex);
 742    }
 743 }