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Fix a few typos
[mesa.git] / src / mesa / drivers / dri / i915 / i830_state.c
1 /**************************************************************************
2 *
3 * Copyright 2003 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/macros.h"
32 #include "main/enums.h"
33 #include "main/fbobject.h"
34 #include "main/dd.h"
35 #include "main/state.h"
36
37 #include "drivers/common/driverfuncs.h"
38
39 #include "intel_screen.h"
40 #include "intel_batchbuffer.h"
41 #include "intel_mipmap_tree.h"
42 #include "intel_fbo.h"
43 #include "intel_buffers.h"
44
45 #include "i830_context.h"
46 #include "i830_reg.h"
47
48 #define FILE_DEBUG_FLAG DEBUG_STATE
49
50 static void
51 i830StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint ref,
52 GLuint mask)
53 {
54 struct i830_context *i830 = i830_context(ctx);
55 int test = intel_translate_compare_func(func);
56
57 mask = mask & 0xff;
58
59 DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __func__,
60 _mesa_lookup_enum_by_nr(func), ref, mask);
61
62
63 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
64 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
65 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
66 STENCIL_TEST_MASK(mask));
67 i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK |
68 ENABLE_STENCIL_TEST_FUNC_MASK);
69 i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_REF_VALUE |
70 ENABLE_STENCIL_TEST_FUNC |
71 STENCIL_REF_VALUE(ref) |
72 STENCIL_TEST_FUNC(test));
73 }
74
75 static void
76 i830StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
77 {
78 struct i830_context *i830 = i830_context(ctx);
79
80 DBG("%s : mask 0x%x\n", __func__, mask);
81
82 mask = mask & 0xff;
83
84 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
85 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
86 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
87 STENCIL_WRITE_MASK(mask));
88 }
89
90 static void
91 i830StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum zfail,
92 GLenum zpass)
93 {
94 struct i830_context *i830 = i830_context(ctx);
95 int fop, dfop, dpop;
96
97 DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __func__,
98 _mesa_lookup_enum_by_nr(fail),
99 _mesa_lookup_enum_by_nr(zfail),
100 _mesa_lookup_enum_by_nr(zpass));
101
102 fop = 0;
103 dfop = 0;
104 dpop = 0;
105
106 switch (fail) {
107 case GL_KEEP:
108 fop = STENCILOP_KEEP;
109 break;
110 case GL_ZERO:
111 fop = STENCILOP_ZERO;
112 break;
113 case GL_REPLACE:
114 fop = STENCILOP_REPLACE;
115 break;
116 case GL_INCR:
117 fop = STENCILOP_INCRSAT;
118 break;
119 case GL_DECR:
120 fop = STENCILOP_DECRSAT;
121 break;
122 case GL_INCR_WRAP:
123 fop = STENCILOP_INCR;
124 break;
125 case GL_DECR_WRAP:
126 fop = STENCILOP_DECR;
127 break;
128 case GL_INVERT:
129 fop = STENCILOP_INVERT;
130 break;
131 default:
132 break;
133 }
134 switch (zfail) {
135 case GL_KEEP:
136 dfop = STENCILOP_KEEP;
137 break;
138 case GL_ZERO:
139 dfop = STENCILOP_ZERO;
140 break;
141 case GL_REPLACE:
142 dfop = STENCILOP_REPLACE;
143 break;
144 case GL_INCR:
145 dfop = STENCILOP_INCRSAT;
146 break;
147 case GL_DECR:
148 dfop = STENCILOP_DECRSAT;
149 break;
150 case GL_INCR_WRAP:
151 dfop = STENCILOP_INCR;
152 break;
153 case GL_DECR_WRAP:
154 dfop = STENCILOP_DECR;
155 break;
156 case GL_INVERT:
157 dfop = STENCILOP_INVERT;
158 break;
159 default:
160 break;
161 }
162 switch (zpass) {
163 case GL_KEEP:
164 dpop = STENCILOP_KEEP;
165 break;
166 case GL_ZERO:
167 dpop = STENCILOP_ZERO;
168 break;
169 case GL_REPLACE:
170 dpop = STENCILOP_REPLACE;
171 break;
172 case GL_INCR:
173 dpop = STENCILOP_INCRSAT;
174 break;
175 case GL_DECR:
176 dpop = STENCILOP_DECRSAT;
177 break;
178 case GL_INCR_WRAP:
179 dpop = STENCILOP_INCR;
180 break;
181 case GL_DECR_WRAP:
182 dpop = STENCILOP_DECR;
183 break;
184 case GL_INVERT:
185 dpop = STENCILOP_INVERT;
186 break;
187 default:
188 break;
189 }
190
191
192 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
193 i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_OPS_MASK);
194 i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_PARMS |
195 STENCIL_FAIL_OP(fop) |
196 STENCIL_PASS_DEPTH_FAIL_OP
197 (dfop) |
198 STENCIL_PASS_DEPTH_PASS_OP
199 (dpop));
200 }
201
202 static void
203 i830AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
204 {
205 struct i830_context *i830 = i830_context(ctx);
206 int test = intel_translate_compare_func(func);
207 GLubyte refByte;
208 GLuint refInt;
209
210 UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
211 refInt = (GLuint) refByte;
212
213 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
214 i830->state.Ctx[I830_CTXREG_STATE2] &= ~ALPHA_TEST_REF_MASK;
215 i830->state.Ctx[I830_CTXREG_STATE2] |= (ENABLE_ALPHA_TEST_FUNC |
216 ENABLE_ALPHA_REF_VALUE |
217 ALPHA_TEST_FUNC(test) |
218 ALPHA_REF_VALUE(refInt));
219 }
220
221 /**
222 * Makes sure that the proper enables are set for LogicOp, Independent Alpha
223 * Blend, and Blending. It needs to be called from numerous places where we
224 * could change the LogicOp or Independent Alpha Blend without subsequent
225 * calls to glEnable.
226 *
227 * \todo
228 * This function is substantially different from the old i830-specific driver.
229 * I'm not sure which is correct.
230 */
231 static void
232 i830EvalLogicOpBlendState(struct gl_context * ctx)
233 {
234 struct i830_context *i830 = i830_context(ctx);
235
236 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
237
238 if (ctx->Color.ColorLogicOpEnabled) {
239 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
240 ENABLE_LOGIC_OP_MASK);
241 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
242 ENABLE_LOGIC_OP);
243 }
244 else if (ctx->Color.BlendEnabled) {
245 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
246 ENABLE_LOGIC_OP_MASK);
247 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (ENABLE_COLOR_BLEND |
248 DISABLE_LOGIC_OP);
249 }
250 else {
251 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
252 ENABLE_LOGIC_OP_MASK);
253 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
254 DISABLE_LOGIC_OP);
255 }
256 }
257
258 static void
259 i830BlendColor(struct gl_context * ctx, const GLfloat color[4])
260 {
261 struct i830_context *i830 = i830_context(ctx);
262 GLubyte r, g, b, a;
263
264 DBG("%s\n", __func__);
265
266 UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
267 UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
268 UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
269 UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
270
271 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
272 i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] =
273 (a << 24) | (r << 16) | (g << 8) | b;
274 }
275
276 /**
277 * Sets both the blend equation (called "function" in i830 docs) and the
278 * blend function (called "factor" in i830 docs). This is done in a single
279 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
280 * change the interpretation of the blend function.
281 */
282 static void
283 i830_set_blend_state(struct gl_context * ctx)
284 {
285 struct i830_context *i830 = i830_context(ctx);
286 int funcA;
287 int funcRGB;
288 int eqnA;
289 int eqnRGB;
290 int iab;
291 int s1;
292
293
294 funcRGB =
295 SRC_BLND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].SrcRGB))
296 | DST_BLND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].DstRGB));
297
298 switch (ctx->Color.Blend[0].EquationRGB) {
299 case GL_FUNC_ADD:
300 eqnRGB = BLENDFUNC_ADD;
301 break;
302 case GL_MIN:
303 eqnRGB = BLENDFUNC_MIN;
304 funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
305 break;
306 case GL_MAX:
307 eqnRGB = BLENDFUNC_MAX;
308 funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
309 break;
310 case GL_FUNC_SUBTRACT:
311 eqnRGB = BLENDFUNC_SUB;
312 break;
313 case GL_FUNC_REVERSE_SUBTRACT:
314 eqnRGB = BLENDFUNC_RVRSE_SUB;
315 break;
316 default:
317 fprintf(stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
318 __func__, __LINE__, ctx->Color.Blend[0].EquationRGB);
319 return;
320 }
321
322
323 funcA = SRC_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].SrcA))
324 | DST_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].DstA));
325
326 switch (ctx->Color.Blend[0].EquationA) {
327 case GL_FUNC_ADD:
328 eqnA = BLENDFUNC_ADD;
329 break;
330 case GL_MIN:
331 eqnA = BLENDFUNC_MIN;
332 funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
333 break;
334 case GL_MAX:
335 eqnA = BLENDFUNC_MAX;
336 funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
337 break;
338 case GL_FUNC_SUBTRACT:
339 eqnA = BLENDFUNC_SUB;
340 break;
341 case GL_FUNC_REVERSE_SUBTRACT:
342 eqnA = BLENDFUNC_RVRSE_SUB;
343 break;
344 default:
345 fprintf(stderr, "[%s:%u] Invalid alpha blend equation (0x%04x).\n",
346 __func__, __LINE__, ctx->Color.Blend[0].EquationA);
347 return;
348 }
349
350 iab = eqnA | funcA
351 | _3DSTATE_INDPT_ALPHA_BLEND_CMD
352 | ENABLE_SRC_ABLEND_FACTOR | ENABLE_DST_ABLEND_FACTOR
353 | ENABLE_ALPHA_BLENDFUNC;
354 s1 = eqnRGB | funcRGB
355 | _3DSTATE_MODES_1_CMD
356 | ENABLE_SRC_BLND_FACTOR | ENABLE_DST_BLND_FACTOR
357 | ENABLE_COLR_BLND_FUNC;
358
359 if ((eqnA | funcA) != (eqnRGB | funcRGB))
360 iab |= ENABLE_INDPT_ALPHA_BLEND;
361 else
362 iab |= DISABLE_INDPT_ALPHA_BLEND;
363
364 if (iab != i830->state.Ctx[I830_CTXREG_IALPHAB] ||
365 s1 != i830->state.Ctx[I830_CTXREG_STATE1]) {
366 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
367 i830->state.Ctx[I830_CTXREG_IALPHAB] = iab;
368 i830->state.Ctx[I830_CTXREG_STATE1] = s1;
369 }
370
371 /* This will catch a logicop blend equation. It will also ensure
372 * independent alpha blend is really in the correct state (either enabled
373 * or disabled) if blending is already enabled.
374 */
375
376 i830EvalLogicOpBlendState(ctx);
377
378 if (0) {
379 fprintf(stderr,
380 "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n",
381 __func__, __LINE__, i830->state.Ctx[I830_CTXREG_STATE1],
382 i830->state.Ctx[I830_CTXREG_IALPHAB],
383 (ctx->Color.BlendEnabled) ? "en" : "dis");
384 }
385 }
386
387
388 static void
389 i830BlendEquationSeparate(struct gl_context * ctx, GLenum modeRGB, GLenum modeA)
390 {
391 DBG("%s -> %s, %s\n", __func__,
392 _mesa_lookup_enum_by_nr(modeRGB),
393 _mesa_lookup_enum_by_nr(modeA));
394
395 (void) modeRGB;
396 (void) modeA;
397 i830_set_blend_state(ctx);
398 }
399
400
401 static void
402 i830BlendFuncSeparate(struct gl_context * ctx, GLenum sfactorRGB,
403 GLenum dfactorRGB, GLenum sfactorA, GLenum dfactorA)
404 {
405 DBG("%s -> RGB(%s, %s) A(%s, %s)\n", __func__,
406 _mesa_lookup_enum_by_nr(sfactorRGB),
407 _mesa_lookup_enum_by_nr(dfactorRGB),
408 _mesa_lookup_enum_by_nr(sfactorA),
409 _mesa_lookup_enum_by_nr(dfactorA));
410
411 (void) sfactorRGB;
412 (void) dfactorRGB;
413 (void) sfactorA;
414 (void) dfactorA;
415 i830_set_blend_state(ctx);
416 }
417
418
419
420 static void
421 i830DepthFunc(struct gl_context * ctx, GLenum func)
422 {
423 struct i830_context *i830 = i830_context(ctx);
424 int test = intel_translate_compare_func(func);
425
426 DBG("%s\n", __func__);
427
428 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
429 i830->state.Ctx[I830_CTXREG_STATE3] &= ~DEPTH_TEST_FUNC_MASK;
430 i830->state.Ctx[I830_CTXREG_STATE3] |= (ENABLE_DEPTH_TEST_FUNC |
431 DEPTH_TEST_FUNC(test));
432 }
433
434 static void
435 i830DepthMask(struct gl_context * ctx, GLboolean flag)
436 {
437 struct i830_context *i830 = i830_context(ctx);
438
439 DBG("%s flag (%d)\n", __func__, flag);
440
441 if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
442 flag = false;
443
444 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
445
446 i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
447
448 if (flag && ctx->Depth.Test)
449 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DEPTH_WRITE;
450 else
451 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DEPTH_WRITE;
452 }
453
454 /** Called from ctx->Driver.DepthRange() */
455 static void
456 i830DepthRange(struct gl_context *ctx)
457 {
458 intelCalcViewport(ctx);
459 }
460
461 /* =============================================================
462 * Polygon stipple
463 *
464 * The i830 supports a 4x4 stipple natively, GL wants 32x32.
465 * Fortunately stipple is usually a repeating pattern.
466 */
467 static void
468 i830PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
469 {
470 struct i830_context *i830 = i830_context(ctx);
471 const GLubyte *m;
472 GLubyte p[4];
473 int i, j, k;
474 int active = (ctx->Polygon.StippleFlag &&
475 i830->intel.reduced_primitive == GL_TRIANGLES);
476 GLuint newMask;
477
478 if (active) {
479 I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
480 i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
481 }
482
483 /* Use the already unpacked stipple data from the context rather than the
484 * uninterpreted mask passed in.
485 */
486 mask = (const GLubyte *)ctx->PolygonStipple;
487 m = mask;
488
489 p[0] = mask[12] & 0xf;
490 p[0] |= p[0] << 4;
491 p[1] = mask[8] & 0xf;
492 p[1] |= p[1] << 4;
493 p[2] = mask[4] & 0xf;
494 p[2] |= p[2] << 4;
495 p[3] = mask[0] & 0xf;
496 p[3] |= p[3] << 4;
497
498 for (k = 0; k < 8; k++)
499 for (j = 3; j >= 0; j--)
500 for (i = 0; i < 4; i++, m++)
501 if (*m != p[j]) {
502 i830->intel.hw_stipple = 0;
503 return;
504 }
505
506 newMask = (((p[0] & 0xf) << 0) |
507 ((p[1] & 0xf) << 4) |
508 ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
509
510
511 if (newMask == 0xffff || newMask == 0x0) {
512 /* this is needed to make conform pass */
513 i830->intel.hw_stipple = 0;
514 return;
515 }
516
517 i830->state.Stipple[I830_STPREG_ST1] &= ~0xffff;
518 i830->state.Stipple[I830_STPREG_ST1] |= newMask;
519 i830->intel.hw_stipple = 1;
520
521 if (active)
522 i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
523 }
524
525
526 /* =============================================================
527 * Hardware clipping
528 */
529 static void
530 i830Scissor(struct gl_context * ctx)
531 {
532 struct i830_context *i830 = i830_context(ctx);
533 int x1, y1, x2, y2;
534
535 if (!ctx->DrawBuffer)
536 return;
537
538 DBG("%s %d,%d %dx%d\n", __func__,
539 ctx->Scissor.ScissorArray[0].X, ctx->Scissor.ScissorArray[0].Y,
540 ctx->Scissor.ScissorArray[0].Width, ctx->Scissor.ScissorArray[0].Height);
541
542 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
543 x1 = ctx->Scissor.ScissorArray[0].X;
544 y1 = ctx->DrawBuffer->Height - (ctx->Scissor.ScissorArray[0].Y
545 + ctx->Scissor.ScissorArray[0].Height);
546 x2 = ctx->Scissor.ScissorArray[0].X
547 + ctx->Scissor.ScissorArray[0].Width - 1;
548 y2 = y1 + ctx->Scissor.ScissorArray[0].Height - 1;
549 DBG("%s %d..%d,%d..%d (inverted)\n", __func__, x1, x2, y1, y2);
550 }
551 else {
552 /* FBO - not inverted
553 */
554 x1 = ctx->Scissor.ScissorArray[0].X;
555 y1 = ctx->Scissor.ScissorArray[0].Y;
556 x2 = ctx->Scissor.ScissorArray[0].X
557 + ctx->Scissor.ScissorArray[0].Width - 1;
558 y2 = ctx->Scissor.ScissorArray[0].Y
559 + ctx->Scissor.ScissorArray[0].Height - 1;
560 DBG("%s %d..%d,%d..%d (not inverted)\n", __func__, x1, x2, y1, y2);
561 }
562
563 x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
564 y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
565 x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
566 y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
567
568 DBG("%s %d..%d,%d..%d (clamped)\n", __func__, x1, x2, y1, y2);
569
570 I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
571 i830->state.Buffer[I830_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
572 i830->state.Buffer[I830_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
573 }
574
575 static void
576 i830LogicOp(struct gl_context * ctx, GLenum opcode)
577 {
578 struct i830_context *i830 = i830_context(ctx);
579 int tmp = intel_translate_logic_op(opcode);
580
581 DBG("%s\n", __func__);
582
583 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
584 i830->state.Ctx[I830_CTXREG_STATE4] &= ~LOGICOP_MASK;
585 i830->state.Ctx[I830_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
586 }
587
588
589
590 static void
591 i830CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
592 {
593 struct i830_context *i830 = i830_context(ctx);
594 GLuint mode;
595
596 DBG("%s\n", __func__);
597
598 if (!ctx->Polygon.CullFlag) {
599 mode = CULLMODE_NONE;
600 }
601 else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
602 mode = CULLMODE_CW;
603
604 if (ctx->Polygon.CullFaceMode == GL_FRONT)
605 mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
606 if (ctx->Polygon.FrontFace != GL_CCW)
607 mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
608 }
609 else {
610 mode = CULLMODE_BOTH;
611 }
612
613 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
614 i830->state.Ctx[I830_CTXREG_STATE3] &= ~CULLMODE_MASK;
615 i830->state.Ctx[I830_CTXREG_STATE3] |= ENABLE_CULL_MODE | mode;
616 }
617
618 static void
619 i830LineWidth(struct gl_context * ctx, GLfloat widthf)
620 {
621 struct i830_context *i830 = i830_context(ctx);
622 int width;
623 int state5;
624
625 DBG("%s\n", __func__);
626
627 width = (int) (widthf * 2);
628 width = CLAMP(width, 1, 15);
629
630 state5 = i830->state.Ctx[I830_CTXREG_STATE5] & ~FIXED_LINE_WIDTH_MASK;
631 state5 |= (ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(width));
632
633 if (state5 != i830->state.Ctx[I830_CTXREG_STATE5]) {
634 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
635 i830->state.Ctx[I830_CTXREG_STATE5] = state5;
636 }
637 }
638
639 static void
640 i830PointSize(struct gl_context * ctx, GLfloat size)
641 {
642 struct i830_context *i830 = i830_context(ctx);
643 GLint point_size = (int) size;
644
645 DBG("%s\n", __func__);
646
647 point_size = CLAMP(point_size, 1, 256);
648 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
649 i830->state.Ctx[I830_CTXREG_STATE5] &= ~FIXED_POINT_WIDTH_MASK;
650 i830->state.Ctx[I830_CTXREG_STATE5] |= (ENABLE_FIXED_POINT_WIDTH |
651 FIXED_POINT_WIDTH(point_size));
652 }
653
654
655 /* =============================================================
656 * Color masks
657 */
658
659 static void
660 i830ColorMask(struct gl_context * ctx,
661 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
662 {
663 struct i830_context *i830 = i830_context(ctx);
664 GLuint tmp = 0;
665
666 DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __func__, r, g, b, a);
667
668 tmp = ((i830->state.Ctx[I830_CTXREG_ENABLES_2] & ~WRITEMASK_MASK) |
669 ENABLE_COLOR_MASK |
670 ENABLE_COLOR_WRITE |
671 ((!r) << WRITEMASK_RED_SHIFT) |
672 ((!g) << WRITEMASK_GREEN_SHIFT) |
673 ((!b) << WRITEMASK_BLUE_SHIFT) | ((!a) << WRITEMASK_ALPHA_SHIFT));
674
675 if (tmp != i830->state.Ctx[I830_CTXREG_ENABLES_2]) {
676 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
677 i830->state.Ctx[I830_CTXREG_ENABLES_2] = tmp;
678 }
679 }
680
681 static void
682 update_specular(struct gl_context * ctx)
683 {
684 struct i830_context *i830 = i830_context(ctx);
685
686 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
687 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_SPEC_ADD_MASK;
688
689 if (_mesa_need_secondary_color(ctx))
690 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_SPEC_ADD;
691 else
692 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_SPEC_ADD;
693 }
694
695 static void
696 i830LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
697 {
698 DBG("%s\n", __func__);
699
700 if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
701 update_specular(ctx);
702 }
703 }
704
705 /* In Mesa 3.5 we can reliably do native flatshading.
706 */
707 static void
708 i830ShadeModel(struct gl_context * ctx, GLenum mode)
709 {
710 struct i830_context *i830 = i830_context(ctx);
711 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
712
713
714 #define SHADE_MODE_MASK ((1<<10)|(1<<8)|(1<<6)|(1<<4))
715
716 i830->state.Ctx[I830_CTXREG_STATE3] &= ~SHADE_MODE_MASK;
717
718 if (mode == GL_FLAT) {
719 i830->state.Ctx[I830_CTXREG_STATE3] |=
720 (ALPHA_SHADE_MODE(SHADE_MODE_FLAT) | FOG_SHADE_MODE(SHADE_MODE_FLAT)
721 | SPEC_SHADE_MODE(SHADE_MODE_FLAT) |
722 COLOR_SHADE_MODE(SHADE_MODE_FLAT));
723 }
724 else {
725 i830->state.Ctx[I830_CTXREG_STATE3] |=
726 (ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) |
727 FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
728 SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
729 COLOR_SHADE_MODE(SHADE_MODE_LINEAR));
730 }
731 }
732
733 /* =============================================================
734 * Fog
735 */
736 static void
737 i830Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
738 {
739 struct i830_context *i830 = i830_context(ctx);
740
741 DBG("%s\n", __func__);
742
743 if (pname == GL_FOG_COLOR) {
744 GLuint color = (((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
745 ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
746 ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
747
748 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
749 i830->state.Ctx[I830_CTXREG_FOGCOLOR] =
750 (_3DSTATE_FOG_COLOR_CMD | color);
751 }
752 }
753
754 /* =============================================================
755 */
756
757 static void
758 i830Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
759 {
760 struct i830_context *i830 = i830_context(ctx);
761
762 switch (cap) {
763 case GL_LIGHTING:
764 case GL_COLOR_SUM:
765 update_specular(ctx);
766 break;
767
768 case GL_ALPHA_TEST:
769 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
770 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_ALPHA_TEST_MASK;
771 if (state)
772 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_ALPHA_TEST;
773 else
774 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_ALPHA_TEST;
775
776 break;
777
778 case GL_BLEND:
779 i830EvalLogicOpBlendState(ctx);
780 break;
781
782 case GL_COLOR_LOGIC_OP:
783 i830EvalLogicOpBlendState(ctx);
784
785 /* Logicop doesn't seem to work at 16bpp:
786 */
787 if (i830->intel.ctx.Visual.rgbBits == 16)
788 FALLBACK(&i830->intel, I830_FALLBACK_LOGICOP, state);
789 break;
790
791 case GL_DITHER:
792 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
793 i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DITHER;
794
795 if (state)
796 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DITHER;
797 else
798 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DITHER;
799 break;
800
801 case GL_DEPTH_TEST:
802 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
803 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
804
805 if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
806 state = false;
807
808 if (state)
809 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
810 else
811 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
812
813 /* Also turn off depth writes when GL_DEPTH_TEST is disabled:
814 */
815 i830DepthMask(ctx, ctx->Depth.Mask);
816 break;
817
818 case GL_SCISSOR_TEST:
819 I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
820
821 if (state)
822 i830->state.Buffer[I830_DESTREG_SENABLE] =
823 (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
824 else
825 i830->state.Buffer[I830_DESTREG_SENABLE] =
826 (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
827
828 break;
829
830 case GL_LINE_SMOOTH:
831 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
832
833 i830->state.Ctx[I830_CTXREG_AA] &= ~AA_LINE_ENABLE;
834 if (state)
835 i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_ENABLE;
836 else
837 i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_DISABLE;
838 break;
839
840 case GL_FOG:
841 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
842 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_FOG_MASK;
843 if (state)
844 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_FOG;
845 else
846 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_FOG;
847 break;
848
849 case GL_CULL_FACE:
850 i830CullFaceFrontFace(ctx, 0);
851 break;
852
853 case GL_TEXTURE_2D:
854 break;
855
856 case GL_STENCIL_TEST:
857 {
858 bool hw_stencil = false;
859 if (ctx->DrawBuffer) {
860 struct intel_renderbuffer *irbStencil
861 = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
862 hw_stencil = (irbStencil && irbStencil->mt);
863 }
864 if (hw_stencil) {
865 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
866
867 if (state) {
868 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
869 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
870 }
871 else {
872 i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
873 i830->state.Ctx[I830_CTXREG_ENABLES_2] &=
874 ~ENABLE_STENCIL_WRITE;
875 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
876 i830->state.Ctx[I830_CTXREG_ENABLES_2] |=
877 DISABLE_STENCIL_WRITE;
878 }
879 }
880 else {
881 FALLBACK(&i830->intel, I830_FALLBACK_STENCIL, state);
882 }
883 }
884 break;
885
886 case GL_POLYGON_STIPPLE:
887 /* The stipple command worked on my 855GM box, but not my 845G.
888 * I'll do more testing later to find out exactly which hardware
889 * supports it. Disabled for now.
890 */
891 if (i830->intel.hw_stipple &&
892 i830->intel.reduced_primitive == GL_TRIANGLES) {
893 I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
894 i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
895 if (state)
896 i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
897 }
898 break;
899
900 default:
901 ;
902 }
903 }
904
905
906 static void
907 i830_init_packets(struct i830_context *i830)
908 {
909 /* Zero all state */
910 memset(&i830->state, 0, sizeof(i830->state));
911
912 /* Set default blend state */
913 i830->state.TexBlend[0][0] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
914 TEXPIPE_COLOR |
915 ENABLE_TEXOUTPUT_WRT_SEL |
916 TEXOP_OUTPUT_CURRENT |
917 DISABLE_TEX_CNTRL_STAGE |
918 TEXOP_SCALE_1X |
919 TEXOP_MODIFY_PARMS |
920 TEXOP_LAST_STAGE | TEXBLENDOP_ARG1);
921 i830->state.TexBlend[0][1] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
922 TEXPIPE_ALPHA |
923 ENABLE_TEXOUTPUT_WRT_SEL |
924 TEXOP_OUTPUT_CURRENT |
925 TEXOP_SCALE_1X |
926 TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
927 i830->state.TexBlend[0][2] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
928 TEXPIPE_COLOR |
929 TEXBLEND_ARG1 |
930 TEXBLENDARG_MODIFY_PARMS |
931 TEXBLENDARG_DIFFUSE);
932 i830->state.TexBlend[0][3] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
933 TEXPIPE_ALPHA |
934 TEXBLEND_ARG1 |
935 TEXBLENDARG_MODIFY_PARMS |
936 TEXBLENDARG_DIFFUSE);
937
938 i830->state.TexBlendWordsUsed[0] = 4;
939
940
941 i830->state.Ctx[I830_CTXREG_VF] = 0;
942 i830->state.Ctx[I830_CTXREG_VF2] = 0;
943
944 i830->state.Ctx[I830_CTXREG_AA] = (_3DSTATE_AA_CMD |
945 AA_LINE_ECAAR_WIDTH_ENABLE |
946 AA_LINE_ECAAR_WIDTH_1_0 |
947 AA_LINE_REGION_WIDTH_ENABLE |
948 AA_LINE_REGION_WIDTH_1_0 |
949 AA_LINE_DISABLE);
950
951 i830->state.Ctx[I830_CTXREG_ENABLES_1] = (_3DSTATE_ENABLES_1_CMD |
952 DISABLE_LOGIC_OP |
953 DISABLE_STENCIL_TEST |
954 DISABLE_DEPTH_BIAS |
955 DISABLE_SPEC_ADD |
956 DISABLE_FOG |
957 DISABLE_ALPHA_TEST |
958 DISABLE_COLOR_BLEND |
959 DISABLE_DEPTH_TEST);
960
961 #if 000 /* XXX all the stencil enable state is set in i830Enable(), right? */
962 if (i830->intel.hw_stencil) {
963 i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
964 ENABLE_STENCIL_WRITE |
965 ENABLE_TEX_CACHE |
966 ENABLE_DITHER |
967 ENABLE_COLOR_MASK |
968 /* set no color comps disabled */
969 ENABLE_COLOR_WRITE |
970 ENABLE_DEPTH_WRITE);
971 }
972 else
973 #endif
974 {
975 i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
976 DISABLE_STENCIL_WRITE |
977 ENABLE_TEX_CACHE |
978 ENABLE_DITHER |
979 ENABLE_COLOR_MASK |
980 /* set no color comps disabled */
981 ENABLE_COLOR_WRITE |
982 ENABLE_DEPTH_WRITE);
983 }
984
985 i830->state.Ctx[I830_CTXREG_STATE1] = (_3DSTATE_MODES_1_CMD |
986 ENABLE_COLR_BLND_FUNC |
987 BLENDFUNC_ADD |
988 ENABLE_SRC_BLND_FACTOR |
989 SRC_BLND_FACT(BLENDFACT_ONE) |
990 ENABLE_DST_BLND_FACTOR |
991 DST_BLND_FACT(BLENDFACT_ZERO));
992
993 i830->state.Ctx[I830_CTXREG_STATE2] = (_3DSTATE_MODES_2_CMD |
994 ENABLE_GLOBAL_DEPTH_BIAS |
995 GLOBAL_DEPTH_BIAS(0) |
996 ENABLE_ALPHA_TEST_FUNC |
997 ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS)
998 | ALPHA_REF_VALUE(0));
999
1000 i830->state.Ctx[I830_CTXREG_STATE3] = (_3DSTATE_MODES_3_CMD |
1001 ENABLE_DEPTH_TEST_FUNC |
1002 DEPTH_TEST_FUNC(COMPAREFUNC_LESS) |
1003 ENABLE_ALPHA_SHADE_MODE |
1004 ALPHA_SHADE_MODE(SHADE_MODE_LINEAR)
1005 | ENABLE_FOG_SHADE_MODE |
1006 FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
1007 ENABLE_SPEC_SHADE_MODE |
1008 SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
1009 ENABLE_COLOR_SHADE_MODE |
1010 COLOR_SHADE_MODE(SHADE_MODE_LINEAR)
1011 | ENABLE_CULL_MODE | CULLMODE_NONE);
1012
1013 i830->state.Ctx[I830_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
1014 ENABLE_LOGIC_OP_FUNC |
1015 LOGIC_OP_FUNC(LOGICOP_COPY) |
1016 ENABLE_STENCIL_TEST_MASK |
1017 STENCIL_TEST_MASK(0xff) |
1018 ENABLE_STENCIL_WRITE_MASK |
1019 STENCIL_WRITE_MASK(0xff));
1020
1021 i830->state.Ctx[I830_CTXREG_STENCILTST] = (_3DSTATE_STENCIL_TEST_CMD |
1022 ENABLE_STENCIL_PARMS |
1023 STENCIL_FAIL_OP(STENCILOP_KEEP)
1024 |
1025 STENCIL_PASS_DEPTH_FAIL_OP
1026 (STENCILOP_KEEP) |
1027 STENCIL_PASS_DEPTH_PASS_OP
1028 (STENCILOP_KEEP) |
1029 ENABLE_STENCIL_TEST_FUNC |
1030 STENCIL_TEST_FUNC
1031 (COMPAREFUNC_ALWAYS) |
1032 ENABLE_STENCIL_REF_VALUE |
1033 STENCIL_REF_VALUE(0));
1034
1035 i830->state.Ctx[I830_CTXREG_STATE5] = (_3DSTATE_MODES_5_CMD | FLUSH_TEXTURE_CACHE | ENABLE_SPRITE_POINT_TEX | SPRITE_POINT_TEX_OFF | ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(0x2) | /* 1.0 */
1036 ENABLE_FIXED_POINT_WIDTH |
1037 FIXED_POINT_WIDTH(1));
1038
1039 i830->state.Ctx[I830_CTXREG_IALPHAB] = (_3DSTATE_INDPT_ALPHA_BLEND_CMD |
1040 DISABLE_INDPT_ALPHA_BLEND |
1041 ENABLE_ALPHA_BLENDFUNC |
1042 ABLENDFUNC_ADD);
1043
1044 i830->state.Ctx[I830_CTXREG_FOGCOLOR] = (_3DSTATE_FOG_COLOR_CMD |
1045 FOG_COLOR_RED(0) |
1046 FOG_COLOR_GREEN(0) |
1047 FOG_COLOR_BLUE(0));
1048
1049 i830->state.Ctx[I830_CTXREG_BLENDCOLOR0] = _3DSTATE_CONST_BLEND_COLOR_CMD;
1050 i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] = 0;
1051
1052 i830->state.Ctx[I830_CTXREG_MCSB0] = _3DSTATE_MAP_COORD_SETBIND_CMD;
1053 i830->state.Ctx[I830_CTXREG_MCSB1] = (TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
1054 TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
1055 TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
1056 TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
1057
1058 i830->state.RasterRules[I830_RASTER_RULES] = (_3DSTATE_RASTER_RULES_CMD |
1059 ENABLE_POINT_RASTER_RULE |
1060 OGL_POINT_RASTER_RULE |
1061 ENABLE_LINE_STRIP_PROVOKE_VRTX |
1062 ENABLE_TRI_FAN_PROVOKE_VRTX |
1063 ENABLE_TRI_STRIP_PROVOKE_VRTX |
1064 LINE_STRIP_PROVOKE_VRTX(1) |
1065 TRI_FAN_PROVOKE_VRTX(2) |
1066 TRI_STRIP_PROVOKE_VRTX(2));
1067
1068
1069 i830->state.Stipple[I830_STPREG_ST0] = _3DSTATE_STIPPLE;
1070
1071 i830->state.Buffer[I830_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
1072 i830->state.Buffer[I830_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
1073 i830->state.Buffer[I830_DESTREG_SR1] = 0;
1074 i830->state.Buffer[I830_DESTREG_SR2] = 0;
1075 i830->state.Buffer[I830_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
1076 DISABLE_SCISSOR_RECT);
1077 }
1078
1079 void
1080 i830_update_provoking_vertex(struct gl_context * ctx)
1081 {
1082 struct i830_context *i830 = i830_context(ctx);
1083
1084 I830_STATECHANGE(i830, I830_UPLOAD_RASTER_RULES);
1085 i830->state.RasterRules[I830_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1086 TRI_FAN_PROVOKE_VRTX_MASK |
1087 TRI_STRIP_PROVOKE_VRTX_MASK);
1088
1089 /* _NEW_LIGHT */
1090 if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1091 i830->state.RasterRules[I830_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1092 TRI_FAN_PROVOKE_VRTX(2) |
1093 TRI_STRIP_PROVOKE_VRTX(2));
1094 } else {
1095 i830->state.RasterRules[I830_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1096 TRI_FAN_PROVOKE_VRTX(1) |
1097 TRI_STRIP_PROVOKE_VRTX(0));
1098 }
1099 }
1100
1101 /* Fallback to swrast for select and feedback.
1102 */
1103 static void
1104 i830RenderMode(struct gl_context *ctx, GLenum mode)
1105 {
1106 struct intel_context *intel = intel_context(ctx);
1107 FALLBACK(intel, INTEL_FALLBACK_RENDERMODE, (mode != GL_RENDER));
1108 }
1109
1110 void
1111 i830InitStateFuncs(struct dd_function_table *functions)
1112 {
1113 functions->AlphaFunc = i830AlphaFunc;
1114 functions->BlendColor = i830BlendColor;
1115 functions->BlendEquationSeparate = i830BlendEquationSeparate;
1116 functions->BlendFuncSeparate = i830BlendFuncSeparate;
1117 functions->ColorMask = i830ColorMask;
1118 functions->CullFace = i830CullFaceFrontFace;
1119 functions->DepthFunc = i830DepthFunc;
1120 functions->DepthMask = i830DepthMask;
1121 functions->Enable = i830Enable;
1122 functions->Fogfv = i830Fogfv;
1123 functions->FrontFace = i830CullFaceFrontFace;
1124 functions->LightModelfv = i830LightModelfv;
1125 functions->LineWidth = i830LineWidth;
1126 functions->LogicOpcode = i830LogicOp;
1127 functions->PointSize = i830PointSize;
1128 functions->PolygonStipple = i830PolygonStipple;
1129 functions->RenderMode = i830RenderMode;
1130 functions->Scissor = i830Scissor;
1131 functions->ShadeModel = i830ShadeModel;
1132 functions->StencilFuncSeparate = i830StencilFuncSeparate;
1133 functions->StencilMaskSeparate = i830StencilMaskSeparate;
1134 functions->StencilOpSeparate = i830StencilOpSeparate;
1135 functions->DepthRange = i830DepthRange;
1136 }
1137
1138 void
1139 i830InitState(struct i830_context *i830)
1140 {
1141 struct gl_context *ctx = &i830->intel.ctx;
1142
1143 i830_init_packets(i830);
1144
1145 _mesa_init_driver_state(ctx);
1146
1147 i830->state.emitted = 0;
1148 i830->state.active = (I830_UPLOAD_INVARIENT |
1149 I830_UPLOAD_RASTER_RULES |
1150 I830_UPLOAD_TEXBLEND(0) |
1151 I830_UPLOAD_STIPPLE |
1152 I830_UPLOAD_CTX | I830_UPLOAD_BUFFERS);
1153 }