src/mesa/drivers/dri/i915/i915_context.h

   1  /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef I915CONTEXT_INC
  29 #define I915CONTEXT_INC
  30
  31 #include "intel_context.h"
  32 #include "i915_reg.h"
  33
  34 #define I915_FALLBACK_TEXTURE            0x1000
  35 #define I915_FALLBACK_COLORMASK          0x2000
  36 #define I915_FALLBACK_STENCIL            0x4000
  37 #define I915_FALLBACK_STIPPLE            0x8000
  38 #define I915_FALLBACK_PROGRAM            0x10000
  39 #define I915_FALLBACK_LOGICOP            0x20000
  40 #define I915_FALLBACK_POLYGON_SMOOTH     0x40000
  41 #define I915_FALLBACK_POINT_SMOOTH       0x80000
  42 #define I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN  0x100000
  43
  44 #define I915_UPLOAD_CTX              0x1
  45 #define I915_UPLOAD_BUFFERS          0x2
  46 #define I915_UPLOAD_STIPPLE          0x4
  47 #define I915_UPLOAD_PROGRAM          0x8
  48 #define I915_UPLOAD_CONSTANTS        0x10
  49 #define I915_UPLOAD_FOG              0x20
  50 #define I915_UPLOAD_INVARIENT        0x40
  51 #define I915_UPLOAD_DEFAULTS         0x80
  52 #define I915_UPLOAD_RASTER_RULES     0x100
  53 #define I915_UPLOAD_TEX(i)           (0x00010000<<(i))
  54 #define I915_UPLOAD_TEX_ALL          (0x00ff0000)
  55 #define I915_UPLOAD_TEX_0_SHIFT      16
  56
  57
  58 /* State structure offsets - these will probably disappear.
  59  */
  60 #define I915_DESTREG_CBUFADDR0 0
  61 #define I915_DESTREG_CBUFADDR1 1
  62 #define I915_DESTREG_DBUFADDR0 3
  63 #define I915_DESTREG_DBUFADDR1 4
  64 #define I915_DESTREG_DV0 6
  65 #define I915_DESTREG_DV1 7
  66 #define I915_DESTREG_SENABLE 8
  67 #define I915_DESTREG_SR0 9
  68 #define I915_DESTREG_SR1 10
  69 #define I915_DESTREG_SR2 11
  70 #define I915_DESTREG_DRAWRECT0 12
  71 #define I915_DESTREG_DRAWRECT1 13
  72 #define I915_DESTREG_DRAWRECT2 14
  73 #define I915_DESTREG_DRAWRECT3 15
  74 #define I915_DESTREG_DRAWRECT4 16
  75 #define I915_DESTREG_DRAWRECT5 17
  76 #define I915_DEST_SETUP_SIZE 18
  77
  78 #define I915_CTXREG_STATE4              0
  79 #define I915_CTXREG_LI                  1
  80 #define I915_CTXREG_LIS2                        2
  81 #define I915_CTXREG_LIS4                        3
  82 #define I915_CTXREG_LIS5                        4
  83 #define I915_CTXREG_LIS6                        5
  84 #define I915_CTXREG_IAB                 6
  85 #define I915_CTXREG_BLENDCOLOR0         7
  86 #define I915_CTXREG_BLENDCOLOR1         8
  87 #define I915_CTXREG_BF_STENCIL_OPS      9
  88 #define I915_CTXREG_BF_STENCIL_MASKS    10
  89 #define I915_CTX_SETUP_SIZE             11
  90
  91 #define I915_FOGREG_COLOR               0
  92 #define I915_FOGREG_MODE0               1
  93 #define I915_FOGREG_MODE1               2
  94 #define I915_FOGREG_MODE2               3
  95 #define I915_FOGREG_MODE3               4
  96 #define I915_FOG_SETUP_SIZE             5
  97
  98 #define I915_STPREG_ST0        0
  99 #define I915_STPREG_ST1        1
 100 #define I915_STP_SETUP_SIZE    2
 101
 102 #define I915_TEXREG_MS3        1
 103 #define I915_TEXREG_MS4        2
 104 #define I915_TEXREG_SS2        3
 105 #define I915_TEXREG_SS3        4
 106 #define I915_TEXREG_SS4        5
 107 #define I915_TEX_SETUP_SIZE    6
 108
 109 #define I915_DEFREG_C0    0
 110 #define I915_DEFREG_C1    1
 111 #define I915_DEFREG_S0    2
 112 #define I915_DEFREG_S1    3
 113 #define I915_DEFREG_Z0    4
 114 #define I915_DEFREG_Z1    5
 115 #define I915_DEF_SETUP_SIZE    6
 116
 117 enum {
 118    I915_RASTER_RULES,
 119    I915_RASTER_RULES_SETUP_SIZE,
 120 };
 121
 122 #define I915_MAX_CONSTANT      32
 123 #define I915_CONSTANT_SIZE     (2+(4*I915_MAX_CONSTANT))
 124
 125 #define I915_MAX_INSN          (I915_MAX_DECL_INSN + \
 126                                 I915_MAX_TEX_INSN + \
 127                                 I915_MAX_ALU_INSN)
 128
 129 /* Maximum size of the program packet, which matches the limits on
 130  * decl, tex, and ALU instructions.
 131  */
 132 #define I915_PROGRAM_SIZE      (I915_MAX_INSN * 3 + 1)
 133
 134 /* Hardware version of a parsed fragment program.  "Derived" from the
 135  * mesa fragment_program struct.
 136  */
 137 struct i915_fragment_program
 138 {
 139    struct gl_fragment_program FragProg;
 140
 141    GLboolean translated;
 142    GLboolean params_uptodate;
 143    GLboolean on_hardware;
 144    GLboolean error;             /* If program is malformed for any reason. */
 145
 146    /** Record of which phases R registers were last written in. */
 147    GLuint register_phases[16];
 148    GLuint indirections;
 149    GLuint nr_tex_indirect;
 150    GLuint nr_tex_insn;
 151    GLuint nr_alu_insn;
 152    GLuint nr_decl_insn;
 153
 154
 155
 156
 157    /* TODO: split between the stored representation of a program and
 158     * the state used to build that representation.
 159     */
 160    GLcontext *ctx;
 161
 162    /* declarations contains the packet header. */
 163    GLuint declarations[I915_MAX_DECL_INSN * 3 + 1];
 164    GLuint program[(I915_MAX_TEX_INSN + I915_MAX_ALU_INSN) * 3];
 165
 166    GLfloat constant[I915_MAX_CONSTANT][4];
 167    GLuint constant_flags[I915_MAX_CONSTANT];
 168    GLuint nr_constants;
 169
 170    GLuint *csr;                 /* Cursor, points into program.
 171                                  */
 172
 173    GLuint *decl;                /* Cursor, points into declarations.
 174                                  */
 175
 176    GLuint decl_s;               /* flags for which s regs need to be decl'd */
 177    GLuint decl_t;               /* flags for which t regs need to be decl'd */
 178
 179    GLuint temp_flag;            /* Tracks temporary regs which are in
 180                                  * use.
 181                                  */
 182
 183    GLuint utemp_flag;           /* Tracks TYPE_U temporary regs which are in
 184                                  * use.
 185                                  */
 186
 187
 188    /* Track which R registers are "live" for each instruction.
 189     * A register is live between the time it's written to and the last time
 190     * it's read. */
 191    GLuint usedRegs[I915_MAX_INSN];
 192
 193    /* Helpers for i915_fragprog.c:
 194     */
 195    GLuint wpos_tex;
 196    GLboolean depth_written;
 197
 198    struct
 199    {
 200       GLuint reg;               /* Hardware constant idx */
 201       const GLfloat *values;    /* Pointer to tracked values */
 202    } param[I915_MAX_CONSTANT];
 203    GLuint nr_params;
 204 };
 205
 206
 207
 208
 209
 210
 211
 212 #define I915_TEX_UNITS 8
 213
 214
 215 struct i915_hw_state
 216 {
 217    GLuint Ctx[I915_CTX_SETUP_SIZE];
 218    GLuint Buffer[I915_DEST_SETUP_SIZE];
 219    GLuint Stipple[I915_STP_SETUP_SIZE];
 220    GLuint Fog[I915_FOG_SETUP_SIZE];
 221    GLuint Defaults[I915_DEF_SETUP_SIZE];
 222    GLuint RasterRules[I915_RASTER_RULES_SETUP_SIZE];
 223    GLuint Tex[I915_TEX_UNITS][I915_TEX_SETUP_SIZE];
 224    GLuint Constant[I915_CONSTANT_SIZE];
 225    GLuint ConstantSize;
 226    GLuint Program[I915_PROGRAM_SIZE];
 227    GLuint ProgramSize;
 228
 229    /* Region pointers for relocation:
 230     */
 231    struct intel_region *draw_region;
 232    struct intel_region *depth_region;
 233 /*    struct intel_region *tex_region[I915_TEX_UNITS]; */
 234
 235    /* Regions aren't actually that appropriate here as the memory may
 236     * be from a PBO or FBO.  Will have to do this for draw and depth for
 237     * FBO's...
 238     */
 239    dri_bo *tex_buffer[I915_TEX_UNITS];
 240    GLuint tex_offset[I915_TEX_UNITS];
 241
 242
 243    GLuint active;               /* I915_UPLOAD_* */
 244    GLuint emitted;              /* I915_UPLOAD_* */
 245 };
 246
 247 #define I915_FOG_PIXEL  2
 248 #define I915_FOG_VERTEX 1
 249 #define I915_FOG_NONE   0
 250
 251 struct i915_context
 252 {
 253    struct intel_context intel;
 254
 255    GLuint last_ReallyEnabled;
 256    GLuint vertex_fog;
 257    GLuint lodbias_ss2[MAX_TEXTURE_UNITS];
 258
 259
 260    struct i915_fragment_program *current_program;
 261
 262    struct i915_hw_state meta, initial, state, *current;
 263 };
 264
 265
 266 #define I915_STATECHANGE(i915, flag)                                    \
 267 do {                                                                    \
 268    INTEL_FIREVERTICES( &(i915)->intel );                                        \
 269    (i915)->state.emitted &= ~(flag);                                    \
 270 } while (0)
 271
 272 #define I915_ACTIVESTATE(i915, flag, mode)                      \
 273 do {                                                            \
 274    INTEL_FIREVERTICES( &(i915)->intel );                                \
 275    if (mode)                                                    \
 276       (i915)->state.active |= (flag);                           \
 277    else                                                         \
 278       (i915)->state.active &= ~(flag);                          \
 279 } while (0)
 280
 281
 282 /*======================================================================
 283  * i915_vtbl.c
 284  */
 285 extern void i915InitVtbl(struct i915_context *i915);
 286
 287 extern void
 288 i915_state_draw_region(struct intel_context *intel,
 289                        struct i915_hw_state *state,
 290                        struct intel_region *color_region,
 291                        struct intel_region *depth_region);
 292
 293
 294
 295 #define SZ_TO_HW(sz)  ((sz-2)&0x3)
 296 #define EMIT_SZ(sz)   (EMIT_1F + (sz) - 1)
 297 #define EMIT_ATTR( ATTR, STYLE, S4, SZ )                                \
 298 do {                                                                    \
 299    intel->vertex_attrs[intel->vertex_attr_count].attrib = (ATTR);       \
 300    intel->vertex_attrs[intel->vertex_attr_count].format = (STYLE);      \
 301    s4 |= S4;                                                            \
 302    intel->vertex_attr_count++;                                          \
 303    offset += (SZ);                                                      \
 304 } while (0)
 305
 306 #define EMIT_PAD( N )                                                   \
 307 do {                                                                    \
 308    intel->vertex_attrs[intel->vertex_attr_count].attrib = 0;            \
 309    intel->vertex_attrs[intel->vertex_attr_count].format = EMIT_PAD;     \
 310    intel->vertex_attrs[intel->vertex_attr_count].offset = (N);          \
 311    intel->vertex_attr_count++;                                          \
 312    offset += (N);                                                       \
 313 } while (0)
 314
 315
 316
 317 /*======================================================================
 318  * i915_context.c
 319  */
 320 extern GLboolean i915CreateContext(const __GLcontextModes * mesaVis,
 321                                    __DRIcontext * driContextPriv,
 322                                    void *sharedContextPrivate);
 323
 324
 325 /*======================================================================
 326  * i915_debug.c
 327  */
 328 extern void i915_disassemble_program(const GLuint * program, GLuint sz);
 329 extern void i915_print_ureg(const char *msg, GLuint ureg);
 330
 331
 332 /*======================================================================
 333  * i915_state.c
 334  */
 335 extern void i915InitStateFunctions(struct dd_function_table *functions);
 336 extern void i915InitState(struct i915_context *i915);
 337 extern void i915_update_fog(GLcontext * ctx);
 338 extern void i915_update_stencil(GLcontext * ctx);
 339 extern void i915_update_provoking_vertex(GLcontext *ctx);
 340
 341
 342 /*======================================================================
 343  * i915_tex.c
 344  */
 345 extern void i915UpdateTextureState(struct intel_context *intel);
 346 extern void i915InitTextureFuncs(struct dd_function_table *functions);
 347
 348 /*======================================================================
 349  * i915_metaops.c
 350  */
 351 void i915InitMetaFuncs(struct i915_context *i915);
 352
 353
 354 /*======================================================================
 355  * i915_fragprog.c
 356  */
 357 extern void i915ValidateFragmentProgram(struct i915_context *i915);
 358 extern void i915InitFragProgFuncs(struct dd_function_table *functions);
 359
 360 /*======================================================================
 361  * Inline conversion functions.  These are better-typed than the
 362  * macros used previously:
 363  */
 364 static INLINE struct i915_context *
 365 i915_context(GLcontext * ctx)
 366 {
 367    return (struct i915_context *) ctx;
 368 }
 369
 370
 371
 372 #define I915_CONTEXT(ctx)       i915_context(ctx)
 373
 374
 375
 376 #endif