src/mesa/drivers/dri/i915/i915_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 VMware, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/macros.h"
  32 #include "main/enums.h"
  33 #include "main/fbobject.h"
  34 #include "main/dd.h"
  35 #include "main/state.h"
  36 #include "main/stencil.h"
  37 #include "main/viewport.h"
  38 #include "tnl/tnl.h"
  39 #include "tnl/t_context.h"
  40
  41 #include "drivers/common/driverfuncs.h"
  42
  43 #include "intel_fbo.h"
  44 #include "intel_screen.h"
  45 #include "intel_batchbuffer.h"
  46 #include "intel_buffers.h"
  47
  48 #include "i915_context.h"
  49 #include "i915_reg.h"
  50
  51 #define FILE_DEBUG_FLAG DEBUG_STATE
  52
  53 void
  54 i915_update_stencil(struct gl_context * ctx)
  55 {
  56    struct i915_context *i915 = I915_CONTEXT(ctx);
  57    GLuint front_ref, front_writemask, front_mask;
  58    GLenum front_func, front_fail, front_pass_z_fail, front_pass_z_pass;
  59    GLuint back_ref, back_writemask, back_mask;
  60    GLenum back_func, back_fail, back_pass_z_fail, back_pass_z_pass;
  61    GLuint dirty = 0;
  62
  63    /* The 915 considers CW to be "front" for two-sided stencil, so choose
  64     * appropriately.
  65     */
  66    /* _NEW_POLYGON | _NEW_STENCIL */
  67    if (ctx->Polygon.FrontFace == GL_CW) {
  68       front_ref = _mesa_get_stencil_ref(ctx, 0);
  69       front_mask = ctx->Stencil.ValueMask[0];
  70       front_writemask = ctx->Stencil.WriteMask[0];
  71       front_func = ctx->Stencil.Function[0];
  72       front_fail = ctx->Stencil.FailFunc[0];
  73       front_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  74       front_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  75       back_ref = _mesa_get_stencil_ref(ctx, ctx->Stencil._BackFace);
  76       back_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  77       back_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  78       back_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  79       back_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  80       back_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  81       back_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  82    } else {
  83       front_ref = _mesa_get_stencil_ref(ctx, ctx->Stencil._BackFace);
  84       front_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  85       front_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  86       front_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  87       front_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  88       front_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  89       front_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  90       back_ref = _mesa_get_stencil_ref(ctx, 0);
  91       back_mask = ctx->Stencil.ValueMask[0];
  92       back_writemask = ctx->Stencil.WriteMask[0];
  93       back_func = ctx->Stencil.Function[0];
  94       back_fail = ctx->Stencil.FailFunc[0];
  95       back_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  96       back_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  97    }
  98 #define set_ctx_bits(reg, mask, set) do{ \
  99    GLuint dw = i915->state.Ctx[reg]; \
 100    dw &= ~(mask); \
 101    dw |= (set); \
 102    dirty |= dw != i915->state.Ctx[reg]; \
 103    i915->state.Ctx[reg] = dw; \
 104 } while(0)
 105
 106    /* Set front state. */
 107    set_ctx_bits(I915_CTXREG_STATE4,
 108                 MODE4_ENABLE_STENCIL_TEST_MASK |
 109                 MODE4_ENABLE_STENCIL_WRITE_MASK,
 110                 ENABLE_STENCIL_TEST_MASK |
 111                 ENABLE_STENCIL_WRITE_MASK |
 112                 STENCIL_TEST_MASK(front_mask) |
 113                 STENCIL_WRITE_MASK(front_writemask));
 114
 115    set_ctx_bits(I915_CTXREG_LIS5,
 116                 S5_STENCIL_REF_MASK |
 117                 S5_STENCIL_TEST_FUNC_MASK |
 118                 S5_STENCIL_FAIL_MASK |
 119                 S5_STENCIL_PASS_Z_FAIL_MASK |
 120                 S5_STENCIL_PASS_Z_PASS_MASK,
 121                 (front_ref << S5_STENCIL_REF_SHIFT) |
 122                 (intel_translate_compare_func(front_func) << S5_STENCIL_TEST_FUNC_SHIFT) |
 123                 (intel_translate_stencil_op(front_fail) << S5_STENCIL_FAIL_SHIFT) |
 124                 (intel_translate_stencil_op(front_pass_z_fail) <<
 125                  S5_STENCIL_PASS_Z_FAIL_SHIFT) |
 126                 (intel_translate_stencil_op(front_pass_z_pass) <<
 127                  S5_STENCIL_PASS_Z_PASS_SHIFT));
 128
 129    /* Set back state if different from front. */
 130    if (ctx->Stencil._TestTwoSide) {
 131       set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
 132                    BFO_STENCIL_REF_MASK |
 133                    BFO_STENCIL_TEST_MASK |
 134                    BFO_STENCIL_FAIL_MASK |
 135                    BFO_STENCIL_PASS_Z_FAIL_MASK |
 136                    BFO_STENCIL_PASS_Z_PASS_MASK,
 137                    BFO_STENCIL_TWO_SIDE |
 138                    (back_ref << BFO_STENCIL_REF_SHIFT) |
 139                    (intel_translate_compare_func(back_func) << BFO_STENCIL_TEST_SHIFT) |
 140                    (intel_translate_stencil_op(back_fail) << BFO_STENCIL_FAIL_SHIFT) |
 141                    (intel_translate_stencil_op(back_pass_z_fail) <<
 142                     BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
 143                    (intel_translate_stencil_op(back_pass_z_pass) <<
 144                     BFO_STENCIL_PASS_Z_PASS_SHIFT));
 145
 146       set_ctx_bits(I915_CTXREG_BF_STENCIL_MASKS,
 147                    BFM_STENCIL_TEST_MASK_MASK |
 148                    BFM_STENCIL_WRITE_MASK_MASK,
 149                    BFM_STENCIL_TEST_MASK(back_mask) |
 150                    BFM_STENCIL_WRITE_MASK(back_writemask));
 151    } else {
 152       set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
 153                    BFO_STENCIL_TWO_SIDE, 0);
 154    }
 155
 156 #undef set_ctx_bits
 157
 158    if (dirty)
 159       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 160 }
 161
 162 static void
 163 i915StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint ref,
 164                         GLuint mask)
 165 {
 166 }
 167
 168 static void
 169 i915StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
 170 {
 171 }
 172
 173 static void
 174 i915StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum zfail,
 175                       GLenum zpass)
 176 {
 177 }
 178
 179 static void
 180 i915AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
 181 {
 182    struct i915_context *i915 = I915_CONTEXT(ctx);
 183    int test = intel_translate_compare_func(func);
 184    GLubyte refByte;
 185    GLuint dw;
 186
 187    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 188
 189    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 190    dw &= ~(S6_ALPHA_TEST_FUNC_MASK | S6_ALPHA_REF_MASK);
 191    dw |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
 192           (((GLuint) refByte) << S6_ALPHA_REF_SHIFT));
 193    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 194       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 195       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 196    }
 197 }
 198
 199 /* This function makes sure that the proper enables are
 200  * set for LogicOp, Independent Alpha Blend, and Blending.
 201  * It needs to be called from numerous places where we
 202  * could change the LogicOp or Independent Alpha Blend without subsequent
 203  * calls to glEnable.
 204  */
 205 static void
 206 i915EvalLogicOpBlendState(struct gl_context * ctx)
 207 {
 208    struct i915_context *i915 = I915_CONTEXT(ctx);
 209    GLuint dw0, dw1;
 210
 211    dw0 = i915->state.Ctx[I915_CTXREG_LIS5];
 212    dw1 = i915->state.Ctx[I915_CTXREG_LIS6];
 213
 214    if (ctx->Color.ColorLogicOpEnabled) {
 215       dw0 |= S5_LOGICOP_ENABLE;
 216       dw1 &= ~S6_CBUF_BLEND_ENABLE;
 217    }
 218    else {
 219       dw0 &= ~S5_LOGICOP_ENABLE;
 220
 221       if (ctx->Color.BlendEnabled) {
 222          dw1 |= S6_CBUF_BLEND_ENABLE;
 223       }
 224       else {
 225          dw1 &= ~S6_CBUF_BLEND_ENABLE;
 226       }
 227    }
 228    if (dw0 != i915->state.Ctx[I915_CTXREG_LIS5] ||
 229        dw1 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 230       i915->state.Ctx[I915_CTXREG_LIS5] = dw0;
 231       i915->state.Ctx[I915_CTXREG_LIS6] = dw1;
 232
 233       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 234    }
 235 }
 236
 237 static void
 238 i915BlendColor(struct gl_context * ctx, const GLfloat color[4])
 239 {
 240    struct i915_context *i915 = I915_CONTEXT(ctx);
 241    GLubyte r, g, b, a;
 242    GLuint dw;
 243
 244    DBG("%s\n", __func__);
 245
 246    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 247    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 248    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 249    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 250
 251    dw = (a << 24) | (r << 16) | (g << 8) | b;
 252    if (dw != i915->state.Blend[I915_BLENDREG_BLENDCOLOR1]) {
 253       i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = dw;
 254       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 255    }
 256 }
 257
 258
 259 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
 260 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
 261 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
 262 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
 263
 264
 265
 266 static GLuint
 267 translate_blend_equation(GLenum mode)
 268 {
 269    switch (mode) {
 270    case GL_FUNC_ADD:
 271       return BLENDFUNC_ADD;
 272    case GL_MIN:
 273       return BLENDFUNC_MIN;
 274    case GL_MAX:
 275       return BLENDFUNC_MAX;
 276    case GL_FUNC_SUBTRACT:
 277       return BLENDFUNC_SUBTRACT;
 278    case GL_FUNC_REVERSE_SUBTRACT:
 279       return BLENDFUNC_REVERSE_SUBTRACT;
 280    default:
 281       return 0;
 282    }
 283 }
 284
 285 static void
 286 i915UpdateBlendState(struct gl_context * ctx)
 287 {
 288    struct i915_context *i915 = I915_CONTEXT(ctx);
 289    GLuint iab = (i915->state.Blend[I915_BLENDREG_IAB] &
 290                  ~(IAB_SRC_FACTOR_MASK |
 291                    IAB_DST_FACTOR_MASK |
 292                    (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
 293
 294    GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
 295                   ~(S6_CBUF_SRC_BLEND_FACT_MASK |
 296                     S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
 297
 298    GLuint eqRGB = ctx->Color.Blend[0].EquationRGB;
 299    GLuint eqA = ctx->Color.Blend[0].EquationA;
 300    GLuint srcRGB = ctx->Color.Blend[0].SrcRGB;
 301    GLuint dstRGB = ctx->Color.Blend[0].DstRGB;
 302    GLuint srcA = ctx->Color.Blend[0].SrcA;
 303    GLuint dstA = ctx->Color.Blend[0].DstA;
 304
 305    if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 306       srcRGB = dstRGB = GL_ONE;
 307    }
 308
 309    if (eqA == GL_MIN || eqA == GL_MAX) {
 310       srcA = dstA = GL_ONE;
 311    }
 312
 313    lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
 314    lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
 315    lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
 316
 317    iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
 318    iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
 319    iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
 320
 321    if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
 322       iab |= IAB_ENABLE;
 323
 324    if (iab != i915->state.Blend[I915_BLENDREG_IAB]) {
 325       i915->state.Blend[I915_BLENDREG_IAB] = iab;
 326       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 327    }
 328    if (lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 329       i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
 330       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 331    }
 332
 333    /* This will catch a logicop blend equation */
 334    i915EvalLogicOpBlendState(ctx);
 335 }
 336
 337
 338 static void
 339 i915BlendFuncSeparate(struct gl_context * ctx, GLenum srcRGB,
 340                       GLenum dstRGB, GLenum srcA, GLenum dstA)
 341 {
 342    i915UpdateBlendState(ctx);
 343 }
 344
 345
 346 static void
 347 i915BlendEquationSeparate(struct gl_context * ctx, GLenum eqRGB, GLenum eqA)
 348 {
 349    i915UpdateBlendState(ctx);
 350 }
 351
 352
 353 static void
 354 i915DepthFunc(struct gl_context * ctx, GLenum func)
 355 {
 356    struct i915_context *i915 = I915_CONTEXT(ctx);
 357    int test = intel_translate_compare_func(func);
 358    GLuint dw;
 359
 360    DBG("%s\n", __func__);
 361
 362    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 363    dw &= ~S6_DEPTH_TEST_FUNC_MASK;
 364    dw |= test << S6_DEPTH_TEST_FUNC_SHIFT;
 365    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 366       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 367       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 368    }
 369 }
 370
 371 static void
 372 i915DepthMask(struct gl_context * ctx, GLboolean flag)
 373 {
 374    struct i915_context *i915 = I915_CONTEXT(ctx);
 375    GLuint dw;
 376
 377    DBG("%s flag (%d)\n", __func__, flag);
 378
 379    if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
 380       flag = false;
 381
 382    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 383    if (flag && ctx->Depth.Test)
 384       dw |= S6_DEPTH_WRITE_ENABLE;
 385    else
 386       dw &= ~S6_DEPTH_WRITE_ENABLE;
 387    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 388       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 389       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 390    }
 391 }
 392
 393
 394
 395 /**
 396  * Update the viewport transformation matrix.  Depends on:
 397  *  - viewport pos/size
 398  *  - depthrange
 399  *  - window pos/size or FBO size
 400  */
 401 void
 402 intelCalcViewport(struct gl_context * ctx)
 403 {
 404    struct intel_context *intel = intel_context(ctx);
 405    double scale[3], translate[3];
 406
 407    _mesa_get_viewport_xform(ctx, 0, scale, translate);
 408
 409    if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
 410       scale[1] = -scale[1];
 411       translate[1] = ctx->DrawBuffer->Height - translate[1];
 412    }
 413
 414    _math_matrix_viewport(&intel->ViewportMatrix,
 415                          scale, translate, 1.0);
 416 }
 417
 418
 419 /** Called from ctx->Driver.DepthRange() */
 420 static void
 421 i915DepthRange(struct gl_context *ctx)
 422 {
 423    intelCalcViewport(ctx);
 424 }
 425
 426
 427 /* =============================================================
 428  * Polygon stipple
 429  *
 430  * The i915 supports a 4x4 stipple natively, GL wants 32x32.
 431  * Fortunately stipple is usually a repeating pattern.
 432  */
 433 static void
 434 i915PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
 435 {
 436    struct i915_context *i915 = I915_CONTEXT(ctx);
 437    const GLubyte *m;
 438    GLubyte p[4];
 439    int i, j, k;
 440    int active = (ctx->Polygon.StippleFlag &&
 441                  i915->intel.reduced_primitive == GL_TRIANGLES);
 442    GLuint newMask;
 443
 444    if (active) {
 445       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 446       i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 447    }
 448
 449    /* Use the already unpacked stipple data from the context rather than the
 450     * uninterpreted mask passed in.
 451     */
 452    mask = (const GLubyte *)ctx->PolygonStipple;
 453    m = mask;
 454
 455    p[0] = mask[12] & 0xf;
 456    p[0] |= p[0] << 4;
 457    p[1] = mask[8] & 0xf;
 458    p[1] |= p[1] << 4;
 459    p[2] = mask[4] & 0xf;
 460    p[2] |= p[2] << 4;
 461    p[3] = mask[0] & 0xf;
 462    p[3] |= p[3] << 4;
 463
 464    for (k = 0; k < 8; k++)
 465       for (j = 3; j >= 0; j--)
 466          for (i = 0; i < 4; i++, m++)
 467             if (*m != p[j]) {
 468                i915->intel.hw_stipple = 0;
 469                return;
 470             }
 471
 472    newMask = (((p[0] & 0xf) << 0) |
 473               ((p[1] & 0xf) << 4) |
 474               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 475
 476
 477    if (newMask == 0xffff || newMask == 0x0) {
 478       /* this is needed to make conform pass */
 479       i915->intel.hw_stipple = 0;
 480       return;
 481    }
 482
 483    i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
 484    i915->state.Stipple[I915_STPREG_ST1] |= newMask;
 485    i915->intel.hw_stipple = 1;
 486
 487    if (active)
 488       i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 489 }
 490
 491
 492 /* =============================================================
 493  * Hardware clipping
 494  */
 495 static void
 496 i915Scissor(struct gl_context * ctx)
 497 {
 498    struct i915_context *i915 = I915_CONTEXT(ctx);
 499    int x1, y1, x2, y2;
 500
 501    if (!ctx->DrawBuffer)
 502       return;
 503
 504    DBG("%s %d,%d %dx%d\n", __func__,
 505        ctx->Scissor.ScissorArray[0].X,     ctx->Scissor.ScissorArray[0].Y,
 506        ctx->Scissor.ScissorArray[0].Width, ctx->Scissor.ScissorArray[0].Height);
 507
 508    if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
 509       x1 = ctx->Scissor.ScissorArray[0].X;
 510       y1 = ctx->DrawBuffer->Height - (ctx->Scissor.ScissorArray[0].Y
 511                                       + ctx->Scissor.ScissorArray[0].Height);
 512       x2 = ctx->Scissor.ScissorArray[0].X
 513          + ctx->Scissor.ScissorArray[0].Width - 1;
 514       y2 = y1 + ctx->Scissor.ScissorArray[0].Height - 1;
 515       DBG("%s %d..%d,%d..%d (inverted)\n", __func__, x1, x2, y1, y2);
 516    }
 517    else {
 518       /* FBO - not inverted
 519        */
 520       x1 = ctx->Scissor.ScissorArray[0].X;
 521       y1 = ctx->Scissor.ScissorArray[0].Y;
 522       x2 = ctx->Scissor.ScissorArray[0].X
 523          + ctx->Scissor.ScissorArray[0].Width - 1;
 524       y2 = ctx->Scissor.ScissorArray[0].Y
 525          + ctx->Scissor.ScissorArray[0].Height - 1;
 526       DBG("%s %d..%d,%d..%d (not inverted)\n", __func__, x1, x2, y1, y2);
 527    }
 528
 529    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 530    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 531    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 532    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 533
 534    DBG("%s %d..%d,%d..%d (clamped)\n", __func__, x1, x2, y1, y2);
 535
 536    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 537    i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 538    i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 539 }
 540
 541 static void
 542 i915LogicOp(struct gl_context * ctx, GLenum opcode)
 543 {
 544    struct i915_context *i915 = I915_CONTEXT(ctx);
 545    int tmp = intel_translate_logic_op(opcode);
 546
 547    DBG("%s\n", __func__);
 548
 549    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 550    i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
 551    i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 552 }
 553
 554
 555
 556 static void
 557 i915CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
 558 {
 559    struct i915_context *i915 = I915_CONTEXT(ctx);
 560    GLuint mode, dw;
 561
 562    DBG("%s %d\n", __func__,
 563        ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
 564
 565    if (!ctx->Polygon.CullFlag) {
 566       mode = S4_CULLMODE_NONE;
 567    }
 568    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 569       mode = S4_CULLMODE_CW;
 570
 571       if (ctx->DrawBuffer && _mesa_is_user_fbo(ctx->DrawBuffer))
 572          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 573       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 574          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 575       if (ctx->Polygon.FrontFace != GL_CCW)
 576          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 577    }
 578    else {
 579       mode = S4_CULLMODE_BOTH;
 580    }
 581
 582    dw = i915->state.Ctx[I915_CTXREG_LIS4];
 583    dw &= ~S4_CULLMODE_MASK;
 584    dw |= mode;
 585    if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 586       i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 587       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 588    }
 589 }
 590
 591 static void
 592 i915LineWidth(struct gl_context * ctx, GLfloat widthf)
 593 {
 594    struct i915_context *i915 = I915_CONTEXT(ctx);
 595    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
 596    int width;
 597
 598    DBG("%s\n", __func__);
 599
 600    width = (int) (widthf * 2);
 601    width = CLAMP(width, 1, 0xf);
 602    lis4 |= width << S4_LINE_WIDTH_SHIFT;
 603
 604    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 605       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 606       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 607    }
 608 }
 609
 610 static void
 611 i915PointSize(struct gl_context * ctx, GLfloat size)
 612 {
 613    struct i915_context *i915 = I915_CONTEXT(ctx);
 614    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
 615    GLint point_size = (int) round(size);
 616
 617    DBG("%s\n", __func__);
 618
 619    point_size = CLAMP(point_size, 1, 255);
 620    lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
 621
 622    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 623       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 624       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 625    }
 626 }
 627
 628
 629 static void
 630 i915PointParameterfv(struct gl_context * ctx, GLenum pname, const GLfloat *params)
 631 {
 632    struct i915_context *i915 = I915_CONTEXT(ctx);
 633
 634    switch (pname) {
 635    case GL_POINT_SPRITE_COORD_ORIGIN:
 636       /* This could be supported, but it would require modifying the fragment
 637        * program to invert the y component of the texture coordinate by
 638        * inserting a 'SUB tc.y, {1.0}.xxxx, tc' instruction.
 639        */
 640       FALLBACK(&i915->intel, I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN,
 641                (params[0] != GL_UPPER_LEFT));
 642       break;
 643    }
 644 }
 645
 646 void
 647 i915_update_sprite_point_enable(struct gl_context *ctx)
 648 {
 649    struct intel_context *intel = intel_context(ctx);
 650    /* _NEW_PROGRAM */
 651    struct i915_fragment_program *p =
 652       (struct i915_fragment_program *) ctx->FragmentProgram._Current;
 653    const GLbitfield64 inputsRead = p->FragProg.Base.InputsRead;
 654    struct i915_context *i915 = i915_context(ctx);
 655    GLuint s4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_VFMT_MASK;
 656    int i;
 657    GLuint coord_replace_bits = 0x0;
 658    GLuint tex_coord_unit_bits = 0x0;
 659
 660    for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) {
 661       /* _NEW_POINT */
 662       if (ctx->Point.CoordReplace[i] && ctx->Point.PointSprite)
 663          coord_replace_bits |= (1 << i);
 664       if (inputsRead & VARYING_BIT_TEX(i))
 665          tex_coord_unit_bits |= (1 << i);
 666    }
 667
 668    /*
 669     * Here we can't enable the SPRITE_POINT_ENABLE bit when the mis-match
 670     * of tex_coord_unit_bits and coord_replace_bits, or this will make all
 671     * the other non-point-sprite coords(like varying inputs, as we now use
 672     * tex coord to implement varying inputs) be replaced to value (0, 0)-(1, 1).
 673     *
 674     * Thus, do fallback when needed.
 675     */
 676    FALLBACK(intel, I915_FALLBACK_COORD_REPLACE,
 677             coord_replace_bits && coord_replace_bits != tex_coord_unit_bits);
 678
 679    s4 &= ~S4_SPRITE_POINT_ENABLE;
 680    s4 |= (coord_replace_bits && coord_replace_bits == tex_coord_unit_bits) ?
 681          S4_SPRITE_POINT_ENABLE : 0;
 682    if (s4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 683       i915->state.Ctx[I915_CTXREG_LIS4] = s4;
 684       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 685    }
 686 }
 687
 688
 689 /* =============================================================
 690  * Color masks
 691  */
 692
 693 static void
 694 i915ColorMask(struct gl_context * ctx,
 695               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 696 {
 697    struct i915_context *i915 = I915_CONTEXT(ctx);
 698    GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
 699
 700    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __func__, r, g, b,
 701        a);
 702
 703    if (!r)
 704       tmp |= S5_WRITEDISABLE_RED;
 705    if (!g)
 706       tmp |= S5_WRITEDISABLE_GREEN;
 707    if (!b)
 708       tmp |= S5_WRITEDISABLE_BLUE;
 709    if (!a)
 710       tmp |= S5_WRITEDISABLE_ALPHA;
 711
 712    if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
 713       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 714       i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
 715    }
 716 }
 717
 718 static void
 719 update_specular(struct gl_context * ctx)
 720 {
 721    /* A hack to trigger the rebuild of the fragment program.
 722     */
 723    intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
 724 }
 725
 726 static void
 727 i915LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 728 {
 729    DBG("%s\n", __func__);
 730
 731    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 732       update_specular(ctx);
 733    }
 734 }
 735
 736 static void
 737 i915ShadeModel(struct gl_context * ctx, GLenum mode)
 738 {
 739    struct i915_context *i915 = I915_CONTEXT(ctx);
 740    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 741
 742    if (mode == GL_SMOOTH) {
 743       i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
 744                                              S4_FLATSHADE_COLOR |
 745                                              S4_FLATSHADE_SPECULAR);
 746    }
 747    else {
 748       i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
 749                                             S4_FLATSHADE_COLOR |
 750                                             S4_FLATSHADE_SPECULAR);
 751    }
 752 }
 753
 754 /* =============================================================
 755  * Fog
 756  *
 757  * This empty function remains because _mesa_init_driver_state calls
 758  * dd_function_table::Fogfv unconditionally.  We have to have some function
 759  * there so that it doesn't try to call a NULL pointer.
 760  */
 761 static void
 762 i915Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 763 {
 764    (void) ctx;
 765    (void) pname;
 766    (void) param;
 767 }
 768
 769 /* =============================================================
 770  */
 771
 772 static void
 773 i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
 774 {
 775    struct i915_context *i915 = I915_CONTEXT(ctx);
 776    GLuint dw;
 777
 778    switch (cap) {
 779    case GL_TEXTURE_2D:
 780       break;
 781
 782    case GL_LIGHTING:
 783    case GL_COLOR_SUM:
 784       update_specular(ctx);
 785       break;
 786
 787    case GL_ALPHA_TEST:
 788       dw = i915->state.Ctx[I915_CTXREG_LIS6];
 789       if (state)
 790          dw |= S6_ALPHA_TEST_ENABLE;
 791       else
 792          dw &= ~S6_ALPHA_TEST_ENABLE;
 793       if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 794          i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 795          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 796       }
 797       break;
 798
 799    case GL_BLEND:
 800       i915EvalLogicOpBlendState(ctx);
 801       break;
 802
 803    case GL_COLOR_LOGIC_OP:
 804       i915EvalLogicOpBlendState(ctx);
 805
 806       /* Logicop doesn't seem to work at 16bpp:
 807        */
 808       if (ctx->Visual.rgbBits == 16)
 809          FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
 810       break;
 811
 812    case GL_FRAGMENT_PROGRAM_ARB:
 813       break;
 814
 815    case GL_DITHER:
 816       dw = i915->state.Ctx[I915_CTXREG_LIS5];
 817       if (state)
 818          dw |= S5_COLOR_DITHER_ENABLE;
 819       else
 820          dw &= ~S5_COLOR_DITHER_ENABLE;
 821       if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
 822          i915->state.Ctx[I915_CTXREG_LIS5] = dw;
 823          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 824       }
 825       break;
 826
 827    case GL_DEPTH_TEST:
 828       dw = i915->state.Ctx[I915_CTXREG_LIS6];
 829
 830       if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
 831          state = false;
 832
 833       if (state)
 834          dw |= S6_DEPTH_TEST_ENABLE;
 835       else
 836          dw &= ~S6_DEPTH_TEST_ENABLE;
 837       if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 838          i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 839          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 840       }
 841
 842       i915DepthMask(ctx, ctx->Depth.Mask);
 843       break;
 844
 845    case GL_SCISSOR_TEST:
 846       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 847       if (state)
 848          i915->state.Buffer[I915_DESTREG_SENABLE] =
 849             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 850       else
 851          i915->state.Buffer[I915_DESTREG_SENABLE] =
 852             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 853       break;
 854
 855    case GL_LINE_SMOOTH:
 856       dw = i915->state.Ctx[I915_CTXREG_LIS4];
 857       if (state)
 858          dw |= S4_LINE_ANTIALIAS_ENABLE;
 859       else
 860          dw &= ~S4_LINE_ANTIALIAS_ENABLE;
 861       if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 862          i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 863          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 864       }
 865       break;
 866
 867    case GL_CULL_FACE:
 868       i915CullFaceFrontFace(ctx, 0);
 869       break;
 870
 871    case GL_STENCIL_TEST:
 872       if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.stencilBits)
 873          state = false;
 874
 875       dw = i915->state.Ctx[I915_CTXREG_LIS5];
 876       if (state)
 877          dw |= (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
 878       else
 879          dw &= ~(S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
 880       if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
 881          i915->state.Ctx[I915_CTXREG_LIS5] = dw;
 882          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 883       }
 884       break;
 885
 886    case GL_POLYGON_STIPPLE:
 887       /* The stipple command worked on my 855GM box, but not my 845G.
 888        * I'll do more testing later to find out exactly which hardware
 889        * supports it.  Disabled for now.
 890        */
 891       if (i915->intel.hw_stipple &&
 892           i915->intel.reduced_primitive == GL_TRIANGLES) {
 893          I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 894          if (state)
 895             i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 896          else
 897             i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 898       }
 899       break;
 900
 901    case GL_POLYGON_SMOOTH:
 902       break;
 903
 904    case GL_POINT_SPRITE:
 905       /* Handle it at i915_update_sprite_point_enable () */
 906       break;
 907
 908    case GL_POINT_SMOOTH:
 909       break;
 910
 911    default:
 912       ;
 913    }
 914 }
 915
 916
 917 static void
 918 i915_init_packets(struct i915_context *i915)
 919 {
 920    /* Zero all state */
 921    memset(&i915->state, 0, sizeof(i915->state));
 922
 923
 924    {
 925       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 926       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 927       /* Probably don't want to upload all this stuff every time one
 928        * piece changes.
 929        */
 930       i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 931                                          I1_LOAD_S(2) |
 932                                          I1_LOAD_S(4) |
 933                                          I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
 934       i915->state.Ctx[I915_CTXREG_LIS2] = 0;
 935       i915->state.Ctx[I915_CTXREG_LIS4] = 0;
 936       i915->state.Ctx[I915_CTXREG_LIS5] = 0;
 937
 938       if (i915->intel.ctx.Visual.rgbBits == 16)
 939          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 940
 941
 942       i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
 943                                            (2 << S6_TRISTRIP_PV_SHIFT));
 944
 945       i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
 946                                              ENABLE_LOGIC_OP_FUNC |
 947                                              LOGIC_OP_FUNC(LOGICOP_COPY) |
 948                                              ENABLE_STENCIL_TEST_MASK |
 949                                              STENCIL_TEST_MASK(0xff) |
 950                                              ENABLE_STENCIL_WRITE_MASK |
 951                                              STENCIL_WRITE_MASK(0xff));
 952
 953       i915->state.Blend[I915_BLENDREG_IAB] =
 954          (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
 955           IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
 956
 957       i915->state.Blend[I915_BLENDREG_BLENDCOLOR0] =
 958          _3DSTATE_CONST_BLEND_COLOR_CMD;
 959       i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = 0;
 960
 961       i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] =
 962          _3DSTATE_BACKFACE_STENCIL_MASKS |
 963          BFM_ENABLE_STENCIL_TEST_MASK |
 964          BFM_ENABLE_STENCIL_WRITE_MASK |
 965          (0xff << BFM_STENCIL_WRITE_MASK_SHIFT) |
 966          (0xff << BFM_STENCIL_TEST_MASK_SHIFT);
 967       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] =
 968          _3DSTATE_BACKFACE_STENCIL_OPS |
 969          BFO_ENABLE_STENCIL_REF |
 970          BFO_ENABLE_STENCIL_FUNCS |
 971          BFO_ENABLE_STENCIL_TWO_SIDE;
 972    }
 973
 974    {
 975       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 976       i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
 977    }
 978
 979    {
 980       i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
 981
 982       /* scissor */
 983       i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
 984       i915->state.Buffer[I915_DESTREG_SR1] = 0;
 985       i915->state.Buffer[I915_DESTREG_SR2] = 0;
 986       i915->state.Buffer[I915_DESTREG_SENABLE] =
 987          (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 988    }
 989
 990    i915->state.RasterRules[I915_RASTER_RULES] = _3DSTATE_RASTER_RULES_CMD |
 991       ENABLE_POINT_RASTER_RULE |
 992       OGL_POINT_RASTER_RULE |
 993       ENABLE_LINE_STRIP_PROVOKE_VRTX |
 994       ENABLE_TRI_FAN_PROVOKE_VRTX |
 995       LINE_STRIP_PROVOKE_VRTX(1) |
 996       TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D;
 997
 998 #if 0
 999    {
1000       I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
1001       i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
1002       i915->state.Default[I915_DEFREG_C1] = 0;
1003       i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
1004       i915->state.Default[I915_DEFREG_S1] = 0;
1005       i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
1006       i915->state.Default[I915_DEFREG_Z1] = 0;
1007    }
1008 #endif
1009
1010
1011    /* These will be emitted every at the head of every buffer, unless
1012     * we get hardware contexts working.
1013     */
1014    i915->state.active = (I915_UPLOAD_PROGRAM |
1015                          I915_UPLOAD_STIPPLE |
1016                          I915_UPLOAD_CTX |
1017                          I915_UPLOAD_BLEND |
1018                          I915_UPLOAD_BUFFERS |
1019                          I915_UPLOAD_INVARIENT |
1020                          I915_UPLOAD_RASTER_RULES);
1021 }
1022
1023 void
1024 i915_update_provoking_vertex(struct gl_context * ctx)
1025 {
1026    struct i915_context *i915 = I915_CONTEXT(ctx);
1027
1028    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1029    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_TRISTRIP_PV_MASK);
1030
1031    I915_STATECHANGE(i915, I915_UPLOAD_RASTER_RULES);
1032    i915->state.RasterRules[I915_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1033                                                    TRI_FAN_PROVOKE_VRTX_MASK);
1034
1035    /* _NEW_LIGHT */
1036    if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1037       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1038                                                      TRI_FAN_PROVOKE_VRTX(2));
1039       i915->state.Ctx[I915_CTXREG_LIS6] |= (2 << S6_TRISTRIP_PV_SHIFT);
1040    } else {
1041       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1042                                                      TRI_FAN_PROVOKE_VRTX(1));
1043       i915->state.Ctx[I915_CTXREG_LIS6] |= (0 << S6_TRISTRIP_PV_SHIFT);
1044     }
1045 }
1046
1047 /* Fallback to swrast for select and feedback.
1048  */
1049 static void
1050 i915RenderMode(struct gl_context *ctx, GLenum mode)
1051 {
1052    struct intel_context *intel = intel_context(ctx);
1053    FALLBACK(intel, INTEL_FALLBACK_RENDERMODE, (mode != GL_RENDER));
1054 }
1055
1056 void
1057 i915InitStateFunctions(struct dd_function_table *functions)
1058 {
1059    functions->AlphaFunc = i915AlphaFunc;
1060    functions->BlendColor = i915BlendColor;
1061    functions->BlendEquationSeparate = i915BlendEquationSeparate;
1062    functions->BlendFuncSeparate = i915BlendFuncSeparate;
1063    functions->ColorMask = i915ColorMask;
1064    functions->CullFace = i915CullFaceFrontFace;
1065    functions->DepthFunc = i915DepthFunc;
1066    functions->DepthMask = i915DepthMask;
1067    functions->Enable = i915Enable;
1068    functions->Fogfv = i915Fogfv;
1069    functions->FrontFace = i915CullFaceFrontFace;
1070    functions->LightModelfv = i915LightModelfv;
1071    functions->LineWidth = i915LineWidth;
1072    functions->LogicOpcode = i915LogicOp;
1073    functions->PointSize = i915PointSize;
1074    functions->PointParameterfv = i915PointParameterfv;
1075    functions->PolygonStipple = i915PolygonStipple;
1076    functions->RenderMode = i915RenderMode;
1077    functions->Scissor = i915Scissor;
1078    functions->ShadeModel = i915ShadeModel;
1079    functions->StencilFuncSeparate = i915StencilFuncSeparate;
1080    functions->StencilMaskSeparate = i915StencilMaskSeparate;
1081    functions->StencilOpSeparate = i915StencilOpSeparate;
1082    functions->DepthRange = i915DepthRange;
1083 }
1084
1085
1086 void
1087 i915InitState(struct i915_context *i915)
1088 {
1089    struct gl_context *ctx = &i915->intel.ctx;
1090
1091    i915_init_packets(i915);
1092
1093    _mesa_init_driver_state(ctx);
1094 }