src/mesa/drivers/dri/i915/i915_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/macros.h"
  32 #include "main/enums.h"
  33 #include "main/dd.h"
  34 #include "tnl/tnl.h"
  35 #include "tnl/t_context.h"
  36
  37 #include "texmem.h"
  38
  39 #include "drivers/common/driverfuncs.h"
  40
  41 #include "intel_fbo.h"
  42 #include "intel_screen.h"
  43 #include "intel_batchbuffer.h"
  44 #include "intel_buffers.h"
  45
  46 #include "i915_context.h"
  47 #include "i915_reg.h"
  48
  49 #define FILE_DEBUG_FLAG DEBUG_STATE
  50
  51 void
  52 i915_update_stencil(GLcontext * ctx)
  53 {
  54    struct i915_context *i915 = I915_CONTEXT(ctx);
  55    GLuint front_ref, front_writemask, front_mask;
  56    GLenum front_func, front_fail, front_pass_z_fail, front_pass_z_pass;
  57    GLuint back_ref, back_writemask, back_mask;
  58    GLenum back_func, back_fail, back_pass_z_fail, back_pass_z_pass;
  59
  60    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
  61
  62    /* The 915 considers CW to be "front" for two-sided stencil, so choose
  63     * appropriately.
  64     */
  65    /* _NEW_POLYGON | _NEW_STENCIL */
  66    if (ctx->Polygon.FrontFace == GL_CW) {
  67       front_ref = ctx->Stencil.Ref[0];
  68       front_mask = ctx->Stencil.ValueMask[0];
  69       front_writemask = ctx->Stencil.WriteMask[0];
  70       front_func = ctx->Stencil.Function[0];
  71       front_fail = ctx->Stencil.FailFunc[0];
  72       front_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  73       front_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  74       back_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  75       back_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  76       back_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  77       back_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  78       back_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  79       back_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  80       back_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  81    } else {
  82       front_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  83       front_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  84       front_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  85       front_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  86       front_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  87       front_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  88       front_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  89       back_ref = ctx->Stencil.Ref[0];
  90       back_mask = ctx->Stencil.ValueMask[0];
  91       back_writemask = ctx->Stencil.WriteMask[0];
  92       back_func = ctx->Stencil.Function[0];
  93       back_fail = ctx->Stencil.FailFunc[0];
  94       back_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  95       back_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  96    }
  97
  98    /* Set front state. */
  99    i915->state.Ctx[I915_CTXREG_STATE4] &= ~(MODE4_ENABLE_STENCIL_TEST_MASK |
 100                                             MODE4_ENABLE_STENCIL_WRITE_MASK);
 101    i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
 102                                            ENABLE_STENCIL_WRITE_MASK |
 103                                            STENCIL_TEST_MASK(front_mask) |
 104                                            STENCIL_WRITE_MASK(front_writemask));
 105
 106    i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_REF_MASK |
 107                                           S5_STENCIL_TEST_FUNC_MASK |
 108                                           S5_STENCIL_FAIL_MASK |
 109                                           S5_STENCIL_PASS_Z_FAIL_MASK |
 110                                           S5_STENCIL_PASS_Z_PASS_MASK);
 111
 112    i915->state.Ctx[I915_CTXREG_LIS5] |=
 113       (front_ref << S5_STENCIL_REF_SHIFT) |
 114       (intel_translate_compare_func(front_func) << S5_STENCIL_TEST_FUNC_SHIFT) |
 115       (intel_translate_stencil_op(front_fail) << S5_STENCIL_FAIL_SHIFT) |
 116       (intel_translate_stencil_op(front_pass_z_fail) <<
 117        S5_STENCIL_PASS_Z_FAIL_SHIFT) |
 118       (intel_translate_stencil_op(front_pass_z_pass) <<
 119        S5_STENCIL_PASS_Z_PASS_SHIFT);
 120
 121    /* Set back state if different from front. */
 122    if (ctx->Stencil._TestTwoSide) {
 123       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] &=
 124          ~(BFO_STENCIL_REF_MASK |
 125            BFO_STENCIL_TEST_MASK |
 126            BFO_STENCIL_FAIL_MASK |
 127            BFO_STENCIL_PASS_Z_FAIL_MASK |
 128            BFO_STENCIL_PASS_Z_PASS_MASK);
 129       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] |= BFO_STENCIL_TWO_SIDE |
 130          (back_ref << BFO_STENCIL_REF_SHIFT) |
 131          (intel_translate_compare_func(back_func) << BFO_STENCIL_TEST_SHIFT) |
 132          (intel_translate_stencil_op(back_fail) << BFO_STENCIL_FAIL_SHIFT) |
 133          (intel_translate_stencil_op(back_pass_z_fail) <<
 134           BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
 135          (intel_translate_stencil_op(back_pass_z_pass) <<
 136           BFO_STENCIL_PASS_Z_PASS_SHIFT);
 137
 138       i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] &=
 139          ~(BFM_STENCIL_TEST_MASK_MASK |
 140            BFM_STENCIL_WRITE_MASK_MASK);
 141       i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] |=
 142          BFM_STENCIL_TEST_MASK(back_mask) |
 143          BFM_STENCIL_WRITE_MASK(back_writemask);
 144    } else {
 145       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] &= ~BFO_STENCIL_TWO_SIDE;
 146    }
 147 }
 148
 149 static void
 150 i915StencilFuncSeparate(GLcontext * ctx, GLenum face, GLenum func, GLint ref,
 151                         GLuint mask)
 152 {
 153 }
 154
 155 static void
 156 i915StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
 157 {
 158 }
 159
 160 static void
 161 i915StencilOpSeparate(GLcontext * ctx, GLenum face, GLenum fail, GLenum zfail,
 162                       GLenum zpass)
 163 {
 164 }
 165
 166 static void
 167 i915AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
 168 {
 169    struct i915_context *i915 = I915_CONTEXT(ctx);
 170    int test = intel_translate_compare_func(func);
 171    GLubyte refByte;
 172
 173    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 174
 175    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 176    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_ALPHA_TEST_FUNC_MASK |
 177                                           S6_ALPHA_REF_MASK);
 178    i915->state.Ctx[I915_CTXREG_LIS6] |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
 179                                          (((GLuint) refByte) <<
 180                                           S6_ALPHA_REF_SHIFT));
 181 }
 182
 183 /* This function makes sure that the proper enables are
 184  * set for LogicOp, Independant Alpha Blend, and Blending.
 185  * It needs to be called from numerous places where we
 186  * could change the LogicOp or Independant Alpha Blend without subsequent
 187  * calls to glEnable.
 188  */
 189 static void
 190 i915EvalLogicOpBlendState(GLcontext * ctx)
 191 {
 192    struct i915_context *i915 = I915_CONTEXT(ctx);
 193
 194    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 195
 196    if (RGBA_LOGICOP_ENABLED(ctx)) {
 197       i915->state.Ctx[I915_CTXREG_LIS5] |= S5_LOGICOP_ENABLE;
 198       i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
 199    }
 200    else {
 201       i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_LOGICOP_ENABLE;
 202
 203       if (ctx->Color.BlendEnabled) {
 204          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_CBUF_BLEND_ENABLE;
 205       }
 206       else {
 207          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
 208       }
 209    }
 210 }
 211
 212 static void
 213 i915BlendColor(GLcontext * ctx, const GLfloat color[4])
 214 {
 215    struct i915_context *i915 = I915_CONTEXT(ctx);
 216    GLubyte r, g, b, a;
 217
 218    DBG("%s\n", __FUNCTION__);
 219
 220    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 221    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 222    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 223    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 224
 225    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 226    i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] =
 227       (a << 24) | (r << 16) | (g << 8) | b;
 228 }
 229
 230
 231 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
 232 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
 233 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
 234 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
 235
 236
 237
 238 static GLuint
 239 translate_blend_equation(GLenum mode)
 240 {
 241    switch (mode) {
 242    case GL_FUNC_ADD:
 243       return BLENDFUNC_ADD;
 244    case GL_MIN:
 245       return BLENDFUNC_MIN;
 246    case GL_MAX:
 247       return BLENDFUNC_MAX;
 248    case GL_FUNC_SUBTRACT:
 249       return BLENDFUNC_SUBTRACT;
 250    case GL_FUNC_REVERSE_SUBTRACT:
 251       return BLENDFUNC_REVERSE_SUBTRACT;
 252    default:
 253       return 0;
 254    }
 255 }
 256
 257 static void
 258 i915UpdateBlendState(GLcontext * ctx)
 259 {
 260    struct i915_context *i915 = I915_CONTEXT(ctx);
 261    GLuint iab = (i915->state.Ctx[I915_CTXREG_IAB] &
 262                  ~(IAB_SRC_FACTOR_MASK |
 263                    IAB_DST_FACTOR_MASK |
 264                    (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
 265
 266    GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
 267                   ~(S6_CBUF_SRC_BLEND_FACT_MASK |
 268                     S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
 269
 270    GLuint eqRGB = ctx->Color.BlendEquationRGB;
 271    GLuint eqA = ctx->Color.BlendEquationA;
 272    GLuint srcRGB = ctx->Color.BlendSrcRGB;
 273    GLuint dstRGB = ctx->Color.BlendDstRGB;
 274    GLuint srcA = ctx->Color.BlendSrcA;
 275    GLuint dstA = ctx->Color.BlendDstA;
 276
 277    if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 278       srcRGB = dstRGB = GL_ONE;
 279    }
 280
 281    if (eqA == GL_MIN || eqA == GL_MAX) {
 282       srcA = dstA = GL_ONE;
 283    }
 284
 285    lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
 286    lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
 287    lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
 288
 289    iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
 290    iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
 291    iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
 292
 293    if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
 294       iab |= IAB_ENABLE;
 295
 296    if (iab != i915->state.Ctx[I915_CTXREG_IAB] ||
 297        lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 298       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 299       i915->state.Ctx[I915_CTXREG_IAB] = iab;
 300       i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
 301    }
 302
 303    /* This will catch a logicop blend equation */
 304    i915EvalLogicOpBlendState(ctx);
 305 }
 306
 307
 308 static void
 309 i915BlendFuncSeparate(GLcontext * ctx, GLenum srcRGB,
 310                       GLenum dstRGB, GLenum srcA, GLenum dstA)
 311 {
 312    i915UpdateBlendState(ctx);
 313 }
 314
 315
 316 static void
 317 i915BlendEquationSeparate(GLcontext * ctx, GLenum eqRGB, GLenum eqA)
 318 {
 319    i915UpdateBlendState(ctx);
 320 }
 321
 322
 323 static void
 324 i915DepthFunc(GLcontext * ctx, GLenum func)
 325 {
 326    struct i915_context *i915 = I915_CONTEXT(ctx);
 327    int test = intel_translate_compare_func(func);
 328
 329    DBG("%s\n", __FUNCTION__);
 330
 331    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 332    i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_FUNC_MASK;
 333    i915->state.Ctx[I915_CTXREG_LIS6] |= test << S6_DEPTH_TEST_FUNC_SHIFT;
 334 }
 335
 336 static void
 337 i915DepthMask(GLcontext * ctx, GLboolean flag)
 338 {
 339    struct i915_context *i915 = I915_CONTEXT(ctx);
 340
 341    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 342
 343    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 344
 345    if (flag && ctx->Depth.Test)
 346       i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_WRITE_ENABLE;
 347    else
 348       i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_WRITE_ENABLE;
 349 }
 350
 351
 352
 353 /**
 354  * Update the viewport transformation matrix.  Depends on:
 355  *  - viewport pos/size
 356  *  - depthrange
 357  *  - window pos/size or FBO size
 358  */
 359 void
 360 intelCalcViewport(GLcontext * ctx)
 361 {
 362    struct intel_context *intel = intel_context(ctx);
 363    const GLfloat *v = ctx->Viewport._WindowMap.m;
 364    const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
 365    GLfloat *m = intel->ViewportMatrix.m;
 366    GLfloat yScale, yBias;
 367
 368    if (ctx->DrawBuffer->Name) {
 369       /* User created FBO */
 370       /* y=0=bottom */
 371       yScale = 1.0;
 372       yBias = 0.0;
 373    }
 374    else {
 375       /* window buffer, y=0=top */
 376       yScale = -1.0;
 377       yBias = (intel->driDrawable) ? intel->driDrawable->h : 0.0F;
 378    }
 379
 380    m[MAT_SX] = v[MAT_SX];
 381    m[MAT_TX] = v[MAT_TX];
 382
 383    m[MAT_SY] = v[MAT_SY] * yScale;
 384    m[MAT_TY] = v[MAT_TY] * yScale + yBias;
 385
 386    m[MAT_SZ] = v[MAT_SZ] * depthScale;
 387    m[MAT_TZ] = v[MAT_TZ] * depthScale;
 388 }
 389
 390
 391 /** Called from ctx->Driver.Viewport() */
 392 static void
 393 i915Viewport(GLcontext * ctx,
 394               GLint x, GLint y, GLsizei width, GLsizei height)
 395 {
 396    intelCalcViewport(ctx);
 397
 398    intel_viewport(ctx, x, y, width, height);
 399 }
 400
 401
 402 /** Called from ctx->Driver.DepthRange() */
 403 static void
 404 i915DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
 405 {
 406    intelCalcViewport(ctx);
 407 }
 408
 409
 410 /* =============================================================
 411  * Polygon stipple
 412  *
 413  * The i915 supports a 4x4 stipple natively, GL wants 32x32.
 414  * Fortunately stipple is usually a repeating pattern.
 415  */
 416 static void
 417 i915PolygonStipple(GLcontext * ctx, const GLubyte * mask)
 418 {
 419    struct i915_context *i915 = I915_CONTEXT(ctx);
 420    const GLubyte *m;
 421    GLubyte p[4];
 422    int i, j, k;
 423    int active = (ctx->Polygon.StippleFlag &&
 424                  i915->intel.reduced_primitive == GL_TRIANGLES);
 425    GLuint newMask;
 426
 427    if (active) {
 428       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 429       i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 430    }
 431
 432    /* Use the already unpacked stipple data from the context rather than the
 433     * uninterpreted mask passed in.
 434     */
 435    mask = (const GLubyte *)ctx->PolygonStipple;
 436    m = mask;
 437
 438    p[0] = mask[12] & 0xf;
 439    p[0] |= p[0] << 4;
 440    p[1] = mask[8] & 0xf;
 441    p[1] |= p[1] << 4;
 442    p[2] = mask[4] & 0xf;
 443    p[2] |= p[2] << 4;
 444    p[3] = mask[0] & 0xf;
 445    p[3] |= p[3] << 4;
 446
 447    for (k = 0; k < 8; k++)
 448       for (j = 3; j >= 0; j--)
 449          for (i = 0; i < 4; i++, m++)
 450             if (*m != p[j]) {
 451                i915->intel.hw_stipple = 0;
 452                return;
 453             }
 454
 455    newMask = (((p[0] & 0xf) << 0) |
 456               ((p[1] & 0xf) << 4) |
 457               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 458
 459
 460    if (newMask == 0xffff || newMask == 0x0) {
 461       /* this is needed to make conform pass */
 462       i915->intel.hw_stipple = 0;
 463       return;
 464    }
 465
 466    i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
 467    i915->state.Stipple[I915_STPREG_ST1] |= newMask;
 468    i915->intel.hw_stipple = 1;
 469
 470    if (active)
 471       i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 472 }
 473
 474
 475 /* =============================================================
 476  * Hardware clipping
 477  */
 478 static void
 479 i915Scissor(GLcontext * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 480 {
 481    struct i915_context *i915 = I915_CONTEXT(ctx);
 482    int x1, y1, x2, y2;
 483
 484    if (!ctx->DrawBuffer)
 485       return;
 486
 487    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 488
 489    if (ctx->DrawBuffer->Name == 0) {
 490       x1 = x;
 491       y1 = ctx->DrawBuffer->Height - (y + h);
 492       x2 = x + w - 1;
 493       y2 = y1 + h - 1;
 494       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 495    }
 496    else {
 497       /* FBO - not inverted
 498        */
 499       x1 = x;
 500       y1 = y;
 501       x2 = x + w - 1;
 502       y2 = y + h - 1;
 503       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 504    }
 505
 506    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 507    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 508    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 509    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 510
 511    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 512
 513    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 514    i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 515    i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 516 }
 517
 518 static void
 519 i915LogicOp(GLcontext * ctx, GLenum opcode)
 520 {
 521    struct i915_context *i915 = I915_CONTEXT(ctx);
 522    int tmp = intel_translate_logic_op(opcode);
 523
 524    DBG("%s\n", __FUNCTION__);
 525
 526    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 527    i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
 528    i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 529 }
 530
 531
 532
 533 static void
 534 i915CullFaceFrontFace(GLcontext * ctx, GLenum unused)
 535 {
 536    struct i915_context *i915 = I915_CONTEXT(ctx);
 537    GLuint mode;
 538
 539    DBG("%s %d\n", __FUNCTION__,
 540        ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
 541
 542    if (!ctx->Polygon.CullFlag) {
 543       mode = S4_CULLMODE_NONE;
 544    }
 545    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 546       mode = S4_CULLMODE_CW;
 547
 548       if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
 549          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 550       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 551          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 552       if (ctx->Polygon.FrontFace != GL_CCW)
 553          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 554    }
 555    else {
 556       mode = S4_CULLMODE_BOTH;
 557    }
 558
 559    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 560    i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_CULLMODE_MASK;
 561    i915->state.Ctx[I915_CTXREG_LIS4] |= mode;
 562 }
 563
 564 static void
 565 i915LineWidth(GLcontext * ctx, GLfloat widthf)
 566 {
 567    struct i915_context *i915 = I915_CONTEXT(ctx);
 568    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
 569    int width;
 570
 571    DBG("%s\n", __FUNCTION__);
 572
 573    width = (int) (widthf * 2);
 574    width = CLAMP(width, 1, 0xf);
 575    lis4 |= width << S4_LINE_WIDTH_SHIFT;
 576
 577    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 578       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 579       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 580    }
 581 }
 582
 583 static void
 584 i915PointSize(GLcontext * ctx, GLfloat size)
 585 {
 586    struct i915_context *i915 = I915_CONTEXT(ctx);
 587    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
 588    GLint point_size = (int) round(size);
 589
 590    DBG("%s\n", __FUNCTION__);
 591
 592    point_size = CLAMP(point_size, 1, 255);
 593    lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
 594
 595    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 596       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 597       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 598    }
 599 }
 600
 601
 602 static void
 603 i915PointParameterfv(GLcontext * ctx, GLenum pname, const GLfloat *params)
 604 {
 605    struct i915_context *i915 = I915_CONTEXT(ctx);
 606
 607    switch (pname) {
 608    case GL_POINT_SPRITE_COORD_ORIGIN:
 609       /* This could be supported, but it would require modifying the fragment
 610        * program to invert the y component of the texture coordinate by
 611        * inserting a 'SUB tc.y, {1.0}.xxxx, tc' instruction.
 612        */
 613       FALLBACK(&i915->intel, I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN,
 614                (params[0] != GL_UPPER_LEFT));
 615       break;
 616    }
 617 }
 618
 619
 620 /* =============================================================
 621  * Color masks
 622  */
 623
 624 static void
 625 i915ColorMask(GLcontext * ctx,
 626               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 627 {
 628    struct i915_context *i915 = I915_CONTEXT(ctx);
 629    GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
 630
 631    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
 632        a);
 633
 634    if (!r)
 635       tmp |= S5_WRITEDISABLE_RED;
 636    if (!g)
 637       tmp |= S5_WRITEDISABLE_GREEN;
 638    if (!b)
 639       tmp |= S5_WRITEDISABLE_BLUE;
 640    if (!a)
 641       tmp |= S5_WRITEDISABLE_ALPHA;
 642
 643    if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
 644       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 645       i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
 646    }
 647 }
 648
 649 static void
 650 update_specular(GLcontext * ctx)
 651 {
 652    /* A hack to trigger the rebuild of the fragment program.
 653     */
 654    intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
 655 }
 656
 657 static void
 658 i915LightModelfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 659 {
 660    DBG("%s\n", __FUNCTION__);
 661
 662    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 663       update_specular(ctx);
 664    }
 665 }
 666
 667 static void
 668 i915ShadeModel(GLcontext * ctx, GLenum mode)
 669 {
 670    struct i915_context *i915 = I915_CONTEXT(ctx);
 671    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 672
 673    if (mode == GL_SMOOTH) {
 674       i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
 675                                              S4_FLATSHADE_COLOR |
 676                                              S4_FLATSHADE_SPECULAR);
 677    }
 678    else {
 679       i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
 680                                             S4_FLATSHADE_COLOR |
 681                                             S4_FLATSHADE_SPECULAR);
 682    }
 683 }
 684
 685 /* =============================================================
 686  * Fog
 687  */
 688 void
 689 i915_update_fog(GLcontext * ctx)
 690 {
 691    struct i915_context *i915 = I915_CONTEXT(ctx);
 692    GLenum mode;
 693    GLboolean enabled;
 694    GLboolean try_pixel_fog;
 695
 696    if (ctx->FragmentProgram._Current) {
 697       /* Pull in static fog state from program */
 698       mode = ctx->FragmentProgram._Current->FogOption;
 699       enabled = (mode != GL_NONE);
 700       try_pixel_fog = 0;
 701    }
 702    else {
 703       enabled = ctx->Fog.Enabled;
 704       mode = ctx->Fog.Mode;
 705 #if 0
 706       /* XXX - DISABLED -- Need ortho fallback */
 707       try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT
 708                        && ctx->Hint.Fog == GL_NICEST);
 709 #else
 710       try_pixel_fog = 0;
 711 #endif
 712    }
 713
 714    if (!enabled) {
 715       i915->vertex_fog = I915_FOG_NONE;
 716    }
 717    else if (try_pixel_fog) {
 718       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 719       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 720       i915->vertex_fog = I915_FOG_PIXEL;
 721
 722       switch (mode) {
 723       case GL_LINEAR:
 724          if (ctx->Fog.End <= ctx->Fog.Start) {
 725             /* XXX - this won't work with fragment programs.  Need to
 726              * either fallback or append fog instructions to end of
 727              * program in the case of linear fog.
 728              */
 729             printf("vertex fog!\n");
 730             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 731             i915->vertex_fog = I915_FOG_VERTEX;
 732          }
 733          else {
 734             GLfloat c2 = 1.0 / (ctx->Fog.End - ctx->Fog.Start);
 735             GLfloat c1 = ctx->Fog.End * c2;
 736
 737             i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK;
 738             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR;
 739             i915->state.Fog[I915_FOGREG_MODE1] |=
 740                ((GLuint) (c1 * FMC1_C1_ONE)) & FMC1_C1_MASK;
 741
 742             if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 743                i915->state.Fog[I915_FOGREG_MODE2]
 744                   = (GLuint) (c2 * FMC2_C2_ONE);
 745             }
 746             else {
 747                fi_type fi;
 748                fi.f = c2;
 749                i915->state.Fog[I915_FOGREG_MODE2] = fi.i;
 750             }
 751          }
 752          break;
 753       case GL_EXP:
 754          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP;
 755          break;
 756       case GL_EXP2:
 757          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP2;
 758          break;
 759       default:
 760          break;
 761       }
 762    }
 763    else { /* if (i915->vertex_fog != I915_FOG_VERTEX) */
 764       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 765       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 766       i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 767       i915->vertex_fog = I915_FOG_VERTEX;
 768    }
 769
 770    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 771    I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled);
 772    if (enabled)
 773       i915->state.Ctx[I915_CTXREG_LIS5] |= S5_FOG_ENABLE;
 774    else
 775       i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_FOG_ENABLE;
 776
 777    /* Always enable pixel fog.  Vertex fog using fog coord will conflict
 778     * with fog code appended onto fragment program.
 779     */
 780     _tnl_allow_vertex_fog( ctx, 0 );
 781     _tnl_allow_pixel_fog( ctx, 1 );
 782 }
 783
 784 static void
 785 i915Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 786 {
 787    struct i915_context *i915 = I915_CONTEXT(ctx);
 788
 789    switch (pname) {
 790    case GL_FOG_COORDINATE_SOURCE_EXT:
 791    case GL_FOG_MODE:
 792    case GL_FOG_START:
 793    case GL_FOG_END:
 794       break;
 795
 796    case GL_FOG_DENSITY:
 797       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 798
 799       if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 800          i915->state.Fog[I915_FOGREG_MODE3] =
 801             (GLuint) (ctx->Fog.Density * FMC3_D_ONE);
 802       }
 803       else {
 804          fi_type fi;
 805          fi.f = ctx->Fog.Density;
 806          i915->state.Fog[I915_FOGREG_MODE3] = fi.i;
 807       }
 808       break;
 809
 810    case GL_FOG_COLOR:
 811       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 812       i915->state.Fog[I915_FOGREG_COLOR] =
 813          (_3DSTATE_FOG_COLOR_CMD |
 814           ((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
 815           ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
 816           ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
 817       break;
 818
 819    default:
 820       break;
 821    }
 822 }
 823
 824 static void
 825 i915Hint(GLcontext * ctx, GLenum target, GLenum state)
 826 {
 827    switch (target) {
 828    case GL_FOG_HINT:
 829       break;
 830    default:
 831       break;
 832    }
 833 }
 834
 835 /* =============================================================
 836  */
 837
 838 static void
 839 i915Enable(GLcontext * ctx, GLenum cap, GLboolean state)
 840 {
 841    struct i915_context *i915 = I915_CONTEXT(ctx);
 842
 843    switch (cap) {
 844    case GL_TEXTURE_2D:
 845       break;
 846
 847    case GL_LIGHTING:
 848    case GL_COLOR_SUM:
 849       update_specular(ctx);
 850       break;
 851
 852    case GL_ALPHA_TEST:
 853       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 854       if (state)
 855          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_ALPHA_TEST_ENABLE;
 856       else
 857          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_ALPHA_TEST_ENABLE;
 858       break;
 859
 860    case GL_BLEND:
 861       i915EvalLogicOpBlendState(ctx);
 862       break;
 863
 864    case GL_COLOR_LOGIC_OP:
 865       i915EvalLogicOpBlendState(ctx);
 866
 867       /* Logicop doesn't seem to work at 16bpp:
 868        */
 869       if (ctx->Visual.rgbBits == 16)
 870          FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
 871       break;
 872
 873    case GL_FRAGMENT_PROGRAM_ARB:
 874       break;
 875
 876    case GL_DITHER:
 877       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 878       if (state)
 879          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 880       else
 881          i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_COLOR_DITHER_ENABLE;
 882       break;
 883
 884    case GL_DEPTH_TEST:
 885       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 886       if (state)
 887          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_TEST_ENABLE;
 888       else
 889          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_ENABLE;
 890
 891       i915DepthMask(ctx, ctx->Depth.Mask);
 892       break;
 893
 894    case GL_SCISSOR_TEST:
 895       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 896       if (state)
 897          i915->state.Buffer[I915_DESTREG_SENABLE] =
 898             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 899       else
 900          i915->state.Buffer[I915_DESTREG_SENABLE] =
 901             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 902       break;
 903
 904    case GL_LINE_SMOOTH:
 905       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 906       if (state)
 907          i915->state.Ctx[I915_CTXREG_LIS4] |= S4_LINE_ANTIALIAS_ENABLE;
 908       else
 909          i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_LINE_ANTIALIAS_ENABLE;
 910       break;
 911
 912    case GL_FOG:
 913       break;
 914
 915    case GL_CULL_FACE:
 916       i915CullFaceFrontFace(ctx, 0);
 917       break;
 918
 919    case GL_STENCIL_TEST:
 920       {
 921          GLboolean hw_stencil = GL_FALSE;
 922          if (ctx->DrawBuffer) {
 923             struct intel_renderbuffer *irbStencil
 924                = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
 925             hw_stencil = (irbStencil && irbStencil->region);
 926          }
 927          if (hw_stencil) {
 928             I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 929             if (state)
 930                i915->state.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
 931                                                      S5_STENCIL_WRITE_ENABLE);
 932             else
 933                i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
 934                                                       S5_STENCIL_WRITE_ENABLE);
 935          }
 936          else {
 937             FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
 938          }
 939       }
 940       break;
 941
 942    case GL_POLYGON_STIPPLE:
 943       /* The stipple command worked on my 855GM box, but not my 845G.
 944        * I'll do more testing later to find out exactly which hardware
 945        * supports it.  Disabled for now.
 946        */
 947       if (i915->intel.hw_stipple &&
 948           i915->intel.reduced_primitive == GL_TRIANGLES) {
 949          I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 950          if (state)
 951             i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 952          else
 953             i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 954       }
 955       break;
 956
 957    case GL_POLYGON_SMOOTH:
 958       break;
 959
 960    case GL_POINT_SPRITE:
 961       /* This state change is handled in i915_reduced_primitive_state because
 962        * the hardware bit should only be set when rendering points.
 963        */
 964       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 965       if (state)
 966          i915->state.Ctx[I915_CTXREG_LIS4] |= S4_SPRITE_POINT_ENABLE;
 967       else
 968          i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_SPRITE_POINT_ENABLE;
 969       break;
 970
 971    case GL_POINT_SMOOTH:
 972       break;
 973
 974    default:
 975       ;
 976    }
 977 }
 978
 979
 980 static void
 981 i915_init_packets(struct i915_context *i915)
 982 {
 983    /* Zero all state */
 984    memset(&i915->state, 0, sizeof(i915->state));
 985
 986
 987    {
 988       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 989       /* Probably don't want to upload all this stuff every time one
 990        * piece changes.
 991        */
 992       i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 993                                          I1_LOAD_S(2) |
 994                                          I1_LOAD_S(4) |
 995                                          I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
 996       i915->state.Ctx[I915_CTXREG_LIS2] = 0;
 997       i915->state.Ctx[I915_CTXREG_LIS4] = 0;
 998       i915->state.Ctx[I915_CTXREG_LIS5] = 0;
 999
1000       if (i915->intel.ctx.Visual.rgbBits == 16)
1001          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
1002
1003
1004       i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
1005                                            (2 << S6_TRISTRIP_PV_SHIFT));
1006
1007       i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
1008                                              ENABLE_LOGIC_OP_FUNC |
1009                                              LOGIC_OP_FUNC(LOGICOP_COPY) |
1010                                              ENABLE_STENCIL_TEST_MASK |
1011                                              STENCIL_TEST_MASK(0xff) |
1012                                              ENABLE_STENCIL_WRITE_MASK |
1013                                              STENCIL_WRITE_MASK(0xff));
1014
1015       i915->state.Ctx[I915_CTXREG_IAB] =
1016          (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
1017           IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
1018
1019       i915->state.Ctx[I915_CTXREG_BLENDCOLOR0] =
1020          _3DSTATE_CONST_BLEND_COLOR_CMD;
1021       i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = 0;
1022
1023       i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] =
1024          _3DSTATE_BACKFACE_STENCIL_MASKS |
1025          BFM_ENABLE_STENCIL_TEST_MASK |
1026          BFM_ENABLE_STENCIL_WRITE_MASK |
1027          (0xff << BFM_STENCIL_WRITE_MASK_SHIFT) |
1028          (0xff << BFM_STENCIL_TEST_MASK_SHIFT);
1029       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] =
1030          _3DSTATE_BACKFACE_STENCIL_OPS |
1031          BFO_ENABLE_STENCIL_REF |
1032          BFO_ENABLE_STENCIL_FUNCS |
1033          BFO_ENABLE_STENCIL_TWO_SIDE;
1034    }
1035
1036    {
1037       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
1038       i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
1039    }
1040
1041
1042    {
1043       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
1044       i915->state.Fog[I915_FOGREG_MODE0] = _3DSTATE_FOG_MODE_CMD;
1045       i915->state.Fog[I915_FOGREG_MODE1] = (FMC1_FOGFUNC_MODIFY_ENABLE |
1046                                             FMC1_FOGFUNC_VERTEX |
1047                                             FMC1_FOGINDEX_MODIFY_ENABLE |
1048                                             FMC1_FOGINDEX_W |
1049                                             FMC1_C1_C2_MODIFY_ENABLE |
1050                                             FMC1_DENSITY_MODIFY_ENABLE);
1051       i915->state.Fog[I915_FOGREG_COLOR] = _3DSTATE_FOG_COLOR_CMD;
1052    }
1053
1054    {
1055       i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
1056
1057       /* scissor */
1058       i915->state.Buffer[I915_DESTREG_SENABLE] =
1059          (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
1060       i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
1061       i915->state.Buffer[I915_DESTREG_SR1] = 0;
1062       i915->state.Buffer[I915_DESTREG_SR2] = 0;
1063    }
1064
1065    i915->state.RasterRules[I915_RASTER_RULES] = _3DSTATE_RASTER_RULES_CMD |
1066       ENABLE_POINT_RASTER_RULE |
1067       OGL_POINT_RASTER_RULE |
1068       ENABLE_LINE_STRIP_PROVOKE_VRTX |
1069       ENABLE_TRI_FAN_PROVOKE_VRTX |
1070       LINE_STRIP_PROVOKE_VRTX(1) |
1071       TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D;
1072
1073 #if 0
1074    {
1075       I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
1076       i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
1077       i915->state.Default[I915_DEFREG_C1] = 0;
1078       i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
1079       i915->state.Default[I915_DEFREG_S1] = 0;
1080       i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
1081       i915->state.Default[I915_DEFREG_Z1] = 0;
1082    }
1083 #endif
1084
1085
1086    /* These will be emitted every at the head of every buffer, unless
1087     * we get hardware contexts working.
1088     */
1089    i915->state.active = (I915_UPLOAD_PROGRAM |
1090                          I915_UPLOAD_STIPPLE |
1091                          I915_UPLOAD_CTX |
1092                          I915_UPLOAD_BUFFERS |
1093                          I915_UPLOAD_INVARIENT |
1094                          I915_UPLOAD_RASTER_RULES);
1095 }
1096
1097 void
1098 i915_update_provoking_vertex(GLcontext * ctx)
1099 {
1100    struct i915_context *i915 = I915_CONTEXT(ctx);
1101
1102    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1103    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_TRISTRIP_PV_MASK);
1104
1105    I915_STATECHANGE(i915, I915_UPLOAD_RASTER_RULES);
1106    i915->state.RasterRules[I915_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1107                                                    TRI_FAN_PROVOKE_VRTX_MASK);
1108
1109    /* _NEW_LIGHT */
1110    if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1111       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1112                                                      TRI_FAN_PROVOKE_VRTX(2));
1113       i915->state.Ctx[I915_CTXREG_LIS6] |= (2 << S6_TRISTRIP_PV_SHIFT);
1114    } else {
1115       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1116                                                      TRI_FAN_PROVOKE_VRTX(1));
1117       i915->state.Ctx[I915_CTXREG_LIS6] |= (0 << S6_TRISTRIP_PV_SHIFT);
1118     }
1119 }
1120
1121 void
1122 i915InitStateFunctions(struct dd_function_table *functions)
1123 {
1124    functions->AlphaFunc = i915AlphaFunc;
1125    functions->BlendColor = i915BlendColor;
1126    functions->BlendEquationSeparate = i915BlendEquationSeparate;
1127    functions->BlendFuncSeparate = i915BlendFuncSeparate;
1128    functions->ColorMask = i915ColorMask;
1129    functions->CullFace = i915CullFaceFrontFace;
1130    functions->DepthFunc = i915DepthFunc;
1131    functions->DepthMask = i915DepthMask;
1132    functions->Enable = i915Enable;
1133    functions->Fogfv = i915Fogfv;
1134    functions->FrontFace = i915CullFaceFrontFace;
1135    functions->Hint = i915Hint;
1136    functions->LightModelfv = i915LightModelfv;
1137    functions->LineWidth = i915LineWidth;
1138    functions->LogicOpcode = i915LogicOp;
1139    functions->PointSize = i915PointSize;
1140    functions->PointParameterfv = i915PointParameterfv;
1141    functions->PolygonStipple = i915PolygonStipple;
1142    functions->Scissor = i915Scissor;
1143    functions->ShadeModel = i915ShadeModel;
1144    functions->StencilFuncSeparate = i915StencilFuncSeparate;
1145    functions->StencilMaskSeparate = i915StencilMaskSeparate;
1146    functions->StencilOpSeparate = i915StencilOpSeparate;
1147    functions->DepthRange = i915DepthRange;
1148    functions->Viewport = i915Viewport;
1149 }
1150
1151
1152 void
1153 i915InitState(struct i915_context *i915)
1154 {
1155    GLcontext *ctx = &i915->intel.ctx;
1156
1157    i915_init_packets(i915);
1158
1159    _mesa_init_driver_state(ctx);
1160
1161    memcpy(&i915->initial, &i915->state, sizeof(i915->state));
1162    i915->current = &i915->state;
1163 }