i915: Remove the remainder of the batchbuffer caching.
[mesa.git] / src / mesa / drivers / dri / i915 / intel_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
30
31
32 #include <stdbool.h>
33 #include <string.h>
34 #include "main/mtypes.h"
35 #include "main/mm.h"
36
37 #ifdef __cplusplus
38 extern "C" {
39 /* Evil hack for using libdrm in a c++ compiler. */
40 #define virtual virt
41 #endif
42
43 #include "drm.h"
44 #include "intel_bufmgr.h"
45
46 #include "intel_screen.h"
47 #include "intel_tex_obj.h"
48 #include "i915_drm.h"
49
50 #ifdef __cplusplus
51 #undef virtual
52 #endif
53
54 #include "tnl/t_vertex.h"
55
56 #define TAG(x) intel##x
57 #include "tnl_dd/t_dd_vertex.h"
58 #undef TAG
59
60 #define DV_PF_555 (1<<8)
61 #define DV_PF_565 (2<<8)
62 #define DV_PF_8888 (3<<8)
63 #define DV_PF_4444 (8<<8)
64 #define DV_PF_1555 (9<<8)
65
66 struct intel_region;
67 struct intel_context;
68
69 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
70 intelVertex *, intelVertex *);
71 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
72 intelVertex *);
73 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
74
75 /**
76 * Bits for intel->Fallback field
77 */
78 /*@{*/
79 #define INTEL_FALLBACK_DRAW_BUFFER 0x1
80 #define INTEL_FALLBACK_READ_BUFFER 0x2
81 #define INTEL_FALLBACK_DEPTH_BUFFER 0x4
82 #define INTEL_FALLBACK_STENCIL_BUFFER 0x8
83 #define INTEL_FALLBACK_USER 0x10
84 #define INTEL_FALLBACK_RENDERMODE 0x20
85 #define INTEL_FALLBACK_TEXTURE 0x40
86 #define INTEL_FALLBACK_DRIVER 0x1000 /**< first for drivers */
87 /*@}*/
88
89 extern void intelFallback(struct intel_context *intel, GLbitfield bit,
90 bool mode);
91 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
92
93
94 #define INTEL_WRITE_PART 0x1
95 #define INTEL_WRITE_FULL 0x2
96 #define INTEL_READ 0x4
97
98 #define INTEL_MAX_FIXUP 64
99
100 #ifndef likely
101 #ifdef __GNUC__
102 #define likely(expr) (__builtin_expect(expr, 1))
103 #define unlikely(expr) (__builtin_expect(expr, 0))
104 #else
105 #define likely(expr) (expr)
106 #define unlikely(expr) (expr)
107 #endif
108 #endif
109
110 struct intel_sync_object {
111 struct gl_sync_object Base;
112
113 /** Batch associated with this sync object */
114 drm_intel_bo *bo;
115 };
116
117 struct brw_context;
118
119 struct intel_batchbuffer {
120 /** Current batchbuffer being queued up. */
121 drm_intel_bo *bo;
122 /** Last BO submitted to the hardware. Used for glFinish(). */
123 drm_intel_bo *last_bo;
124
125 uint16_t emit, total;
126 uint16_t used, reserved_space;
127 uint32_t *map;
128 uint32_t *cpu_map;
129 #define BATCH_SZ (8192*sizeof(uint32_t))
130
131 uint32_t state_batch_offset;
132 bool is_blit;
133 bool needs_sol_reset;
134 };
135
136 /**
137 * intel_context is derived from Mesa's context class: struct gl_context.
138 */
139 struct intel_context
140 {
141 struct gl_context ctx; /**< base class, must be first field */
142
143 struct
144 {
145 void (*destroy) (struct intel_context * intel);
146 void (*emit_state) (struct intel_context * intel);
147 void (*finish_batch) (struct intel_context * intel);
148 void (*new_batch) (struct intel_context * intel);
149 void (*emit_invarient_state) (struct intel_context * intel);
150 void (*update_texture_state) (struct intel_context * intel);
151
152 void (*render_start) (struct intel_context * intel);
153 void (*render_prevalidate) (struct intel_context * intel);
154 void (*set_draw_region) (struct intel_context * intel,
155 struct intel_region * draw_regions[],
156 struct intel_region * depth_region,
157 GLuint num_regions);
158 void (*update_draw_buffer)(struct intel_context *intel);
159
160 void (*reduced_primitive_state) (struct intel_context * intel,
161 GLenum rprim);
162
163 bool (*check_vertex_size) (struct intel_context * intel,
164 GLuint expected);
165 void (*invalidate_state) (struct intel_context *intel,
166 GLuint new_state);
167
168 void (*assert_not_dirty) (struct intel_context *intel);
169
170 void (*debug_batch)(struct intel_context *intel);
171 void (*annotate_aub)(struct intel_context *intel);
172 bool (*render_target_supported)(struct intel_context *intel,
173 struct gl_renderbuffer *rb);
174
175 /**
176 * Surface state operations (i965+ only)
177 * \{
178 */
179 void (*update_texture_surface)(struct gl_context *ctx,
180 unsigned unit,
181 uint32_t *binding_table,
182 unsigned surf_index);
183 void (*update_renderbuffer_surface)(struct brw_context *brw,
184 struct gl_renderbuffer *rb,
185 bool layered,
186 unsigned unit);
187 void (*update_null_renderbuffer_surface)(struct brw_context *brw,
188 unsigned unit);
189 void (*create_constant_surface)(struct brw_context *brw,
190 drm_intel_bo *bo,
191 uint32_t offset,
192 uint32_t size,
193 uint32_t *out_offset,
194 bool dword_pitch);
195 /** \} */
196 } vtbl;
197
198 GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */
199 GLuint NewGLState;
200
201 dri_bufmgr *bufmgr;
202 unsigned int maxBatchSize;
203
204 /**
205 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
206 */
207 int gen;
208 int gt;
209 bool is_haswell;
210 bool is_baytrail;
211 bool is_g4x;
212 bool is_945;
213 bool has_llc;
214 bool has_swizzling;
215
216 int urb_size;
217
218 drm_intel_context *hw_ctx;
219
220 struct intel_batchbuffer batch;
221
222 drm_intel_bo *first_post_swapbuffers_batch;
223 bool need_throttle;
224 bool no_batch_wrap;
225 bool tnl_pipeline_running; /**< Set while i915's _tnl_run_pipeline. */
226
227 /**
228 * Set if we're either a debug context or the INTEL_DEBUG=perf environment
229 * variable is set, this is the flag indicating to do expensive work that
230 * might lead to a perf_debug() call.
231 */
232 bool perf_debug;
233
234 struct
235 {
236 GLuint id;
237 uint32_t start_ptr; /**< for i8xx */
238 uint32_t primitive; /**< Current hardware primitive type */
239 void (*flush) (struct intel_context *);
240 drm_intel_bo *vb_bo;
241 uint8_t *vb;
242 unsigned int start_offset; /**< Byte offset of primitive sequence */
243 unsigned int current_offset; /**< Byte offset of next vertex */
244 unsigned int count; /**< Number of vertices in current primitive */
245 } prim;
246
247 struct {
248 drm_intel_bo *bo;
249 GLuint offset;
250 uint32_t buffer_len;
251 uint32_t buffer_offset;
252 char buffer[4096];
253 } upload;
254
255 uint32_t max_gtt_map_object_size;
256
257 GLuint stats_wm;
258
259 /* Offsets of fields within the current vertex:
260 */
261 GLuint coloroffset;
262 GLuint specoffset;
263 GLuint wpos_offset;
264
265 struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
266 GLuint vertex_attr_count;
267
268 GLfloat polygon_offset_scale; /* dependent on depth_scale, bpp */
269
270 bool hw_stencil;
271 bool hw_stipple;
272 bool no_rast;
273 bool always_flush_batch;
274 bool always_flush_cache;
275 bool disable_throttling;
276
277 /* State for intelvb.c and inteltris.c.
278 */
279 GLuint RenderIndex;
280 GLmatrix ViewportMatrix;
281 GLenum render_primitive;
282 GLenum reduced_primitive; /*< Only gen < 6 */
283 GLuint vertex_size;
284 GLubyte *verts; /* points to tnl->clipspace.vertex_buf */
285
286 /* Fallback rasterization functions
287 */
288 intel_point_func draw_point;
289 intel_line_func draw_line;
290 intel_tri_func draw_tri;
291
292 /**
293 * Set if rendering has occured to the drawable's front buffer.
294 *
295 * This is used in the DRI2 case to detect that glFlush should also copy
296 * the contents of the fake front buffer to the real front buffer.
297 */
298 bool front_buffer_dirty;
299
300 /**
301 * Track whether front-buffer rendering is currently enabled
302 *
303 * A separate flag is used to track this in order to support MRT more
304 * easily.
305 */
306 bool is_front_buffer_rendering;
307 /**
308 * Track whether front-buffer is the current read target.
309 *
310 * This is closely associated with is_front_buffer_rendering, but may
311 * be set separately. The DRI2 fake front buffer must be referenced
312 * either way.
313 */
314 bool is_front_buffer_reading;
315
316 bool use_early_z;
317
318 int driFd;
319
320 __DRIcontext *driContext;
321 struct intel_screen *intelScreen;
322 void (*saved_viewport)(struct gl_context * ctx,
323 GLint x, GLint y, GLsizei width, GLsizei height);
324
325 /**
326 * Configuration cache
327 */
328 driOptionCache optionCache;
329 };
330
331 extern char *__progname;
332
333
334 #define SUBPIXEL_X 0.125
335 #define SUBPIXEL_Y 0.125
336
337 /**
338 * Align a value down to an alignment value
339 *
340 * If \c value is not already aligned to the requested alignment value, it
341 * will be rounded down.
342 *
343 * \param value Value to be rounded
344 * \param alignment Alignment value to be used. This must be a power of two.
345 *
346 * \sa ALIGN()
347 */
348 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
349
350 static INLINE uint32_t
351 U_FIXED(float value, uint32_t frac_bits)
352 {
353 value *= (1 << frac_bits);
354 return value < 0 ? 0 : value;
355 }
356
357 static INLINE uint32_t
358 S_FIXED(float value, uint32_t frac_bits)
359 {
360 return value * (1 << frac_bits);
361 }
362
363 #define INTEL_FIREVERTICES(intel) \
364 do { \
365 if ((intel)->prim.flush) \
366 (intel)->prim.flush(intel); \
367 } while (0)
368
369 /* ================================================================
370 * From linux kernel i386 header files, copes with odd sizes better
371 * than COPY_DWORDS would:
372 * XXX Put this in src/mesa/main/imports.h ???
373 */
374 #if defined(i386) || defined(__i386__)
375 static INLINE void * __memcpy(void * to, const void * from, size_t n)
376 {
377 int d0, d1, d2;
378 __asm__ __volatile__(
379 "rep ; movsl\n\t"
380 "testb $2,%b4\n\t"
381 "je 1f\n\t"
382 "movsw\n"
383 "1:\ttestb $1,%b4\n\t"
384 "je 2f\n\t"
385 "movsb\n"
386 "2:"
387 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
388 :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
389 : "memory");
390 return (to);
391 }
392 #else
393 #define __memcpy(a,b,c) memcpy(a,b,c)
394 #endif
395
396
397 /* ================================================================
398 * Debugging:
399 */
400 extern int INTEL_DEBUG;
401
402 #define DEBUG_TEXTURE 0x1
403 #define DEBUG_STATE 0x2
404 #define DEBUG_IOCTL 0x4
405 #define DEBUG_BLIT 0x8
406 #define DEBUG_MIPTREE 0x10
407 #define DEBUG_PERF 0x20
408 #define DEBUG_BATCH 0x80
409 #define DEBUG_PIXEL 0x100
410 #define DEBUG_BUFMGR 0x200
411 #define DEBUG_REGION 0x400
412 #define DEBUG_FBO 0x800
413 #define DEBUG_GS 0x1000
414 #define DEBUG_SYNC 0x2000
415 #define DEBUG_PRIMS 0x4000
416 #define DEBUG_VERTS 0x8000
417 #define DEBUG_DRI 0x10000
418 #define DEBUG_SF 0x20000
419 #define DEBUG_STATS 0x100000
420 #define DEBUG_WM 0x400000
421 #define DEBUG_URB 0x800000
422 #define DEBUG_VS 0x1000000
423 #define DEBUG_CLIP 0x2000000
424 #define DEBUG_AUB 0x4000000
425 #define DEBUG_BLORP 0x10000000
426 #define DEBUG_NO16 0x20000000
427
428 #ifdef HAVE_ANDROID_PLATFORM
429 #define LOG_TAG "INTEL-MESA"
430 #include <cutils/log.h>
431 #ifndef ALOGW
432 #define ALOGW LOGW
433 #endif
434 #define dbg_printf(...) ALOGW(__VA_ARGS__)
435 #else
436 #define dbg_printf(...) printf(__VA_ARGS__)
437 #endif /* HAVE_ANDROID_PLATFORM */
438
439 #define DBG(...) do { \
440 if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG)) \
441 dbg_printf(__VA_ARGS__); \
442 } while(0)
443
444 #define perf_debug(...) do { \
445 static GLuint msg_id = 0; \
446 if (unlikely(INTEL_DEBUG & DEBUG_PERF)) \
447 dbg_printf(__VA_ARGS__); \
448 if (intel->perf_debug) \
449 _mesa_gl_debug(&intel->ctx, &msg_id, \
450 MESA_DEBUG_TYPE_PERFORMANCE, \
451 MESA_DEBUG_SEVERITY_MEDIUM, \
452 __VA_ARGS__); \
453 } while(0)
454
455 #define WARN_ONCE(cond, fmt...) do { \
456 if (unlikely(cond)) { \
457 static bool _warned = false; \
458 static GLuint msg_id = 0; \
459 if (!_warned) { \
460 fprintf(stderr, "WARNING: "); \
461 fprintf(stderr, fmt); \
462 _warned = true; \
463 \
464 _mesa_gl_debug(ctx, &msg_id, \
465 MESA_DEBUG_TYPE_OTHER, \
466 MESA_DEBUG_SEVERITY_HIGH, fmt); \
467 } \
468 } \
469 } while (0)
470
471 #define PCI_CHIP_845_G 0x2562
472 #define PCI_CHIP_I830_M 0x3577
473 #define PCI_CHIP_I855_GM 0x3582
474 #define PCI_CHIP_I865_G 0x2572
475 #define PCI_CHIP_I915_G 0x2582
476 #define PCI_CHIP_I915_GM 0x2592
477 #define PCI_CHIP_I945_G 0x2772
478 #define PCI_CHIP_I945_GM 0x27A2
479 #define PCI_CHIP_I945_GME 0x27AE
480 #define PCI_CHIP_G33_G 0x29C2
481 #define PCI_CHIP_Q35_G 0x29B2
482 #define PCI_CHIP_Q33_G 0x29D2
483
484
485 /* ================================================================
486 * intel_context.c:
487 */
488
489 extern bool intelInitContext(struct intel_context *intel,
490 int api,
491 unsigned major_version,
492 unsigned minor_version,
493 const struct gl_config * mesaVis,
494 __DRIcontext * driContextPriv,
495 void *sharedContextPrivate,
496 struct dd_function_table *functions,
497 unsigned *dri_ctx_error);
498
499 extern void intelFinish(struct gl_context * ctx);
500 extern void intel_flush_rendering_to_batch(struct gl_context *ctx);
501 extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
502
503 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
504
505 extern void intelInitDriverFunctions(struct dd_function_table *functions);
506
507 void intel_init_syncobj_functions(struct dd_function_table *functions);
508
509
510 /* ================================================================
511 * intel_state.c:
512 */
513
514 #define COMPAREFUNC_ALWAYS 0
515 #define COMPAREFUNC_NEVER 0x1
516 #define COMPAREFUNC_LESS 0x2
517 #define COMPAREFUNC_EQUAL 0x3
518 #define COMPAREFUNC_LEQUAL 0x4
519 #define COMPAREFUNC_GREATER 0x5
520 #define COMPAREFUNC_NOTEQUAL 0x6
521 #define COMPAREFUNC_GEQUAL 0x7
522
523 #define STENCILOP_KEEP 0
524 #define STENCILOP_ZERO 0x1
525 #define STENCILOP_REPLACE 0x2
526 #define STENCILOP_INCRSAT 0x3
527 #define STENCILOP_DECRSAT 0x4
528 #define STENCILOP_INCR 0x5
529 #define STENCILOP_DECR 0x6
530 #define STENCILOP_INVERT 0x7
531
532 #define LOGICOP_CLEAR 0
533 #define LOGICOP_NOR 0x1
534 #define LOGICOP_AND_INV 0x2
535 #define LOGICOP_COPY_INV 0x3
536 #define LOGICOP_AND_RVRSE 0x4
537 #define LOGICOP_INV 0x5
538 #define LOGICOP_XOR 0x6
539 #define LOGICOP_NAND 0x7
540 #define LOGICOP_AND 0x8
541 #define LOGICOP_EQUIV 0x9
542 #define LOGICOP_NOOP 0xa
543 #define LOGICOP_OR_INV 0xb
544 #define LOGICOP_COPY 0xc
545 #define LOGICOP_OR_RVRSE 0xd
546 #define LOGICOP_OR 0xe
547 #define LOGICOP_SET 0xf
548
549 #define BLENDFACT_ZERO 0x01
550 #define BLENDFACT_ONE 0x02
551 #define BLENDFACT_SRC_COLR 0x03
552 #define BLENDFACT_INV_SRC_COLR 0x04
553 #define BLENDFACT_SRC_ALPHA 0x05
554 #define BLENDFACT_INV_SRC_ALPHA 0x06
555 #define BLENDFACT_DST_ALPHA 0x07
556 #define BLENDFACT_INV_DST_ALPHA 0x08
557 #define BLENDFACT_DST_COLR 0x09
558 #define BLENDFACT_INV_DST_COLR 0x0a
559 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
560 #define BLENDFACT_CONST_COLOR 0x0c
561 #define BLENDFACT_INV_CONST_COLOR 0x0d
562 #define BLENDFACT_CONST_ALPHA 0x0e
563 #define BLENDFACT_INV_CONST_ALPHA 0x0f
564 #define BLENDFACT_MASK 0x0f
565
566 enum {
567 DRI_CONF_BO_REUSE_DISABLED,
568 DRI_CONF_BO_REUSE_ALL
569 };
570
571 extern int intel_translate_shadow_compare_func(GLenum func);
572 extern int intel_translate_compare_func(GLenum func);
573 extern int intel_translate_stencil_op(GLenum op);
574 extern int intel_translate_blend_factor(GLenum factor);
575 extern int intel_translate_logic_op(GLenum opcode);
576
577 void intel_update_renderbuffers(__DRIcontext *context,
578 __DRIdrawable *drawable);
579 void intel_prepare_render(struct intel_context *intel);
580
581 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
582 uint32_t buffer_id);
583 void intel_init_texture_formats(struct gl_context *ctx);
584
585 /*======================================================================
586 * Inline conversion functions.
587 * These are better-typed than the macros used previously:
588 */
589 static INLINE struct intel_context *
590 intel_context(struct gl_context * ctx)
591 {
592 return (struct intel_context *) ctx;
593 }
594
595 static INLINE bool
596 is_power_of_two(uint32_t value)
597 {
598 return (value & (value - 1)) == 0;
599 }
600
601 #ifdef __cplusplus
602 }
603 #endif
604
605 #endif