i915: Fix build error.
[mesa.git] / src / mesa / drivers / dri / i915 / intel_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
30
31
32 #include <stdbool.h>
33 #include <string.h>
34 #include "main/mtypes.h"
35 #include "main/mm.h"
36
37 #ifdef __cplusplus
38 extern "C" {
39 /* Evil hack for using libdrm in a c++ compiler. */
40 #define virtual virt
41 #endif
42
43 #include "drm.h"
44 #include "intel_bufmgr.h"
45
46 #include "intel_screen.h"
47 #include "intel_tex_obj.h"
48 #include "i915_drm.h"
49
50 #ifdef __cplusplus
51 #undef virtual
52 #endif
53
54 #include "tnl/t_vertex.h"
55
56 #define TAG(x) intel##x
57 #include "tnl_dd/t_dd_vertex.h"
58 #undef TAG
59
60 #define DV_PF_555 (1<<8)
61 #define DV_PF_565 (2<<8)
62 #define DV_PF_8888 (3<<8)
63 #define DV_PF_4444 (8<<8)
64 #define DV_PF_1555 (9<<8)
65
66 struct intel_region;
67 struct intel_context;
68
69 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
70 intelVertex *, intelVertex *);
71 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
72 intelVertex *);
73 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
74
75 /**
76 * Bits for intel->Fallback field
77 */
78 /*@{*/
79 #define INTEL_FALLBACK_DRAW_BUFFER 0x1
80 #define INTEL_FALLBACK_READ_BUFFER 0x2
81 #define INTEL_FALLBACK_DEPTH_BUFFER 0x4
82 #define INTEL_FALLBACK_STENCIL_BUFFER 0x8
83 #define INTEL_FALLBACK_USER 0x10
84 #define INTEL_FALLBACK_RENDERMODE 0x20
85 #define INTEL_FALLBACK_TEXTURE 0x40
86 #define INTEL_FALLBACK_DRIVER 0x1000 /**< first for drivers */
87 /*@}*/
88
89 extern void intelFallback(struct intel_context *intel, GLbitfield bit,
90 bool mode);
91 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
92
93
94 #define INTEL_WRITE_PART 0x1
95 #define INTEL_WRITE_FULL 0x2
96 #define INTEL_READ 0x4
97
98 #ifndef likely
99 #ifdef __GNUC__
100 #define likely(expr) (__builtin_expect(expr, 1))
101 #define unlikely(expr) (__builtin_expect(expr, 0))
102 #else
103 #define likely(expr) (expr)
104 #define unlikely(expr) (expr)
105 #endif
106 #endif
107
108 struct intel_sync_object {
109 struct gl_sync_object Base;
110
111 /** Batch associated with this sync object */
112 drm_intel_bo *bo;
113 };
114
115 struct intel_batchbuffer {
116 /** Current batchbuffer being queued up. */
117 drm_intel_bo *bo;
118 /** Last BO submitted to the hardware. Used for glFinish(). */
119 drm_intel_bo *last_bo;
120
121 uint16_t emit, total;
122 uint16_t used, reserved_space;
123 uint32_t *map;
124 uint32_t *cpu_map;
125 #define BATCH_SZ (8192*sizeof(uint32_t))
126 };
127
128 /**
129 * intel_context is derived from Mesa's context class: struct gl_context.
130 */
131 struct intel_context
132 {
133 struct gl_context ctx; /**< base class, must be first field */
134
135 struct
136 {
137 void (*destroy) (struct intel_context * intel);
138 void (*emit_state) (struct intel_context * intel);
139 void (*finish_batch) (struct intel_context * intel);
140 void (*new_batch) (struct intel_context * intel);
141 void (*emit_invarient_state) (struct intel_context * intel);
142 void (*update_texture_state) (struct intel_context * intel);
143
144 void (*render_start) (struct intel_context * intel);
145 void (*render_prevalidate) (struct intel_context * intel);
146 void (*set_draw_region) (struct intel_context * intel,
147 struct intel_region * draw_regions[],
148 struct intel_region * depth_region,
149 GLuint num_regions);
150 void (*update_draw_buffer)(struct intel_context *intel);
151
152 void (*reduced_primitive_state) (struct intel_context * intel,
153 GLenum rprim);
154
155 bool (*check_vertex_size) (struct intel_context * intel,
156 GLuint expected);
157 void (*invalidate_state) (struct intel_context *intel,
158 GLuint new_state);
159
160 void (*assert_not_dirty) (struct intel_context *intel);
161
162 void (*debug_batch)(struct intel_context *intel);
163 void (*annotate_aub)(struct intel_context *intel);
164 bool (*render_target_supported)(struct intel_context *intel,
165 struct gl_renderbuffer *rb);
166 } vtbl;
167
168 GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */
169 GLuint NewGLState;
170
171 dri_bufmgr *bufmgr;
172 unsigned int maxBatchSize;
173
174 /**
175 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
176 */
177 int gen;
178 bool is_945;
179 bool has_swizzling;
180
181 struct intel_batchbuffer batch;
182
183 drm_intel_bo *first_post_swapbuffers_batch;
184 bool need_throttle;
185 bool no_batch_wrap;
186 bool tnl_pipeline_running; /**< Set while i915's _tnl_run_pipeline. */
187
188 /**
189 * Set if we're either a debug context or the INTEL_DEBUG=perf environment
190 * variable is set, this is the flag indicating to do expensive work that
191 * might lead to a perf_debug() call.
192 */
193 bool perf_debug;
194
195 struct
196 {
197 GLuint id;
198 uint32_t start_ptr; /**< for i8xx */
199 uint32_t primitive; /**< Current hardware primitive type */
200 void (*flush) (struct intel_context *);
201 drm_intel_bo *vb_bo;
202 uint8_t *vb;
203 unsigned int start_offset; /**< Byte offset of primitive sequence */
204 unsigned int current_offset; /**< Byte offset of next vertex */
205 unsigned int count; /**< Number of vertices in current primitive */
206 } prim;
207
208 struct {
209 drm_intel_bo *bo;
210 GLuint offset;
211 uint32_t buffer_len;
212 uint32_t buffer_offset;
213 char buffer[4096];
214 } upload;
215
216 uint32_t max_gtt_map_object_size;
217
218 /* Offsets of fields within the current vertex:
219 */
220 GLuint coloroffset;
221 GLuint specoffset;
222 GLuint wpos_offset;
223
224 struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
225 GLuint vertex_attr_count;
226
227 GLfloat polygon_offset_scale; /* dependent on depth_scale, bpp */
228
229 bool hw_stencil;
230 bool hw_stipple;
231 bool no_rast;
232 bool always_flush_batch;
233 bool always_flush_cache;
234 bool disable_throttling;
235
236 /* State for intelvb.c and inteltris.c.
237 */
238 GLuint RenderIndex;
239 GLmatrix ViewportMatrix;
240 GLenum render_primitive;
241 GLenum reduced_primitive; /*< Only gen < 6 */
242 GLuint vertex_size;
243 GLubyte *verts; /* points to tnl->clipspace.vertex_buf */
244
245 /* Fallback rasterization functions
246 */
247 intel_point_func draw_point;
248 intel_line_func draw_line;
249 intel_tri_func draw_tri;
250
251 /**
252 * Set if rendering has occured to the drawable's front buffer.
253 *
254 * This is used in the DRI2 case to detect that glFlush should also copy
255 * the contents of the fake front buffer to the real front buffer.
256 */
257 bool front_buffer_dirty;
258
259 /**
260 * Track whether front-buffer rendering is currently enabled
261 *
262 * A separate flag is used to track this in order to support MRT more
263 * easily.
264 */
265 bool is_front_buffer_rendering;
266 /**
267 * Track whether front-buffer is the current read target.
268 *
269 * This is closely associated with is_front_buffer_rendering, but may
270 * be set separately. The DRI2 fake front buffer must be referenced
271 * either way.
272 */
273 bool is_front_buffer_reading;
274
275 bool use_early_z;
276
277 int driFd;
278
279 __DRIcontext *driContext;
280 struct intel_screen *intelScreen;
281
282 /**
283 * Configuration cache
284 */
285 driOptionCache optionCache;
286 };
287
288 extern char *__progname;
289
290
291 #define SUBPIXEL_X 0.125
292 #define SUBPIXEL_Y 0.125
293
294 #define INTEL_FIREVERTICES(intel) \
295 do { \
296 if ((intel)->prim.flush) \
297 (intel)->prim.flush(intel); \
298 } while (0)
299
300 /* ================================================================
301 * From linux kernel i386 header files, copes with odd sizes better
302 * than COPY_DWORDS would:
303 * XXX Put this in src/mesa/main/imports.h ???
304 */
305 #if defined(i386) || defined(__i386__)
306 static INLINE void * __memcpy(void * to, const void * from, size_t n)
307 {
308 int d0, d1, d2;
309 __asm__ __volatile__(
310 "rep ; movsl\n\t"
311 "testb $2,%b4\n\t"
312 "je 1f\n\t"
313 "movsw\n"
314 "1:\ttestb $1,%b4\n\t"
315 "je 2f\n\t"
316 "movsb\n"
317 "2:"
318 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
319 :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
320 : "memory");
321 return (to);
322 }
323 #else
324 #define __memcpy(a,b,c) memcpy(a,b,c)
325 #endif
326
327
328 /* ================================================================
329 * Debugging:
330 */
331 extern int INTEL_DEBUG;
332
333 #define DEBUG_TEXTURE 0x1
334 #define DEBUG_STATE 0x2
335 #define DEBUG_BLIT 0x8
336 #define DEBUG_MIPTREE 0x10
337 #define DEBUG_PERF 0x20
338 #define DEBUG_BATCH 0x80
339 #define DEBUG_PIXEL 0x100
340 #define DEBUG_BUFMGR 0x200
341 #define DEBUG_REGION 0x400
342 #define DEBUG_FBO 0x800
343 #define DEBUG_SYNC 0x2000
344 #define DEBUG_DRI 0x10000
345 #define DEBUG_STATS 0x100000
346 #define DEBUG_WM 0x400000
347 #define DEBUG_AUB 0x4000000
348
349 #ifdef HAVE_ANDROID_PLATFORM
350 #define LOG_TAG "INTEL-MESA"
351 #include <cutils/log.h>
352 #ifndef ALOGW
353 #define ALOGW LOGW
354 #endif
355 #define dbg_printf(...) ALOGW(__VA_ARGS__)
356 #else
357 #define dbg_printf(...) printf(__VA_ARGS__)
358 #endif /* HAVE_ANDROID_PLATFORM */
359
360 #define DBG(...) do { \
361 if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG)) \
362 dbg_printf(__VA_ARGS__); \
363 } while(0)
364
365 #define perf_debug(...) do { \
366 static GLuint msg_id = 0; \
367 if (unlikely(INTEL_DEBUG & DEBUG_PERF)) \
368 dbg_printf(__VA_ARGS__); \
369 if (intel->perf_debug) \
370 _mesa_gl_debug(&intel->ctx, &msg_id, \
371 MESA_DEBUG_TYPE_PERFORMANCE, \
372 MESA_DEBUG_SEVERITY_MEDIUM, \
373 __VA_ARGS__); \
374 } while(0)
375
376 #define WARN_ONCE(cond, fmt...) do { \
377 if (unlikely(cond)) { \
378 static bool _warned = false; \
379 static GLuint msg_id = 0; \
380 if (!_warned) { \
381 fprintf(stderr, "WARNING: "); \
382 fprintf(stderr, fmt); \
383 _warned = true; \
384 \
385 _mesa_gl_debug(ctx, &msg_id, \
386 MESA_DEBUG_TYPE_OTHER, \
387 MESA_DEBUG_SEVERITY_HIGH, fmt); \
388 } \
389 } \
390 } while (0)
391
392 /* ================================================================
393 * intel_context.c:
394 */
395
396 extern const char *const i915_vendor_string;
397
398 extern const char *i915_get_renderer_string(unsigned deviceID);
399
400 extern bool intelInitContext(struct intel_context *intel,
401 int api,
402 unsigned major_version,
403 unsigned minor_version,
404 uint32_t flags,
405 const struct gl_config * mesaVis,
406 __DRIcontext * driContextPriv,
407 void *sharedContextPrivate,
408 struct dd_function_table *functions,
409 unsigned *dri_ctx_error);
410
411 extern void intelFinish(struct gl_context * ctx);
412 extern void intel_flush_rendering_to_batch(struct gl_context *ctx);
413 extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
414
415 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
416
417 extern void intelInitDriverFunctions(struct dd_function_table *functions);
418
419 void intel_init_syncobj_functions(struct dd_function_table *functions);
420
421
422 /* ================================================================
423 * intel_state.c:
424 */
425
426 #define COMPAREFUNC_ALWAYS 0
427 #define COMPAREFUNC_NEVER 0x1
428 #define COMPAREFUNC_LESS 0x2
429 #define COMPAREFUNC_EQUAL 0x3
430 #define COMPAREFUNC_LEQUAL 0x4
431 #define COMPAREFUNC_GREATER 0x5
432 #define COMPAREFUNC_NOTEQUAL 0x6
433 #define COMPAREFUNC_GEQUAL 0x7
434
435 #define STENCILOP_KEEP 0
436 #define STENCILOP_ZERO 0x1
437 #define STENCILOP_REPLACE 0x2
438 #define STENCILOP_INCRSAT 0x3
439 #define STENCILOP_DECRSAT 0x4
440 #define STENCILOP_INCR 0x5
441 #define STENCILOP_DECR 0x6
442 #define STENCILOP_INVERT 0x7
443
444 #define LOGICOP_CLEAR 0
445 #define LOGICOP_NOR 0x1
446 #define LOGICOP_AND_INV 0x2
447 #define LOGICOP_COPY_INV 0x3
448 #define LOGICOP_AND_RVRSE 0x4
449 #define LOGICOP_INV 0x5
450 #define LOGICOP_XOR 0x6
451 #define LOGICOP_NAND 0x7
452 #define LOGICOP_AND 0x8
453 #define LOGICOP_EQUIV 0x9
454 #define LOGICOP_NOOP 0xa
455 #define LOGICOP_OR_INV 0xb
456 #define LOGICOP_COPY 0xc
457 #define LOGICOP_OR_RVRSE 0xd
458 #define LOGICOP_OR 0xe
459 #define LOGICOP_SET 0xf
460
461 #define BLENDFACT_ZERO 0x01
462 #define BLENDFACT_ONE 0x02
463 #define BLENDFACT_SRC_COLR 0x03
464 #define BLENDFACT_INV_SRC_COLR 0x04
465 #define BLENDFACT_SRC_ALPHA 0x05
466 #define BLENDFACT_INV_SRC_ALPHA 0x06
467 #define BLENDFACT_DST_ALPHA 0x07
468 #define BLENDFACT_INV_DST_ALPHA 0x08
469 #define BLENDFACT_DST_COLR 0x09
470 #define BLENDFACT_INV_DST_COLR 0x0a
471 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
472 #define BLENDFACT_CONST_COLOR 0x0c
473 #define BLENDFACT_INV_CONST_COLOR 0x0d
474 #define BLENDFACT_CONST_ALPHA 0x0e
475 #define BLENDFACT_INV_CONST_ALPHA 0x0f
476 #define BLENDFACT_MASK 0x0f
477
478 enum {
479 DRI_CONF_BO_REUSE_DISABLED,
480 DRI_CONF_BO_REUSE_ALL
481 };
482
483 extern int intel_translate_shadow_compare_func(GLenum func);
484 extern int intel_translate_compare_func(GLenum func);
485 extern int intel_translate_stencil_op(GLenum op);
486 extern int intel_translate_blend_factor(GLenum factor);
487 extern int intel_translate_logic_op(GLenum opcode);
488
489 void intel_update_renderbuffers(__DRIcontext *context,
490 __DRIdrawable *drawable);
491 void intel_prepare_render(struct intel_context *intel);
492
493 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
494 uint32_t buffer_id);
495 void intel_init_texture_formats(struct gl_context *ctx);
496
497 /*======================================================================
498 * Inline conversion functions.
499 * These are better-typed than the macros used previously:
500 */
501 static INLINE struct intel_context *
502 intel_context(struct gl_context * ctx)
503 {
504 return (struct intel_context *) ctx;
505 }
506
507 #ifdef __cplusplus
508 }
509 #endif
510
511 #endif