android: change include "cutils/log.h" to "log/log.h" on Android API >=26
[mesa.git] / src / mesa / drivers / dri / i915 / intel_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
30
31
32 #include <stdbool.h>
33 #include <string.h>
34 #include "main/mtypes.h"
35 #include "main/errors.h"
36
37 #include <drm.h>
38 #include <intel_bufmgr.h>
39 #include <i915_drm.h>
40
41 #include "intel_screen.h"
42 #include "intel_tex_obj.h"
43
44 #include "tnl/t_vertex.h"
45
46 #define TAG(x) intel##x
47 #include "tnl_dd/t_dd_vertex.h"
48 #undef TAG
49
50 #define DV_PF_555 (1<<8)
51 #define DV_PF_565 (2<<8)
52 #define DV_PF_8888 (3<<8)
53 #define DV_PF_4444 (8<<8)
54 #define DV_PF_1555 (9<<8)
55
56 struct intel_region;
57 struct intel_context;
58
59 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
60 intelVertex *, intelVertex *);
61 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
62 intelVertex *);
63 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
64
65 /**
66 * Bits for intel->Fallback field
67 */
68 /*@{*/
69 #define INTEL_FALLBACK_DRAW_BUFFER 0x1
70 #define INTEL_FALLBACK_READ_BUFFER 0x2
71 #define INTEL_FALLBACK_DEPTH_BUFFER 0x4
72 #define INTEL_FALLBACK_STENCIL_BUFFER 0x8
73 #define INTEL_FALLBACK_USER 0x10
74 #define INTEL_FALLBACK_RENDERMODE 0x20
75 #define INTEL_FALLBACK_TEXTURE 0x40
76 #define INTEL_FALLBACK_DRIVER 0x1000 /**< first for drivers */
77 /*@}*/
78
79 extern void intelFallback(struct intel_context *intel, GLbitfield bit,
80 bool mode);
81 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
82
83
84 #define INTEL_WRITE_PART 0x1
85 #define INTEL_WRITE_FULL 0x2
86 #define INTEL_READ 0x4
87
88 #ifndef likely
89 #ifdef __GNUC__
90 #define likely(expr) (__builtin_expect(expr, 1))
91 #define unlikely(expr) (__builtin_expect(expr, 0))
92 #else
93 #define likely(expr) (expr)
94 #define unlikely(expr) (expr)
95 #endif
96 #endif
97
98 struct intel_batchbuffer {
99 /** Current batchbuffer being queued up. */
100 drm_intel_bo *bo;
101 /** Last BO submitted to the hardware. Used for glFinish(). */
102 drm_intel_bo *last_bo;
103
104 uint16_t emit, total;
105 uint16_t used, reserved_space;
106 uint32_t *map;
107 uint32_t *cpu_map;
108 #define BATCH_SZ (8192*sizeof(uint32_t))
109 };
110
111 /**
112 * intel_context is derived from Mesa's context class: struct gl_context.
113 */
114 struct intel_context
115 {
116 struct gl_context ctx; /**< base class, must be first field */
117
118 struct
119 {
120 void (*destroy) (struct intel_context * intel);
121 void (*emit_state) (struct intel_context * intel);
122 void (*finish_batch) (struct intel_context * intel);
123 void (*new_batch) (struct intel_context * intel);
124 void (*emit_invarient_state) (struct intel_context * intel);
125 void (*update_texture_state) (struct intel_context * intel);
126
127 void (*render_start) (struct intel_context * intel);
128 void (*render_prevalidate) (struct intel_context * intel);
129 void (*set_draw_region) (struct intel_context * intel,
130 struct intel_region * draw_regions[],
131 struct intel_region * depth_region,
132 GLuint num_regions);
133 void (*update_draw_buffer)(struct intel_context *intel);
134
135 void (*reduced_primitive_state) (struct intel_context * intel,
136 GLenum rprim);
137
138 bool (*check_vertex_size) (struct intel_context * intel,
139 GLuint expected);
140 void (*invalidate_state) (struct intel_context *intel,
141 GLuint new_state);
142
143 void (*assert_not_dirty) (struct intel_context *intel);
144
145 void (*debug_batch)(struct intel_context *intel);
146 void (*annotate_aub)(struct intel_context *intel);
147 bool (*render_target_supported)(struct intel_context *intel,
148 struct gl_renderbuffer *rb);
149 } vtbl;
150
151 GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */
152 GLuint NewGLState;
153
154 dri_bufmgr *bufmgr;
155 unsigned int maxBatchSize;
156
157 /**
158 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
159 */
160 int gen;
161 bool is_945;
162 bool has_swizzling;
163
164 struct intel_batchbuffer batch;
165
166 drm_intel_bo *first_post_swapbuffers_batch;
167 bool need_throttle;
168 bool no_batch_wrap;
169 bool tnl_pipeline_running; /**< Set while i915's _tnl_run_pipeline. */
170
171 /**
172 * Set if we're either a debug context or the INTEL_DEBUG=perf environment
173 * variable is set, this is the flag indicating to do expensive work that
174 * might lead to a perf_debug() call.
175 */
176 bool perf_debug;
177
178 struct
179 {
180 GLuint id;
181 uint32_t start_ptr; /**< for i8xx */
182 uint32_t primitive; /**< Current hardware primitive type */
183 void (*flush) (struct intel_context *);
184 drm_intel_bo *vb_bo;
185 uint8_t *vb;
186 unsigned int start_offset; /**< Byte offset of primitive sequence */
187 unsigned int current_offset; /**< Byte offset of next vertex */
188 unsigned int count; /**< Number of vertices in current primitive */
189 } prim;
190
191 struct {
192 drm_intel_bo *bo;
193 GLuint offset;
194 uint32_t buffer_len;
195 uint32_t buffer_offset;
196 char buffer[4096];
197 } upload;
198
199 uint32_t max_gtt_map_object_size;
200
201 /* Offsets of fields within the current vertex:
202 */
203 GLuint coloroffset;
204 GLuint specoffset;
205 GLuint wpos_offset;
206
207 struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
208 GLuint vertex_attr_count;
209
210 GLfloat polygon_offset_scale; /* dependent on depth_scale, bpp */
211
212 bool hw_stipple;
213 bool no_rast;
214 bool always_flush_batch;
215 bool always_flush_cache;
216 bool disable_throttling;
217
218 /* State for intelvb.c and inteltris.c.
219 */
220 GLuint RenderIndex;
221 GLmatrix ViewportMatrix;
222 GLenum render_primitive;
223 GLenum reduced_primitive; /*< Only gen < 6 */
224 GLuint vertex_size;
225 GLubyte *verts; /* points to tnl->clipspace.vertex_buf */
226
227 /* Fallback rasterization functions
228 */
229 intel_point_func draw_point;
230 intel_line_func draw_line;
231 intel_tri_func draw_tri;
232
233 /**
234 * Set if rendering has occurred to the drawable's front buffer.
235 *
236 * This is used in the DRI2 case to detect that glFlush should also copy
237 * the contents of the fake front buffer to the real front buffer.
238 */
239 bool front_buffer_dirty;
240
241 bool use_early_z;
242
243 __DRIcontext *driContext;
244 struct intel_screen *intelScreen;
245
246 /**
247 * Configuration cache
248 */
249 driOptionCache optionCache;
250 };
251
252 extern char *__progname;
253
254
255 #define SUBPIXEL_X 0.125
256 #define SUBPIXEL_Y 0.125
257
258 #define INTEL_FIREVERTICES(intel) \
259 do { \
260 if ((intel)->prim.flush) \
261 (intel)->prim.flush(intel); \
262 } while (0)
263
264 /* ================================================================
265 * Debugging:
266 */
267 extern int INTEL_DEBUG;
268
269 #define DEBUG_TEXTURE 0x1
270 #define DEBUG_STATE 0x2
271 #define DEBUG_BLIT 0x8
272 #define DEBUG_MIPTREE 0x10
273 #define DEBUG_PERF 0x20
274 #define DEBUG_BATCH 0x80
275 #define DEBUG_PIXEL 0x100
276 #define DEBUG_BUFMGR 0x200
277 #define DEBUG_REGION 0x400
278 #define DEBUG_FBO 0x800
279 #define DEBUG_SYNC 0x2000
280 #define DEBUG_DRI 0x10000
281 #define DEBUG_STATS 0x100000
282 #define DEBUG_WM 0x400000
283 #define DEBUG_AUB 0x4000000
284
285 #ifdef HAVE_ANDROID_PLATFORM
286 #define LOG_TAG "INTEL-MESA"
287 #if ANDROID_API_LEVEL >= 26
288 #include <log/log.h>
289 #else
290 #include <cutils/log.h>
291 #endif /* use log/log.h start from android 8 major version */
292 #ifndef ALOGW
293 #define ALOGW LOGW
294 #endif
295 #define dbg_printf(...) ALOGW(__VA_ARGS__)
296 #else
297 #define dbg_printf(...) printf(__VA_ARGS__)
298 #endif /* HAVE_ANDROID_PLATFORM */
299
300 #define DBG(...) do { \
301 if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG)) \
302 dbg_printf(__VA_ARGS__); \
303 } while(0)
304
305 #define perf_debug(...) do { \
306 static GLuint msg_id = 0; \
307 if (unlikely(INTEL_DEBUG & DEBUG_PERF)) \
308 dbg_printf(__VA_ARGS__); \
309 if (intel->perf_debug) \
310 _mesa_gl_debug(&intel->ctx, &msg_id, \
311 MESA_DEBUG_SOURCE_API, \
312 MESA_DEBUG_TYPE_PERFORMANCE, \
313 MESA_DEBUG_SEVERITY_MEDIUM, \
314 __VA_ARGS__); \
315 } while(0)
316
317 #define WARN_ONCE(cond, fmt...) do { \
318 if (unlikely(cond)) { \
319 static bool _warned = false; \
320 static GLuint msg_id = 0; \
321 if (!_warned) { \
322 fprintf(stderr, "WARNING: "); \
323 fprintf(stderr, fmt); \
324 _warned = true; \
325 \
326 _mesa_gl_debug(ctx, &msg_id, \
327 MESA_DEBUG_SOURCE_API, \
328 MESA_DEBUG_TYPE_OTHER, \
329 MESA_DEBUG_SEVERITY_HIGH, fmt); \
330 } \
331 } \
332 } while (0)
333
334 /* ================================================================
335 * intel_context.c:
336 */
337
338 extern const char *const i915_vendor_string;
339
340 extern const char *i915_get_renderer_string(unsigned deviceID);
341
342 extern bool intelInitContext(struct intel_context *intel,
343 int api,
344 unsigned major_version,
345 unsigned minor_version,
346 uint32_t flags,
347 const struct gl_config * mesaVis,
348 __DRIcontext * driContextPriv,
349 void *sharedContextPrivate,
350 struct dd_function_table *functions,
351 unsigned *dri_ctx_error);
352
353 extern void intelFinish(struct gl_context * ctx);
354 extern void intel_flush_rendering_to_batch(struct gl_context *ctx);
355 extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
356
357 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
358
359 extern void intelInitDriverFunctions(struct dd_function_table *functions);
360
361 void intel_init_syncobj_functions(struct dd_function_table *functions);
362
363
364 /* ================================================================
365 * intel_state.c:
366 */
367
368 #define COMPAREFUNC_ALWAYS 0
369 #define COMPAREFUNC_NEVER 0x1
370 #define COMPAREFUNC_LESS 0x2
371 #define COMPAREFUNC_EQUAL 0x3
372 #define COMPAREFUNC_LEQUAL 0x4
373 #define COMPAREFUNC_GREATER 0x5
374 #define COMPAREFUNC_NOTEQUAL 0x6
375 #define COMPAREFUNC_GEQUAL 0x7
376
377 #define STENCILOP_KEEP 0
378 #define STENCILOP_ZERO 0x1
379 #define STENCILOP_REPLACE 0x2
380 #define STENCILOP_INCRSAT 0x3
381 #define STENCILOP_DECRSAT 0x4
382 #define STENCILOP_INCR 0x5
383 #define STENCILOP_DECR 0x6
384 #define STENCILOP_INVERT 0x7
385
386 #define LOGICOP_CLEAR 0
387 #define LOGICOP_NOR 0x1
388 #define LOGICOP_AND_INV 0x2
389 #define LOGICOP_COPY_INV 0x3
390 #define LOGICOP_AND_RVRSE 0x4
391 #define LOGICOP_INV 0x5
392 #define LOGICOP_XOR 0x6
393 #define LOGICOP_NAND 0x7
394 #define LOGICOP_AND 0x8
395 #define LOGICOP_EQUIV 0x9
396 #define LOGICOP_NOOP 0xa
397 #define LOGICOP_OR_INV 0xb
398 #define LOGICOP_COPY 0xc
399 #define LOGICOP_OR_RVRSE 0xd
400 #define LOGICOP_OR 0xe
401 #define LOGICOP_SET 0xf
402
403 #define BLENDFACT_ZERO 0x01
404 #define BLENDFACT_ONE 0x02
405 #define BLENDFACT_SRC_COLR 0x03
406 #define BLENDFACT_INV_SRC_COLR 0x04
407 #define BLENDFACT_SRC_ALPHA 0x05
408 #define BLENDFACT_INV_SRC_ALPHA 0x06
409 #define BLENDFACT_DST_ALPHA 0x07
410 #define BLENDFACT_INV_DST_ALPHA 0x08
411 #define BLENDFACT_DST_COLR 0x09
412 #define BLENDFACT_INV_DST_COLR 0x0a
413 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
414 #define BLENDFACT_CONST_COLOR 0x0c
415 #define BLENDFACT_INV_CONST_COLOR 0x0d
416 #define BLENDFACT_CONST_ALPHA 0x0e
417 #define BLENDFACT_INV_CONST_ALPHA 0x0f
418 #define BLENDFACT_MASK 0x0f
419
420 enum {
421 DRI_CONF_BO_REUSE_DISABLED,
422 DRI_CONF_BO_REUSE_ALL
423 };
424
425 extern int intel_translate_shadow_compare_func(GLenum func);
426 extern int intel_translate_compare_func(GLenum func);
427 extern int intel_translate_stencil_op(GLenum op);
428 extern int intel_translate_blend_factor(GLenum factor);
429
430 void intel_update_renderbuffers(__DRIcontext *context,
431 __DRIdrawable *drawable);
432 void intel_prepare_render(struct intel_context *intel);
433
434 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
435 uint32_t buffer_id);
436 void intel_init_texture_formats(struct gl_context *ctx);
437
438 /*======================================================================
439 * Inline conversion functions.
440 * These are better-typed than the macros used previously:
441 */
442 static inline struct intel_context *
443 intel_context(struct gl_context * ctx)
444 {
445 return (struct intel_context *) ctx;
446 }
447
448 #endif