1 /**************************************************************************
3 * Copyright 2003 VMware, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
31 #include "main/glheader.h"
32 #include "main/context.h"
33 #include "main/framebuffer.h"
34 #include "main/renderbuffer.h"
35 #include "main/texobj.h"
36 #include "main/hash.h"
37 #include "main/fbobject.h"
38 #include "main/version.h"
39 #include "swrast/s_renderbuffer.h"
42 #include "util/xmlpool.h"
44 static const __DRIconfigOptionsExtension i915_config_options
= {
45 .base
= { __DRI_CONFIG_OPTIONS
, 1 },
49 DRI_CONF_SECTION_PERFORMANCE
50 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
51 * DRI_CONF_BO_REUSE_ALL
53 DRI_CONF_OPT_BEGIN_V(bo_reuse
, enum, 1, "0:1")
54 DRI_CONF_DESC_BEGIN(en
, "Buffer object reuse")
55 DRI_CONF_ENUM(0, "Disable buffer object reuse")
56 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
60 DRI_CONF_OPT_BEGIN_B(fragment_shader
, "true")
61 DRI_CONF_DESC(en
, "Enable limited ARB_fragment_shader support on 915/945.")
65 DRI_CONF_SECTION_QUALITY
67 DRI_CONF_SECTION_DEBUG
68 DRI_CONF_ALWAYS_FLUSH_BATCH("false")
69 DRI_CONF_ALWAYS_FLUSH_CACHE("false")
70 DRI_CONF_DISABLE_THROTTLING("false")
71 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
72 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
73 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
75 DRI_CONF_OPT_BEGIN_B(stub_occlusion_query
, "false")
76 DRI_CONF_DESC(en
, "Enable stub ARB_occlusion_query support on 915/945.")
79 DRI_CONF_OPT_BEGIN_B(shader_precompile
, "true")
80 DRI_CONF_DESC(en
, "Perform code generation at shader link time.")
86 #include "intel_batchbuffer.h"
87 #include "intel_buffers.h"
88 #include "intel_bufmgr.h"
89 #include "intel_chipset.h"
90 #include "intel_fbo.h"
91 #include "intel_mipmap_tree.h"
92 #include "intel_screen.h"
93 #include "intel_tex.h"
94 #include "intel_regions.h"
99 * For debugging purposes, this returns a time in seconds.
106 clock_gettime(CLOCK_MONOTONIC
, &tp
);
108 return tp
.tv_sec
+ tp
.tv_nsec
/ 1000000000.0;
112 aub_dump_bmp(struct gl_context
*ctx
)
114 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
116 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
117 struct intel_renderbuffer
*irb
=
118 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
120 if (irb
&& irb
->mt
) {
121 enum aub_dump_bmp_format format
;
123 switch (irb
->Base
.Base
.Format
) {
124 case MESA_FORMAT_B8G8R8A8_UNORM
:
125 case MESA_FORMAT_B8G8R8X8_UNORM
:
126 format
= AUB_DUMP_BMP_FORMAT_ARGB_8888
;
132 assert(irb
->mt
->region
->pitch
% irb
->mt
->region
->cpp
== 0);
133 drm_intel_gem_bo_aub_dump_bmp(irb
->mt
->region
->bo
,
136 irb
->Base
.Base
.Width
,
137 irb
->Base
.Base
.Height
,
139 irb
->mt
->region
->pitch
,
145 static const __DRItexBufferExtension intelTexBufferExtension
= {
146 .base
= { __DRI_TEX_BUFFER
, 3 },
148 .setTexBuffer
= intelSetTexBuffer
,
149 .setTexBuffer2
= intelSetTexBuffer2
,
150 .releaseTexBuffer
= NULL
,
154 intelDRI2Flush(__DRIdrawable
*drawable
)
156 GET_CURRENT_CONTEXT(ctx
);
157 struct intel_context
*intel
= intel_context(ctx
);
161 INTEL_FIREVERTICES(intel
);
163 intel
->need_throttle
= true;
165 if (intel
->batch
.used
)
166 intel_batchbuffer_flush(intel
);
168 if (INTEL_DEBUG
& DEBUG_AUB
) {
173 static const struct __DRI2flushExtensionRec intelFlushExtension
= {
174 .base
= { __DRI2_FLUSH
, 3 },
176 .flush
= intelDRI2Flush
,
177 .invalidate
= dri2InvalidateDrawable
,
180 static struct intel_image_format intel_image_formats
[] = {
181 { __DRI_IMAGE_FOURCC_ARGB8888
, __DRI_IMAGE_COMPONENTS_RGBA
, 1,
182 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } },
184 { __DRI_IMAGE_FOURCC_SARGB8888
, __DRI_IMAGE_COMPONENTS_RGBA
, 1,
185 { { 0, 0, 0, __DRI_IMAGE_FORMAT_SARGB8
, 4 } } },
187 { __DRI_IMAGE_FOURCC_XRGB8888
, __DRI_IMAGE_COMPONENTS_RGB
, 1,
188 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888
, 4 }, } },
190 { __DRI_IMAGE_FOURCC_YUV410
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
191 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
192 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 },
193 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 } } },
195 { __DRI_IMAGE_FOURCC_YUV411
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
196 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
197 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
198 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
200 { __DRI_IMAGE_FOURCC_YUV420
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
201 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
202 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 },
203 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 } } },
205 { __DRI_IMAGE_FOURCC_YUV422
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
206 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
207 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
208 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
210 { __DRI_IMAGE_FOURCC_YUV444
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
211 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
212 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
213 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
215 { __DRI_IMAGE_FOURCC_NV12
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
216 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
217 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
219 { __DRI_IMAGE_FOURCC_NV16
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
220 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
221 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
223 /* For YUYV and UYVY buffers, we set up two overlapping DRI images
224 * and treat them as planar buffers in the compositors.
225 * Plane 0 is GR88 and samples YU or YV pairs and places Y into
226 * the R component, while plane 1 is ARGB/ABGR and samples YUYV/UYVY
227 * clusters and places pairs and places U into the G component and
228 * V into A. This lets the texture sampler interpolate the Y
229 * components correctly when sampling from plane 0, and interpolate
230 * U and V correctly when sampling from plane 1. */
231 { __DRI_IMAGE_FOURCC_YUYV
, __DRI_IMAGE_COMPONENTS_Y_XUXV
, 2,
232 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88
, 2 },
233 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } },
234 { __DRI_IMAGE_FOURCC_UYVY
, __DRI_IMAGE_COMPONENTS_Y_UXVX
, 2,
235 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88
, 2 },
236 { 0, 1, 0, __DRI_IMAGE_FORMAT_ABGR8888
, 4 } } }
240 intel_allocate_image(int dri_format
, void *loaderPrivate
)
244 image
= calloc(1, sizeof *image
);
248 image
->dri_format
= dri_format
;
251 image
->format
= driImageFormatToGLFormat(dri_format
);
252 if (dri_format
!= __DRI_IMAGE_FORMAT_NONE
&&
253 image
->format
== MESA_FORMAT_NONE
) {
258 image
->internal_format
= _mesa_get_format_base_format(image
->format
);
259 image
->data
= loaderPrivate
;
265 * Sets up a DRIImage structure to point to our shared image in a region
268 intel_setup_image_from_mipmap_tree(struct intel_context
*intel
, __DRIimage
*image
,
269 struct intel_mipmap_tree
*mt
, GLuint level
,
272 unsigned int draw_x
, draw_y
;
273 uint32_t mask_x
, mask_y
;
275 intel_miptree_check_level_layer(mt
, level
, zoffset
);
277 intel_region_get_tile_masks(mt
->region
, &mask_x
, &mask_y
);
278 intel_miptree_get_image_offset(mt
, level
, zoffset
, &draw_x
, &draw_y
);
280 image
->width
= mt
->level
[level
].width
;
281 image
->height
= mt
->level
[level
].height
;
282 image
->tile_x
= draw_x
& mask_x
;
283 image
->tile_y
= draw_y
& mask_y
;
285 image
->offset
= intel_region_get_aligned_offset(mt
->region
,
289 intel_region_reference(&image
->region
, mt
->region
);
293 intel_setup_image_from_dimensions(__DRIimage
*image
)
295 image
->width
= image
->region
->width
;
296 image
->height
= image
->region
->height
;
302 intel_create_image_from_name(__DRIscreen
*screen
,
303 int width
, int height
, int format
,
304 int name
, int pitch
, void *loaderPrivate
)
306 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
310 image
= intel_allocate_image(format
, loaderPrivate
);
314 if (image
->format
== MESA_FORMAT_NONE
)
317 cpp
= _mesa_get_format_bytes(image
->format
);
318 image
->region
= intel_region_alloc_for_handle(intelScreen
,
320 pitch
* cpp
, name
, "image");
321 if (image
->region
== NULL
) {
326 intel_setup_image_from_dimensions(image
);
332 intel_create_image_from_renderbuffer(__DRIcontext
*context
,
333 int renderbuffer
, void *loaderPrivate
)
336 struct intel_context
*intel
= context
->driverPrivate
;
337 struct gl_renderbuffer
*rb
;
338 struct intel_renderbuffer
*irb
;
340 rb
= _mesa_lookup_renderbuffer(&intel
->ctx
, renderbuffer
);
342 _mesa_error(&intel
->ctx
,
343 GL_INVALID_OPERATION
, "glRenderbufferExternalMESA");
347 irb
= intel_renderbuffer(rb
);
348 image
= calloc(1, sizeof *image
);
352 image
->internal_format
= rb
->InternalFormat
;
353 image
->format
= rb
->Format
;
355 image
->data
= loaderPrivate
;
356 intel_region_reference(&image
->region
, irb
->mt
->region
);
357 intel_setup_image_from_dimensions(image
);
358 image
->dri_format
= driGLFormatToImageFormat(image
->format
);
360 rb
->NeedsFinishRenderTexture
= true;
365 intel_create_image_from_texture(__DRIcontext
*context
, int target
,
366 unsigned texture
, int zoffset
,
372 struct intel_context
*intel
= context
->driverPrivate
;
373 struct gl_texture_object
*obj
;
374 struct intel_texture_object
*iobj
;
377 obj
= _mesa_lookup_texture(&intel
->ctx
, texture
);
378 if (!obj
|| obj
->Target
!= target
) {
379 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
383 if (target
== GL_TEXTURE_CUBE_MAP
)
386 _mesa_test_texobj_completeness(&intel
->ctx
, obj
);
387 iobj
= intel_texture_object(obj
);
388 if (!obj
->_BaseComplete
|| (level
> 0 && !obj
->_MipmapComplete
)) {
389 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
393 if (level
< obj
->BaseLevel
|| level
> obj
->_MaxLevel
) {
394 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
398 if (target
== GL_TEXTURE_3D
&& obj
->Image
[face
][level
]->Depth
< zoffset
) {
399 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
402 image
= calloc(1, sizeof *image
);
404 *error
= __DRI_IMAGE_ERROR_BAD_ALLOC
;
408 image
->internal_format
= obj
->Image
[face
][level
]->InternalFormat
;
409 image
->format
= obj
->Image
[face
][level
]->TexFormat
;
410 image
->data
= loaderPrivate
;
411 intel_setup_image_from_mipmap_tree(intel
, image
, iobj
->mt
, level
, zoffset
);
412 image
->dri_format
= driGLFormatToImageFormat(image
->format
);
413 if (image
->dri_format
== __DRI_IMAGE_FORMAT_NONE
) {
414 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
419 *error
= __DRI_IMAGE_ERROR_SUCCESS
;
424 intel_destroy_image(__DRIimage
*image
)
426 intel_region_release(&image
->region
);
431 intel_create_image(__DRIscreen
*screen
,
432 int width
, int height
, int format
,
437 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
441 tiling
= I915_TILING_X
;
442 if (use
& __DRI_IMAGE_USE_CURSOR
) {
443 if (width
!= 64 || height
!= 64)
445 tiling
= I915_TILING_NONE
;
448 if (use
& __DRI_IMAGE_USE_LINEAR
)
449 tiling
= I915_TILING_NONE
;
451 image
= intel_allocate_image(format
, loaderPrivate
);
455 cpp
= _mesa_get_format_bytes(image
->format
);
457 intel_region_alloc(intelScreen
, tiling
, cpp
, width
, height
, true);
458 if (image
->region
== NULL
) {
463 intel_setup_image_from_dimensions(image
);
469 intel_query_image(__DRIimage
*image
, int attrib
, int *value
)
472 case __DRI_IMAGE_ATTRIB_STRIDE
:
473 *value
= image
->region
->pitch
;
475 case __DRI_IMAGE_ATTRIB_HANDLE
:
476 *value
= image
->region
->bo
->handle
;
478 case __DRI_IMAGE_ATTRIB_NAME
:
479 return intel_region_flink(image
->region
, (uint32_t *) value
);
480 case __DRI_IMAGE_ATTRIB_FORMAT
:
481 *value
= image
->dri_format
;
483 case __DRI_IMAGE_ATTRIB_WIDTH
:
484 *value
= image
->region
->width
;
486 case __DRI_IMAGE_ATTRIB_HEIGHT
:
487 *value
= image
->region
->height
;
489 case __DRI_IMAGE_ATTRIB_COMPONENTS
:
490 if (image
->planar_format
== NULL
)
492 *value
= image
->planar_format
->components
;
494 case __DRI_IMAGE_ATTRIB_FD
:
495 return !drm_intel_bo_gem_export_to_prime(image
->region
->bo
, value
);
502 intel_dup_image(__DRIimage
*orig_image
, void *loaderPrivate
)
506 image
= calloc(1, sizeof *image
);
510 intel_region_reference(&image
->region
, orig_image
->region
);
511 if (image
->region
== NULL
) {
516 image
->internal_format
= orig_image
->internal_format
;
517 image
->planar_format
= orig_image
->planar_format
;
518 image
->dri_format
= orig_image
->dri_format
;
519 image
->format
= orig_image
->format
;
520 image
->offset
= orig_image
->offset
;
521 image
->width
= orig_image
->width
;
522 image
->height
= orig_image
->height
;
523 image
->tile_x
= orig_image
->tile_x
;
524 image
->tile_y
= orig_image
->tile_y
;
525 image
->data
= loaderPrivate
;
527 memcpy(image
->strides
, orig_image
->strides
, sizeof(image
->strides
));
528 memcpy(image
->offsets
, orig_image
->offsets
, sizeof(image
->offsets
));
534 intel_validate_usage(__DRIimage
*image
, unsigned int use
)
536 if (use
& __DRI_IMAGE_USE_CURSOR
) {
537 if (image
->region
->width
!= 64 || image
->region
->height
!= 64)
545 intel_create_image_from_names(__DRIscreen
*screen
,
546 int width
, int height
, int fourcc
,
547 int *names
, int num_names
,
548 int *strides
, int *offsets
,
551 struct intel_image_format
*f
= NULL
;
555 if (screen
== NULL
|| names
== NULL
|| num_names
!= 1)
558 for (i
= 0; i
< ARRAY_SIZE(intel_image_formats
); i
++) {
559 if (intel_image_formats
[i
].fourcc
== fourcc
) {
560 f
= &intel_image_formats
[i
];
567 image
= intel_create_image_from_name(screen
, width
, height
,
568 __DRI_IMAGE_FORMAT_NONE
,
569 names
[0], strides
[0],
575 image
->planar_format
= f
;
576 for (i
= 0; i
< f
->nplanes
; i
++) {
577 index
= f
->planes
[i
].buffer_index
;
578 image
->offsets
[index
] = offsets
[index
];
579 image
->strides
[index
] = strides
[index
];
586 intel_create_image_from_fds(__DRIscreen
*screen
,
587 int width
, int height
, int fourcc
,
588 int *fds
, int num_fds
, int *strides
, int *offsets
,
591 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
592 struct intel_image_format
*f
= NULL
;
596 if (fds
== NULL
|| num_fds
!= 1)
599 for (i
= 0; i
< ARRAY_SIZE(intel_image_formats
); i
++) {
600 if (intel_image_formats
[i
].fourcc
== fourcc
) {
601 f
= &intel_image_formats
[i
];
608 image
= intel_allocate_image(__DRI_IMAGE_FORMAT_NONE
, loaderPrivate
);
612 image
->region
= intel_region_alloc_for_fd(intelScreen
,
613 f
->planes
[0].cpp
, width
, height
, strides
[0],
614 height
* strides
[0], fds
[0], "image");
615 if (image
->region
== NULL
) {
620 intel_setup_image_from_dimensions(image
);
622 image
->planar_format
= f
;
623 for (i
= 0; i
< f
->nplanes
; i
++) {
624 index
= f
->planes
[i
].buffer_index
;
625 image
->offsets
[index
] = offsets
[index
];
626 image
->strides
[index
] = strides
[index
];
634 intel_from_planar(__DRIimage
*parent
, int plane
, void *loaderPrivate
)
636 int width
, height
, offset
, stride
, dri_format
, index
;
637 struct intel_image_format
*f
;
638 uint32_t mask_x
, mask_y
;
641 if (parent
== NULL
|| parent
->planar_format
== NULL
)
644 f
= parent
->planar_format
;
646 if (plane
>= f
->nplanes
)
649 width
= parent
->region
->width
>> f
->planes
[plane
].width_shift
;
650 height
= parent
->region
->height
>> f
->planes
[plane
].height_shift
;
651 dri_format
= f
->planes
[plane
].dri_format
;
652 index
= f
->planes
[plane
].buffer_index
;
653 offset
= parent
->offsets
[index
];
654 stride
= parent
->strides
[index
];
656 image
= intel_allocate_image(dri_format
, loaderPrivate
);
660 if (offset
+ height
* stride
> parent
->region
->bo
->size
) {
661 _mesa_warning(NULL
, "intel_create_sub_image: subimage out of bounds");
666 image
->region
= calloc(sizeof(*image
->region
), 1);
667 if (image
->region
== NULL
) {
672 image
->region
->cpp
= _mesa_get_format_bytes(image
->format
);
673 image
->region
->width
= width
;
674 image
->region
->height
= height
;
675 image
->region
->pitch
= stride
;
676 image
->region
->refcount
= 1;
677 image
->region
->bo
= parent
->region
->bo
;
678 drm_intel_bo_reference(image
->region
->bo
);
679 image
->region
->tiling
= parent
->region
->tiling
;
680 image
->offset
= offset
;
681 intel_setup_image_from_dimensions(image
);
683 intel_region_get_tile_masks(image
->region
, &mask_x
, &mask_y
);
686 "intel_create_sub_image: offset not on tile boundary");
691 static const __DRIimageExtension intelImageExtension
= {
692 .base
= { __DRI_IMAGE
, 7 },
694 .createImageFromName
= intel_create_image_from_name
,
695 .createImageFromRenderbuffer
= intel_create_image_from_renderbuffer
,
696 .destroyImage
= intel_destroy_image
,
697 .createImage
= intel_create_image
,
698 .queryImage
= intel_query_image
,
699 .dupImage
= intel_dup_image
,
700 .validateUsage
= intel_validate_usage
,
701 .createImageFromNames
= intel_create_image_from_names
,
702 .fromPlanar
= intel_from_planar
,
703 .createImageFromTexture
= intel_create_image_from_texture
,
704 .createImageFromFds
= intel_create_image_from_fds
708 i915_query_renderer_integer(__DRIscreen
*psp
, int param
, unsigned int *value
)
710 const struct intel_screen
*const intelScreen
=
711 (struct intel_screen
*) psp
->driverPrivate
;
714 case __DRI2_RENDERER_VENDOR_ID
:
717 case __DRI2_RENDERER_DEVICE_ID
:
718 value
[0] = intelScreen
->deviceID
;
720 case __DRI2_RENDERER_ACCELERATED
:
723 case __DRI2_RENDERER_VIDEO_MEMORY
: {
724 /* Once a batch uses more than 75% of the maximum mappable size, we
725 * assume that there's some fragmentation, and we start doing extra
726 * flushing, etc. That's the big cliff apps will care about.
729 size_t mappable_size
;
731 drm_intel_get_aperture_sizes(psp
->fd
, &mappable_size
, &aper_size
);
733 const unsigned gpu_mappable_megabytes
=
734 (aper_size
/ (1024 * 1024)) * 3 / 4;
736 const long system_memory_pages
= sysconf(_SC_PHYS_PAGES
);
737 const long system_page_size
= sysconf(_SC_PAGE_SIZE
);
739 if (system_memory_pages
<= 0 || system_page_size
<= 0)
742 const uint64_t system_memory_bytes
= (uint64_t) system_memory_pages
743 * (uint64_t) system_page_size
;
745 const unsigned system_memory_megabytes
=
746 (unsigned) (system_memory_bytes
/ (1024 * 1024));
748 value
[0] = MIN2(system_memory_megabytes
, gpu_mappable_megabytes
);
751 case __DRI2_RENDERER_UNIFIED_MEMORY_ARCHITECTURE
:
754 case __DRI2_RENDERER_HAS_TEXTURE_3D
:
758 return driQueryRendererIntegerCommon(psp
, param
, value
);
765 i915_query_renderer_string(__DRIscreen
*psp
, int param
, const char **value
)
767 const struct intel_screen
*intelScreen
=
768 (struct intel_screen
*) psp
->driverPrivate
;
771 case __DRI2_RENDERER_VENDOR_ID
:
772 value
[0] = i915_vendor_string
;
774 case __DRI2_RENDERER_DEVICE_ID
:
775 value
[0] = i915_get_renderer_string(intelScreen
->deviceID
);
784 static const __DRI2rendererQueryExtension intelRendererQueryExtension
= {
785 .base
= { __DRI2_RENDERER_QUERY
, 1 },
787 .queryInteger
= i915_query_renderer_integer
,
788 .queryString
= i915_query_renderer_string
791 static const __DRIextension
*intelScreenExtensions
[] = {
792 &intelTexBufferExtension
.base
,
793 &intelFenceExtension
.base
,
794 &intelFlushExtension
.base
,
795 &intelImageExtension
.base
,
796 &intelRendererQueryExtension
.base
,
797 &dri2ConfigQueryExtension
.base
,
798 &dri2NoErrorExtension
.base
,
803 intel_get_param(__DRIscreen
*psp
, int param
, int *value
)
806 struct drm_i915_getparam gp
;
808 memset(&gp
, 0, sizeof(gp
));
812 ret
= drmCommandWriteRead(psp
->fd
, DRM_I915_GETPARAM
, &gp
, sizeof(gp
));
815 _mesa_warning(NULL
, "drm_i915_getparam: %d", ret
);
823 intel_get_boolean(__DRIscreen
*psp
, int param
)
826 return intel_get_param(psp
, param
, &value
) && value
;
830 intelDestroyScreen(__DRIscreen
* sPriv
)
832 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
834 dri_bufmgr_destroy(intelScreen
->bufmgr
);
835 driDestroyOptionInfo(&intelScreen
->optionCache
);
838 sPriv
->driverPrivate
= NULL
;
843 * This is called when we need to set up GL rendering to a new X window.
846 intelCreateBuffer(__DRIscreen
* driScrnPriv
,
847 __DRIdrawable
* driDrawPriv
,
848 const struct gl_config
* mesaVis
, GLboolean isPixmap
)
850 struct intel_renderbuffer
*rb
;
851 mesa_format rgbFormat
;
852 struct gl_framebuffer
*fb
;
857 fb
= CALLOC_STRUCT(gl_framebuffer
);
861 _mesa_initialize_window_framebuffer(fb
, mesaVis
);
863 if (mesaVis
->redBits
== 5)
864 rgbFormat
= MESA_FORMAT_B5G6R5_UNORM
;
865 else if (mesaVis
->sRGBCapable
)
866 rgbFormat
= MESA_FORMAT_B8G8R8A8_SRGB
;
867 else if (mesaVis
->alphaBits
== 0)
868 rgbFormat
= MESA_FORMAT_B8G8R8X8_UNORM
;
870 rgbFormat
= MESA_FORMAT_B8G8R8A8_UNORM
;
872 /* setup the hardware-based renderbuffers */
873 rb
= intel_create_renderbuffer(rgbFormat
);
874 _mesa_attach_and_own_rb(fb
, BUFFER_FRONT_LEFT
, &rb
->Base
.Base
);
876 if (mesaVis
->doubleBufferMode
) {
877 rb
= intel_create_renderbuffer(rgbFormat
);
878 _mesa_attach_and_own_rb(fb
, BUFFER_BACK_LEFT
, &rb
->Base
.Base
);
882 * Assert here that the gl_config has an expected depth/stencil bit
883 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
884 * which constructs the advertised configs.)
886 if (mesaVis
->depthBits
== 24) {
887 assert(mesaVis
->stencilBits
== 8);
890 * Use combined depth/stencil. Note that the renderbuffer is
891 * attached to two attachment points.
893 rb
= intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT
);
894 _mesa_attach_and_own_rb(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
895 _mesa_attach_and_reference_rb(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
897 else if (mesaVis
->depthBits
== 16) {
898 assert(mesaVis
->stencilBits
== 0);
899 rb
= intel_create_private_renderbuffer(MESA_FORMAT_Z_UNORM16
);
900 _mesa_attach_and_own_rb(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
903 assert(mesaVis
->depthBits
== 0);
904 assert(mesaVis
->stencilBits
== 0);
907 /* now add any/all software-based renderbuffers we may need */
908 _swrast_add_soft_renderbuffers(fb
,
909 false, /* never sw color */
910 false, /* never sw depth */
911 false, /* never sw stencil */
912 mesaVis
->accumRedBits
> 0,
913 false, /* never sw alpha */
914 false /* never sw aux */ );
915 driDrawPriv
->driverPrivate
= fb
;
921 intelDestroyBuffer(__DRIdrawable
* driDrawPriv
)
923 struct gl_framebuffer
*fb
= driDrawPriv
->driverPrivate
;
925 _mesa_reference_framebuffer(&fb
, NULL
);
928 /* There are probably better ways to do this, such as an
929 * init-designated function to register chipids and createcontext
933 i830CreateContext(int api
,
934 const struct gl_config
*mesaVis
,
935 __DRIcontext
*driContextPriv
,
936 unsigned major_version
,
937 unsigned minor_version
,
940 void *sharedContextPrivate
);
943 i915CreateContext(int api
,
944 const struct gl_config
*mesaVis
,
945 __DRIcontext
*driContextPriv
,
946 unsigned major_version
,
947 unsigned minor_version
,
950 void *sharedContextPrivate
);
953 intelCreateContext(gl_api api
,
954 const struct gl_config
* mesaVis
,
955 __DRIcontext
* driContextPriv
,
956 const struct __DriverContextConfig
*ctx_config
,
958 void *sharedContextPrivate
)
960 bool success
= false;
962 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
963 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
965 if (ctx_config
->flags
& ~(__DRI_CTX_FLAG_DEBUG
| __DRI_CTX_FLAG_NO_ERROR
)) {
966 *error
= __DRI_CTX_ERROR_UNKNOWN_FLAG
;
970 if (ctx_config
->attribute_mask
) {
971 *error
= __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE
;
975 if (IS_GEN3(intelScreen
->deviceID
)) {
976 success
= i915CreateContext(api
, mesaVis
, driContextPriv
,
977 ctx_config
->major_version
,
978 ctx_config
->minor_version
,
980 error
, sharedContextPrivate
);
982 intelScreen
->no_vbo
= true;
983 success
= i830CreateContext(api
, mesaVis
, driContextPriv
,
984 ctx_config
->major_version
,
985 ctx_config
->minor_version
,
987 error
, sharedContextPrivate
);
993 if (driContextPriv
->driverPrivate
!= NULL
)
994 intelDestroyContext(driContextPriv
);
1000 intel_init_bufmgr(struct intel_screen
*intelScreen
)
1002 __DRIscreen
*spriv
= intelScreen
->driScrnPriv
;
1004 intelScreen
->no_hw
= getenv("INTEL_NO_HW") != NULL
;
1006 intelScreen
->bufmgr
= intel_bufmgr_gem_init(spriv
->fd
, BATCH_SZ
);
1007 if (intelScreen
->bufmgr
== NULL
) {
1008 fprintf(stderr
, "[%s:%u] Error initializing buffer manager.\n",
1009 __func__
, __LINE__
);
1013 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen
->bufmgr
);
1015 if (!intel_get_boolean(spriv
, I915_PARAM_HAS_RELAXED_DELTA
)) {
1016 fprintf(stderr
, "[%s: %u] Kernel 2.6.39 required.\n", __func__
, __LINE__
);
1023 static __DRIconfig
**
1024 intel_screen_make_configs(__DRIscreen
*dri_screen
)
1026 static const mesa_format formats
[] = {
1027 MESA_FORMAT_B5G6R5_UNORM
,
1028 MESA_FORMAT_B8G8R8A8_UNORM
,
1029 MESA_FORMAT_B8G8R8X8_UNORM
1032 /* __DRI_ATTRIB_SWAP_COPY is not supported due to page flipping. */
1033 static const GLenum back_buffer_modes
[] = {
1034 __DRI_ATTRIB_SWAP_UNDEFINED
, __DRI_ATTRIB_SWAP_NONE
1037 static const uint8_t singlesample_samples
[1] = {0};
1039 uint8_t depth_bits
[4], stencil_bits
[4];
1040 __DRIconfig
**configs
= NULL
;
1042 /* Generate singlesample configs without accumulation buffer. */
1043 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1044 __DRIconfig
**new_configs
;
1045 int num_depth_stencil_bits
= 2;
1047 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1048 * buffer that has a different number of bits per pixel than the color
1052 stencil_bits
[0] = 0;
1054 if (formats
[i
] == MESA_FORMAT_B5G6R5_UNORM
) {
1056 stencil_bits
[1] = 0;
1059 stencil_bits
[1] = 8;
1062 new_configs
= driCreateConfigs(formats
[i
],
1065 num_depth_stencil_bits
,
1066 back_buffer_modes
, 2,
1067 singlesample_samples
, 1,
1068 false, false, false);
1069 configs
= driConcatConfigs(configs
, new_configs
);
1072 /* Generate the minimum possible set of configs that include an
1073 * accumulation buffer.
1075 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1076 __DRIconfig
**new_configs
;
1078 if (formats
[i
] == MESA_FORMAT_B5G6R5_UNORM
) {
1080 stencil_bits
[0] = 0;
1083 stencil_bits
[0] = 8;
1086 new_configs
= driCreateConfigs(formats
[i
],
1087 depth_bits
, stencil_bits
, 1,
1088 back_buffer_modes
, 1,
1089 singlesample_samples
, 1,
1090 true, false, false);
1091 configs
= driConcatConfigs(configs
, new_configs
);
1094 if (configs
== NULL
) {
1095 fprintf(stderr
, "[%s:%u] Error creating FBConfig!\n", __func__
,
1104 set_max_gl_versions(struct intel_screen
*screen
)
1106 __DRIscreen
*psp
= screen
->driScrnPriv
;
1108 switch (screen
->gen
) {
1110 bool has_fragment_shader
= driQueryOptionb(&screen
->optionCache
, "fragment_shader");
1111 bool has_occlusion_query
= driQueryOptionb(&screen
->optionCache
, "stub_occlusion_query");
1113 psp
->max_gl_core_version
= 0;
1114 psp
->max_gl_es1_version
= 11;
1115 psp
->max_gl_es2_version
= 20;
1117 if (has_fragment_shader
&& has_occlusion_query
) {
1118 psp
->max_gl_compat_version
= 21;
1120 psp
->max_gl_compat_version
= 14;
1125 psp
->max_gl_core_version
= 0;
1126 psp
->max_gl_compat_version
= 13;
1127 psp
->max_gl_es1_version
= 11;
1128 psp
->max_gl_es2_version
= 0;
1131 assert(!"unrecognized intel_screen::gen");
1137 * This is the driver specific part of the createNewScreen entry point.
1138 * Called when using DRI2.
1140 * \return the struct gl_config supported by this driver
1143 __DRIconfig
**intelInitScreen2(__DRIscreen
*psp
)
1145 struct intel_screen
*intelScreen
;
1147 if (psp
->image
.loader
) {
1148 } else if (psp
->dri2
.loader
->base
.version
<= 2 ||
1149 psp
->dri2
.loader
->getBuffersWithFormat
== NULL
) {
1151 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1152 "support required\n");
1156 /* Allocate the private area */
1157 intelScreen
= calloc(1, sizeof *intelScreen
);
1159 fprintf(stderr
, "\nERROR! Allocating private area failed\n");
1162 /* parse information in __driConfigOptions */
1163 driParseOptionInfo(&intelScreen
->optionCache
, i915_config_options
.xml
);
1165 intelScreen
->driScrnPriv
= psp
;
1166 psp
->driverPrivate
= (void *) intelScreen
;
1168 if (!intel_init_bufmgr(intelScreen
))
1171 intelScreen
->deviceID
= drm_intel_bufmgr_gem_get_devid(intelScreen
->bufmgr
);
1173 if (IS_GEN3(intelScreen
->deviceID
)) {
1174 intelScreen
->gen
= 3;
1176 intelScreen
->gen
= 2;
1179 set_max_gl_versions(intelScreen
);
1181 psp
->extensions
= intelScreenExtensions
;
1183 return (const __DRIconfig
**) intel_screen_make_configs(psp
);
1186 struct intel_buffer
{
1188 struct intel_region
*region
;
1191 static __DRIbuffer
*
1192 intelAllocateBuffer(__DRIscreen
*screen
,
1193 unsigned attachment
, unsigned format
,
1194 int width
, int height
)
1196 struct intel_buffer
*intelBuffer
;
1197 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
1199 assert(attachment
== __DRI_BUFFER_FRONT_LEFT
||
1200 attachment
== __DRI_BUFFER_BACK_LEFT
);
1202 intelBuffer
= calloc(1, sizeof *intelBuffer
);
1203 if (intelBuffer
== NULL
)
1206 /* The front and back buffers are color buffers, which are X tiled. */
1207 intelBuffer
->region
= intel_region_alloc(intelScreen
,
1214 if (intelBuffer
->region
== NULL
) {
1219 intel_region_flink(intelBuffer
->region
, &intelBuffer
->base
.name
);
1221 intelBuffer
->base
.attachment
= attachment
;
1222 intelBuffer
->base
.cpp
= intelBuffer
->region
->cpp
;
1223 intelBuffer
->base
.pitch
= intelBuffer
->region
->pitch
;
1225 return &intelBuffer
->base
;
1229 intelReleaseBuffer(__DRIscreen
*screen
, __DRIbuffer
*buffer
)
1231 struct intel_buffer
*intelBuffer
= (struct intel_buffer
*) buffer
;
1233 intel_region_release(&intelBuffer
->region
);
1238 static const struct __DriverAPIRec i915_driver_api
= {
1239 .InitScreen
= intelInitScreen2
,
1240 .DestroyScreen
= intelDestroyScreen
,
1241 .CreateContext
= intelCreateContext
,
1242 .DestroyContext
= intelDestroyContext
,
1243 .CreateBuffer
= intelCreateBuffer
,
1244 .DestroyBuffer
= intelDestroyBuffer
,
1245 .MakeCurrent
= intelMakeCurrent
,
1246 .UnbindContext
= intelUnbindContext
,
1247 .AllocateBuffer
= intelAllocateBuffer
,
1248 .ReleaseBuffer
= intelReleaseBuffer
1251 static const struct __DRIDriverVtableExtensionRec i915_vtable
= {
1252 .base
= { __DRI_DRIVER_VTABLE
, 1 },
1253 .vtable
= &i915_driver_api
,
1256 /* This is the table of extensions that the loader will dlsym() for. */
1257 static const __DRIextension
*i915_driver_extensions
[] = {
1258 &driCoreExtension
.base
,
1259 &driImageDriverExtension
.base
,
1260 &driDRI2Extension
.base
,
1262 &i915_config_options
.base
,
1266 PUBLIC
const __DRIextension
**__driDriverGetExtensions_i915(void)
1268 globalDriverAPI
= &i915_driver_api
;
1270 return i915_driver_extensions
;