src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp

   1 /*
   2  * Copyright © 2013 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "util/ralloc.h"
  25 #include "brw_blorp_blit_eu.h"
  26 #include "brw_blorp.h"
  27 #include "brw_cfg.h"
  28
  29 brw_blorp_eu_emitter::brw_blorp_eu_emitter(struct brw_context *brw,
  30                                            bool debug_flag)
  31    : mem_ctx(ralloc_context(NULL)),
  32      generator(brw->intelScreen->compiler, brw,
  33                mem_ctx, (void *) rzalloc(mem_ctx, struct brw_wm_prog_key),
  34                (struct brw_stage_prog_data *) rzalloc(mem_ctx, struct brw_wm_prog_data),
  35                0, false, "BLORP")
  36 {
  37    if (debug_flag)
  38       generator.enable_debug("blorp");
  39 }
  40
  41 brw_blorp_eu_emitter::~brw_blorp_eu_emitter()
  42 {
  43    ralloc_free(mem_ctx);
  44 }
  45
  46 const unsigned *
  47 brw_blorp_eu_emitter::get_program(unsigned *program_size)
  48 {
  49    cfg_t cfg(&insts);
  50    generator.generate_code(&cfg, 16);
  51
  52    return generator.get_assembly(program_size);
  53 }
  54
  55 /**
  56  * Emit code that kills pixels whose X and Y coordinates are outside the
  57  * boundary of the rectangle defined by the push constants (dst_x0, dst_y0,
  58  * dst_x1, dst_y1).
  59  */
  60 void
  61 brw_blorp_eu_emitter::emit_kill_if_outside_rect(const struct brw_reg &x,
  62                                                 const struct brw_reg &y,
  63                                                 const struct brw_reg &dst_x0,
  64                                                 const struct brw_reg &dst_x1,
  65                                                 const struct brw_reg &dst_y0,
  66                                                 const struct brw_reg &dst_y1)
  67 {
  68    struct brw_reg f0 = brw_flag_reg(0, 0);
  69    struct brw_reg g1 = retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UW);
  70
  71    emit_cmp(BRW_CONDITIONAL_GE, x, dst_x0);
  72    emit_cmp(BRW_CONDITIONAL_GE, y, dst_y0)->predicate = BRW_PREDICATE_NORMAL;
  73    emit_cmp(BRW_CONDITIONAL_L, x, dst_x1)->predicate = BRW_PREDICATE_NORMAL;
  74    emit_cmp(BRW_CONDITIONAL_L, y, dst_y1)->predicate = BRW_PREDICATE_NORMAL;
  75
  76    fs_inst *inst = new (mem_ctx) fs_inst(BRW_OPCODE_AND, 16, g1, f0, g1);
  77    inst->force_writemask_all = true;
  78    insts.push_tail(inst);
  79 }
  80
  81 void
  82 brw_blorp_eu_emitter::emit_texture_lookup(const struct brw_reg &dst,
  83                                           enum opcode op,
  84                                           unsigned base_mrf,
  85                                           unsigned msg_length)
  86 {
  87    fs_inst *inst = new (mem_ctx) fs_inst(op, 16, dst, brw_message_reg(base_mrf),
  88                                          brw_imm_ud(0u));
  89
  90    inst->base_mrf = base_mrf;
  91    inst->mlen = msg_length;
  92    inst->header_size = 0;
  93
  94    insts.push_tail(inst);
  95 }
  96
  97 void
  98 brw_blorp_eu_emitter::emit_render_target_write(const struct brw_reg &src0,
  99                                                unsigned msg_reg_nr,
 100                                                unsigned msg_length,
 101                                                bool use_header)
 102 {
 103    fs_inst *inst = new (mem_ctx) fs_inst(FS_OPCODE_BLORP_FB_WRITE, 16);
 104
 105    inst->src[0] = src0;
 106    inst->base_mrf = msg_reg_nr;
 107    inst->mlen = msg_length;
 108    inst->header_size = use_header ? 2 : 0;
 109    inst->target = BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX;
 110
 111    insts.push_tail(inst);
 112 }
 113
 114 void
 115 brw_blorp_eu_emitter::emit_combine(enum opcode combine_opcode,
 116                                    const struct brw_reg &dst,
 117                                    const struct brw_reg &src_1,
 118                                    const struct brw_reg &src_2)
 119 {
 120    assert(combine_opcode == BRW_OPCODE_ADD || combine_opcode == BRW_OPCODE_AVG);
 121
 122    insts.push_tail(new (mem_ctx) fs_inst(combine_opcode, 16, dst,
 123                                          src_1, src_2));
 124 }
 125
 126 fs_inst *
 127 brw_blorp_eu_emitter::emit_cmp(enum brw_conditional_mod op,
 128                                const struct brw_reg &x,
 129                                const struct brw_reg &y)
 130 {
 131    fs_inst *cmp = new (mem_ctx) fs_inst(BRW_OPCODE_CMP, 16,
 132                                         vec16(brw_null_reg()), x, y);
 133    cmp->conditional_mod = op;
 134    insts.push_tail(cmp);
 135    return cmp;
 136 }
 137