Merge branch 'mesa_7_7_branch'
[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_line.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #include "main/glheader.h"
33 #include "main/macros.h"
34 #include "main/enums.h"
35 #include "shader/program.h"
36
37 #include "intel_batchbuffer.h"
38
39 #include "brw_defines.h"
40 #include "brw_context.h"
41 #include "brw_eu.h"
42 #include "brw_clip.h"
43
44
45
46 static void brw_clip_line_alloc_regs( struct brw_clip_compile *c )
47 {
48 struct intel_context *intel = &c->func.brw->intel;
49 GLuint i = 0,j;
50
51 /* Register usage is static, precompute here:
52 */
53 c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++;
54
55 if (c->key.nr_userclip) {
56 c->reg.fixed_planes = brw_vec4_grf(i, 0);
57 i += (6 + c->key.nr_userclip + 1) / 2;
58
59 c->prog_data.curb_read_length = (6 + c->key.nr_userclip + 1) / 2;
60 }
61 else
62 c->prog_data.curb_read_length = 0;
63
64
65 /* Payload vertices plus space for more generated vertices:
66 */
67 for (j = 0; j < 4; j++) {
68 c->reg.vertex[j] = brw_vec4_grf(i, 0);
69 i += c->nr_regs;
70 }
71
72 c->reg.t = brw_vec1_grf(i, 0);
73 c->reg.t0 = brw_vec1_grf(i, 1);
74 c->reg.t1 = brw_vec1_grf(i, 2);
75 c->reg.planemask = retype(brw_vec1_grf(i, 3), BRW_REGISTER_TYPE_UD);
76 c->reg.plane_equation = brw_vec4_grf(i, 4);
77 i++;
78
79 c->reg.dp0 = brw_vec1_grf(i, 0); /* fixme - dp4 will clobber r.1,2,3 */
80 c->reg.dp1 = brw_vec1_grf(i, 4);
81 i++;
82
83 if (!c->key.nr_userclip) {
84 c->reg.fixed_planes = brw_vec8_grf(i, 0);
85 i++;
86 }
87
88 if (intel->needs_ff_sync) {
89 c->reg.ff_sync = retype(brw_vec1_grf(i, 0), BRW_REGISTER_TYPE_UD);
90 i++;
91 }
92
93 c->first_tmp = i;
94 c->last_tmp = i;
95
96 c->prog_data.urb_read_length = c->nr_regs; /* ? */
97 c->prog_data.total_grf = i;
98 }
99
100
101
102 /* Line clipping, more or less following the following algorithm:
103 *
104 * for (p=0;p<MAX_PLANES;p++) {
105 * if (clipmask & (1 << p)) {
106 * GLfloat dp0 = DOTPROD( vtx0, plane[p] );
107 * GLfloat dp1 = DOTPROD( vtx1, plane[p] );
108 *
109 * if (IS_NEGATIVE(dp1)) {
110 * GLfloat t = dp1 / (dp1 - dp0);
111 * if (t > t1) t1 = t;
112 * } else {
113 * GLfloat t = dp0 / (dp0 - dp1);
114 * if (t > t0) t0 = t;
115 * }
116 *
117 * if (t0 + t1 >= 1.0)
118 * return;
119 * }
120 * }
121 *
122 * interp( ctx, newvtx0, vtx0, vtx1, t0 );
123 * interp( ctx, newvtx1, vtx1, vtx0, t1 );
124 *
125 */
126 static void clip_and_emit_line( struct brw_clip_compile *c )
127 {
128 struct brw_compile *p = &c->func;
129 struct brw_context *brw = p->brw;
130 struct brw_indirect vtx0 = brw_indirect(0, 0);
131 struct brw_indirect vtx1 = brw_indirect(1, 0);
132 struct brw_indirect newvtx0 = brw_indirect(2, 0);
133 struct brw_indirect newvtx1 = brw_indirect(3, 0);
134 struct brw_indirect plane_ptr = brw_indirect(4, 0);
135 struct brw_instruction *plane_loop;
136 struct brw_instruction *plane_active;
137 struct brw_instruction *is_negative;
138 struct brw_instruction *is_neg2 = NULL;
139 struct brw_instruction *not_culled;
140 struct brw_reg v1_null_ud = retype(vec1(brw_null_reg()), BRW_REGISTER_TYPE_UD);
141
142 brw_MOV(p, get_addr_reg(vtx0), brw_address(c->reg.vertex[0]));
143 brw_MOV(p, get_addr_reg(vtx1), brw_address(c->reg.vertex[1]));
144 brw_MOV(p, get_addr_reg(newvtx0), brw_address(c->reg.vertex[2]));
145 brw_MOV(p, get_addr_reg(newvtx1), brw_address(c->reg.vertex[3]));
146 brw_MOV(p, get_addr_reg(plane_ptr), brw_clip_plane0_address(c));
147
148 /* Note: init t0, t1 together:
149 */
150 brw_MOV(p, vec2(c->reg.t0), brw_imm_f(0));
151
152 brw_clip_init_planes(c);
153 brw_clip_init_clipmask(c);
154
155 /* -ve rhw workaround */
156 if (brw->has_negative_rhw_bug) {
157 brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
158 brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
159 brw_imm_ud(1<<20));
160 brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(0x3f));
161 }
162
163 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
164
165 plane_loop = brw_DO(p, BRW_EXECUTE_1);
166 {
167 /* if (planemask & 1)
168 */
169 brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
170 brw_AND(p, v1_null_ud, c->reg.planemask, brw_imm_ud(1));
171
172 plane_active = brw_IF(p, BRW_EXECUTE_1);
173 {
174 if (c->key.nr_userclip)
175 brw_MOV(p, c->reg.plane_equation, deref_4f(plane_ptr, 0));
176 else
177 brw_MOV(p, c->reg.plane_equation, deref_4b(plane_ptr, 0));
178
179 /* dp = DP4(vtx->position, plane)
180 */
181 brw_DP4(p, vec4(c->reg.dp0), deref_4f(vtx0, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
182
183 /* if (IS_NEGATIVE(dp1))
184 */
185 brw_set_conditionalmod(p, BRW_CONDITIONAL_L);
186 brw_DP4(p, vec4(c->reg.dp1), deref_4f(vtx1, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
187 is_negative = brw_IF(p, BRW_EXECUTE_1);
188 {
189 /*
190 * Both can be negative on GM965/G965 due to RHW workaround
191 * if so, this object should be rejected.
192 */
193 if (brw->has_negative_rhw_bug) {
194 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_LE, c->reg.dp0, brw_imm_f(0.0));
195 is_neg2 = brw_IF(p, BRW_EXECUTE_1);
196 {
197 brw_clip_kill_thread(c);
198 }
199 brw_ENDIF(p, is_neg2);
200 }
201
202 brw_ADD(p, c->reg.t, c->reg.dp1, negate(c->reg.dp0));
203 brw_math_invert(p, c->reg.t, c->reg.t);
204 brw_MUL(p, c->reg.t, c->reg.t, c->reg.dp1);
205
206 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t1 );
207 brw_MOV(p, c->reg.t1, c->reg.t);
208 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
209 }
210 is_negative = brw_ELSE(p, is_negative);
211 {
212 /* Coming back in. We know that both cannot be negative
213 * because the line would have been culled in that case.
214 */
215
216 /* If both are positive, do nothing */
217 /* Only on GM965/G965 */
218 if (brw->has_negative_rhw_bug) {
219 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.dp0, brw_imm_f(0.0));
220 is_neg2 = brw_IF(p, BRW_EXECUTE_1);
221 }
222
223 {
224 brw_ADD(p, c->reg.t, c->reg.dp0, negate(c->reg.dp1));
225 brw_math_invert(p, c->reg.t, c->reg.t);
226 brw_MUL(p, c->reg.t, c->reg.t, c->reg.dp0);
227
228 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t0 );
229 brw_MOV(p, c->reg.t0, c->reg.t);
230 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
231 }
232
233 if (brw->has_negative_rhw_bug) {
234 brw_ENDIF(p, is_neg2);
235 }
236 }
237 brw_ENDIF(p, is_negative);
238 }
239 brw_ENDIF(p, plane_active);
240
241 /* plane_ptr++;
242 */
243 brw_ADD(p, get_addr_reg(plane_ptr), get_addr_reg(plane_ptr), brw_clip_plane_stride(c));
244
245 /* while (planemask>>=1) != 0
246 */
247 brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
248 brw_SHR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(1));
249 }
250 brw_WHILE(p, plane_loop);
251
252 brw_ADD(p, c->reg.t, c->reg.t0, c->reg.t1);
253 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.t, brw_imm_f(1.0));
254 not_culled = brw_IF(p, BRW_EXECUTE_1);
255 {
256 brw_clip_interp_vertex(c, newvtx0, vtx0, vtx1, c->reg.t0, GL_FALSE);
257 brw_clip_interp_vertex(c, newvtx1, vtx1, vtx0, c->reg.t1, GL_FALSE);
258
259 brw_clip_emit_vue(c, newvtx0, 1, 0, (_3DPRIM_LINESTRIP << 2) | R02_PRIM_START);
260 brw_clip_emit_vue(c, newvtx1, 0, 1, (_3DPRIM_LINESTRIP << 2) | R02_PRIM_END);
261 }
262 brw_ENDIF(p, not_culled);
263 brw_clip_kill_thread(c);
264 }
265
266
267
268 void brw_emit_line_clip( struct brw_clip_compile *c )
269 {
270 brw_clip_line_alloc_regs(c);
271 brw_clip_init_ff_sync(c);
272
273 if (c->key.do_flat_shading) {
274 if (c->key.pv_first)
275 brw_clip_copy_colors(c, 1, 0);
276 else
277 brw_clip_copy_colors(c, 0, 1);
278 }
279
280 clip_and_emit_line(c);
281 }