Fix a few typos
[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_unfilled.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keithw@vmware.com>
30 */
31
32 #include "main/glheader.h"
33 #include "main/macros.h"
34 #include "main/enums.h"
35 #include "program/program.h"
36
37 #include "intel_batchbuffer.h"
38
39 #include "brw_defines.h"
40 #include "brw_context.h"
41 #include "brw_eu.h"
42 #include "brw_clip.h"
43
44
45
46 /* This is performed against the original triangles, so no indirection
47 * required:
48 BZZZT!
49 */
50 static void compute_tri_direction( struct brw_clip_compile *c )
51 {
52 struct brw_codegen *p = &c->func;
53 struct brw_reg e = c->reg.tmp0;
54 struct brw_reg f = c->reg.tmp1;
55 GLuint hpos_offset = brw_varying_to_offset(&c->vue_map, VARYING_SLOT_POS);
56 struct brw_reg v0 = byte_offset(c->reg.vertex[0], hpos_offset);
57 struct brw_reg v1 = byte_offset(c->reg.vertex[1], hpos_offset);
58 struct brw_reg v2 = byte_offset(c->reg.vertex[2], hpos_offset);
59
60
61 struct brw_reg v0n = get_tmp(c);
62 struct brw_reg v1n = get_tmp(c);
63 struct brw_reg v2n = get_tmp(c);
64
65 /* Convert to NDC.
66 * NOTE: We can't modify the original vertex coordinates,
67 * as it may impact further operations.
68 * So, we have to keep normalized coordinates in temp registers.
69 *
70 * TBD-KC
71 * Try to optimize unnecessary MOV's.
72 */
73 brw_MOV(p, v0n, v0);
74 brw_MOV(p, v1n, v1);
75 brw_MOV(p, v2n, v2);
76
77 brw_clip_project_position(c, v0n);
78 brw_clip_project_position(c, v1n);
79 brw_clip_project_position(c, v2n);
80
81 /* Calculate the vectors of two edges of the triangle:
82 */
83 brw_ADD(p, e, v0n, negate(v2n));
84 brw_ADD(p, f, v1n, negate(v2n));
85
86 /* Take their crossproduct:
87 */
88 brw_set_default_access_mode(p, BRW_ALIGN_16);
89 brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, 1,2,0,3), brw_swizzle(f,2,0,1,3));
90 brw_MAC(p, vec4(e), negate(brw_swizzle(e, 2,0,1,3)), brw_swizzle(f,1,2,0,3));
91 brw_set_default_access_mode(p, BRW_ALIGN_1);
92
93 brw_MUL(p, c->reg.dir, c->reg.dir, vec4(e));
94 }
95
96
97 static void cull_direction( struct brw_clip_compile *c )
98 {
99 struct brw_codegen *p = &c->func;
100 GLuint conditional;
101
102 assert (!(c->key.fill_ccw == CLIP_CULL &&
103 c->key.fill_cw == CLIP_CULL));
104
105 if (c->key.fill_ccw == CLIP_CULL)
106 conditional = BRW_CONDITIONAL_GE;
107 else
108 conditional = BRW_CONDITIONAL_L;
109
110 brw_CMP(p,
111 vec1(brw_null_reg()),
112 conditional,
113 get_element(c->reg.dir, 2),
114 brw_imm_f(0));
115
116 brw_IF(p, BRW_EXECUTE_1);
117 {
118 brw_clip_kill_thread(c);
119 }
120 brw_ENDIF(p);
121 }
122
123
124
125 static void copy_bfc( struct brw_clip_compile *c )
126 {
127 struct brw_codegen *p = &c->func;
128 GLuint conditional;
129
130 /* Do we have any colors to copy?
131 */
132 if (!(brw_clip_have_varying(c, VARYING_SLOT_COL0) &&
133 brw_clip_have_varying(c, VARYING_SLOT_BFC0)) &&
134 !(brw_clip_have_varying(c, VARYING_SLOT_COL1) &&
135 brw_clip_have_varying(c, VARYING_SLOT_BFC1)))
136 return;
137
138 /* In some weird degenerate cases we can end up testing the
139 * direction twice, once for culling and once for bfc copying. Oh
140 * well, that's what you get for setting weird GL state.
141 */
142 if (c->key.copy_bfc_ccw)
143 conditional = BRW_CONDITIONAL_GE;
144 else
145 conditional = BRW_CONDITIONAL_L;
146
147 brw_CMP(p,
148 vec1(brw_null_reg()),
149 conditional,
150 get_element(c->reg.dir, 2),
151 brw_imm_f(0));
152
153 brw_IF(p, BRW_EXECUTE_1);
154 {
155 GLuint i;
156
157 for (i = 0; i < 3; i++) {
158 if (brw_clip_have_varying(c, VARYING_SLOT_COL0) &&
159 brw_clip_have_varying(c, VARYING_SLOT_BFC0))
160 brw_MOV(p,
161 byte_offset(c->reg.vertex[i],
162 brw_varying_to_offset(&c->vue_map,
163 VARYING_SLOT_COL0)),
164 byte_offset(c->reg.vertex[i],
165 brw_varying_to_offset(&c->vue_map,
166 VARYING_SLOT_BFC0)));
167
168 if (brw_clip_have_varying(c, VARYING_SLOT_COL1) &&
169 brw_clip_have_varying(c, VARYING_SLOT_BFC1))
170 brw_MOV(p,
171 byte_offset(c->reg.vertex[i],
172 brw_varying_to_offset(&c->vue_map,
173 VARYING_SLOT_COL1)),
174 byte_offset(c->reg.vertex[i],
175 brw_varying_to_offset(&c->vue_map,
176 VARYING_SLOT_BFC1)));
177 }
178 }
179 brw_ENDIF(p);
180 }
181
182
183
184
185 /*
186 GLfloat iz = 1.0 / dir.z;
187 GLfloat ac = dir.x * iz;
188 GLfloat bc = dir.y * iz;
189 offset = ctx->Polygon.OffsetUnits * DEPTH_SCALE;
190 offset += MAX2( abs(ac), abs(bc) ) * ctx->Polygon.OffsetFactor;
191 offset *= MRD;
192 */
193 static void compute_offset( struct brw_clip_compile *c )
194 {
195 struct brw_codegen *p = &c->func;
196 struct brw_reg off = c->reg.offset;
197 struct brw_reg dir = c->reg.dir;
198
199 brw_math_invert(p, get_element(off, 2), get_element(dir, 2));
200 brw_MUL(p, vec2(off), vec2(dir), get_element(off, 2));
201
202 brw_CMP(p,
203 vec1(brw_null_reg()),
204 BRW_CONDITIONAL_GE,
205 brw_abs(get_element(off, 0)),
206 brw_abs(get_element(off, 1)));
207
208 brw_SEL(p, vec1(off),
209 brw_abs(get_element(off, 0)), brw_abs(get_element(off, 1)));
210 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
211
212 brw_MUL(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_factor));
213 brw_ADD(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_units));
214 }
215
216
217 static void merge_edgeflags( struct brw_clip_compile *c )
218 {
219 struct brw_codegen *p = &c->func;
220 struct brw_reg tmp0 = get_element_ud(c->reg.tmp0, 0);
221
222 brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
223 brw_CMP(p,
224 vec1(brw_null_reg()),
225 BRW_CONDITIONAL_EQ,
226 tmp0,
227 brw_imm_ud(_3DPRIM_POLYGON));
228
229 /* Get away with using reg.vertex because we know that this is not
230 * a _3DPRIM_TRISTRIP_REVERSE:
231 */
232 brw_IF(p, BRW_EXECUTE_1);
233 {
234 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<8));
235 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_EQ);
236 brw_MOV(p, byte_offset(c->reg.vertex[0],
237 brw_varying_to_offset(&c->vue_map,
238 VARYING_SLOT_EDGE)),
239 brw_imm_f(0));
240 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
241
242 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<9));
243 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_EQ);
244 brw_MOV(p, byte_offset(c->reg.vertex[2],
245 brw_varying_to_offset(&c->vue_map,
246 VARYING_SLOT_EDGE)),
247 brw_imm_f(0));
248 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
249 }
250 brw_ENDIF(p);
251 }
252
253
254
255 static void apply_one_offset( struct brw_clip_compile *c,
256 struct brw_indirect vert )
257 {
258 struct brw_codegen *p = &c->func;
259 GLuint ndc_offset = brw_varying_to_offset(&c->vue_map,
260 BRW_VARYING_SLOT_NDC);
261 struct brw_reg z = deref_1f(vert, ndc_offset +
262 2 * type_sz(BRW_REGISTER_TYPE_F));
263
264 brw_ADD(p, z, z, vec1(c->reg.offset));
265 }
266
267
268
269 /***********************************************************************
270 * Output clipped polygon as an unfilled primitive:
271 */
272 static void emit_lines(struct brw_clip_compile *c,
273 bool do_offset)
274 {
275 struct brw_codegen *p = &c->func;
276 struct brw_indirect v0 = brw_indirect(0, 0);
277 struct brw_indirect v1 = brw_indirect(1, 0);
278 struct brw_indirect v0ptr = brw_indirect(2, 0);
279 struct brw_indirect v1ptr = brw_indirect(3, 0);
280
281 /* Need a separate loop for offset:
282 */
283 if (do_offset) {
284 brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
285 brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
286
287 brw_DO(p, BRW_EXECUTE_1);
288 {
289 brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
290 brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
291
292 apply_one_offset(c, v0);
293
294 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
295 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_G);
296 }
297 brw_WHILE(p);
298 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
299 }
300
301 /* v1ptr = &inlist[nr_verts]
302 * *v1ptr = v0
303 */
304 brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
305 brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
306 brw_ADD(p, get_addr_reg(v1ptr), get_addr_reg(v0ptr), retype(c->reg.nr_verts, BRW_REGISTER_TYPE_UW));
307 brw_ADD(p, get_addr_reg(v1ptr), get_addr_reg(v1ptr), retype(c->reg.nr_verts, BRW_REGISTER_TYPE_UW));
308 brw_MOV(p, deref_1uw(v1ptr, 0), deref_1uw(v0ptr, 0));
309
310 brw_DO(p, BRW_EXECUTE_1);
311 {
312 brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
313 brw_MOV(p, get_addr_reg(v1), deref_1uw(v0ptr, 2));
314 brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
315
316 /* draw edge if edgeflag != 0 */
317 brw_CMP(p,
318 vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
319 deref_1f(v0, brw_varying_to_offset(&c->vue_map,
320 VARYING_SLOT_EDGE)),
321 brw_imm_f(0));
322 brw_IF(p, BRW_EXECUTE_1);
323 {
324 brw_clip_emit_vue(c, v0, BRW_URB_WRITE_ALLOCATE_COMPLETE,
325 (_3DPRIM_LINESTRIP << URB_WRITE_PRIM_TYPE_SHIFT)
326 | URB_WRITE_PRIM_START);
327 brw_clip_emit_vue(c, v1, BRW_URB_WRITE_ALLOCATE_COMPLETE,
328 (_3DPRIM_LINESTRIP << URB_WRITE_PRIM_TYPE_SHIFT)
329 | URB_WRITE_PRIM_END);
330 }
331 brw_ENDIF(p);
332
333 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
334 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
335 }
336 brw_WHILE(p);
337 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
338 }
339
340
341
342 static void emit_points(struct brw_clip_compile *c,
343 bool do_offset )
344 {
345 struct brw_codegen *p = &c->func;
346
347 struct brw_indirect v0 = brw_indirect(0, 0);
348 struct brw_indirect v0ptr = brw_indirect(2, 0);
349
350 brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
351 brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
352
353 brw_DO(p, BRW_EXECUTE_1);
354 {
355 brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
356 brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
357
358 /* draw if edgeflag != 0
359 */
360 brw_CMP(p,
361 vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
362 deref_1f(v0, brw_varying_to_offset(&c->vue_map,
363 VARYING_SLOT_EDGE)),
364 brw_imm_f(0));
365 brw_IF(p, BRW_EXECUTE_1);
366 {
367 if (do_offset)
368 apply_one_offset(c, v0);
369
370 brw_clip_emit_vue(c, v0, BRW_URB_WRITE_ALLOCATE_COMPLETE,
371 (_3DPRIM_POINTLIST << URB_WRITE_PRIM_TYPE_SHIFT)
372 | URB_WRITE_PRIM_START | URB_WRITE_PRIM_END);
373 }
374 brw_ENDIF(p);
375
376 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
377 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
378 }
379 brw_WHILE(p);
380 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
381 }
382
383
384
385
386
387
388
389 static void emit_primitives( struct brw_clip_compile *c,
390 GLuint mode,
391 bool do_offset )
392 {
393 switch (mode) {
394 case CLIP_FILL:
395 brw_clip_tri_emit_polygon(c);
396 break;
397
398 case CLIP_LINE:
399 emit_lines(c, do_offset);
400 break;
401
402 case CLIP_POINT:
403 emit_points(c, do_offset);
404 break;
405
406 case CLIP_CULL:
407 unreachable("not reached");
408 }
409 }
410
411
412
413 static void emit_unfilled_primitives( struct brw_clip_compile *c )
414 {
415 struct brw_codegen *p = &c->func;
416
417 /* Direction culling has already been done.
418 */
419 if (c->key.fill_ccw != c->key.fill_cw &&
420 c->key.fill_ccw != CLIP_CULL &&
421 c->key.fill_cw != CLIP_CULL)
422 {
423 brw_CMP(p,
424 vec1(brw_null_reg()),
425 BRW_CONDITIONAL_GE,
426 get_element(c->reg.dir, 2),
427 brw_imm_f(0));
428
429 brw_IF(p, BRW_EXECUTE_1);
430 {
431 emit_primitives(c, c->key.fill_ccw, c->key.offset_ccw);
432 }
433 brw_ELSE(p);
434 {
435 emit_primitives(c, c->key.fill_cw, c->key.offset_cw);
436 }
437 brw_ENDIF(p);
438 }
439 else if (c->key.fill_cw != CLIP_CULL) {
440 emit_primitives(c, c->key.fill_cw, c->key.offset_cw);
441 }
442 else if (c->key.fill_ccw != CLIP_CULL) {
443 emit_primitives(c, c->key.fill_ccw, c->key.offset_ccw);
444 }
445 }
446
447
448
449
450 static void check_nr_verts( struct brw_clip_compile *c )
451 {
452 struct brw_codegen *p = &c->func;
453
454 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.nr_verts, brw_imm_d(3));
455 brw_IF(p, BRW_EXECUTE_1);
456 {
457 brw_clip_kill_thread(c);
458 }
459 brw_ENDIF(p);
460 }
461
462
463 void brw_emit_unfilled_clip( struct brw_clip_compile *c )
464 {
465 struct brw_codegen *p = &c->func;
466
467 c->need_direction = ((c->key.offset_ccw || c->key.offset_cw) ||
468 (c->key.fill_ccw != c->key.fill_cw) ||
469 c->key.fill_ccw == CLIP_CULL ||
470 c->key.fill_cw == CLIP_CULL ||
471 c->key.copy_bfc_cw ||
472 c->key.copy_bfc_ccw);
473
474 brw_clip_tri_alloc_regs(c, 3 + c->key.nr_userclip + 6);
475 brw_clip_tri_init_vertices(c);
476 brw_clip_init_ff_sync(c);
477
478 assert(brw_clip_have_varying(c, VARYING_SLOT_EDGE));
479
480 if (c->key.fill_ccw == CLIP_CULL &&
481 c->key.fill_cw == CLIP_CULL) {
482 brw_clip_kill_thread(c);
483 return;
484 }
485
486 merge_edgeflags(c);
487
488 /* Need to use the inlist indirection here:
489 */
490 if (c->need_direction)
491 compute_tri_direction(c);
492
493 if (c->key.fill_ccw == CLIP_CULL ||
494 c->key.fill_cw == CLIP_CULL)
495 cull_direction(c);
496
497 if (c->key.offset_ccw ||
498 c->key.offset_cw)
499 compute_offset(c);
500
501 if (c->key.copy_bfc_ccw ||
502 c->key.copy_bfc_cw)
503 copy_bfc(c);
504
505 /* Need to do this whether we clip or not:
506 */
507 if (c->has_flat_shading)
508 brw_clip_tri_flat_shade(c);
509
510 brw_clip_init_clipmask(c);
511 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, c->reg.planemask, brw_imm_ud(0));
512 brw_IF(p, BRW_EXECUTE_1);
513 {
514 brw_clip_init_planes(c);
515 brw_clip_tri(c);
516 check_nr_verts(c);
517 }
518 brw_ENDIF(p);
519
520 emit_unfilled_primitives(c);
521 brw_clip_kill_thread(c);
522 }
523
524
525