src/mesa/drivers/dri/i965/brw_clip_util.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/glheader.h"
  34 #include "main/macros.h"
  35 #include "main/enums.h"
  36 #include "shader/program.h"
  37
  38 #include "intel_batchbuffer.h"
  39
  40 #include "brw_defines.h"
  41 #include "brw_context.h"
  42 #include "brw_eu.h"
  43 #include "brw_clip.h"
  44
  45
  46
  47
  48 struct brw_reg get_tmp( struct brw_clip_compile *c )
  49 {
  50    struct brw_reg tmp = brw_vec4_grf(c->last_tmp, 0);
  51
  52    if (++c->last_tmp > c->prog_data.total_grf)
  53       c->prog_data.total_grf = c->last_tmp;
  54
  55    return tmp;
  56 }
  57
  58 static void release_tmp( struct brw_clip_compile *c, struct brw_reg tmp )
  59 {
  60    if (tmp.nr == c->last_tmp-1)
  61       c->last_tmp--;
  62 }
  63
  64
  65 static struct brw_reg make_plane_ud(GLuint x, GLuint y, GLuint z, GLuint w)
  66 {
  67    return brw_imm_ud((w<<24) | (z<<16) | (y<<8) | x);
  68 }
  69
  70
  71 void brw_clip_init_planes( struct brw_clip_compile *c )
  72 {
  73    struct brw_compile *p = &c->func;
  74
  75    if (!c->key.nr_userclip) {
  76       brw_MOV(p, get_element_ud(c->reg.fixed_planes, 0), make_plane_ud( 0,    0, 0xff, 1));
  77       brw_MOV(p, get_element_ud(c->reg.fixed_planes, 1), make_plane_ud( 0,    0,    1, 1));
  78       brw_MOV(p, get_element_ud(c->reg.fixed_planes, 2), make_plane_ud( 0, 0xff,    0, 1));
  79       brw_MOV(p, get_element_ud(c->reg.fixed_planes, 3), make_plane_ud( 0,    1,    0, 1));
  80       brw_MOV(p, get_element_ud(c->reg.fixed_planes, 4), make_plane_ud(0xff,  0,    0, 1));
  81       brw_MOV(p, get_element_ud(c->reg.fixed_planes, 5), make_plane_ud( 1,    0,    0, 1));
  82    }
  83 }
  84
  85
  86
  87 #define W 3
  88
  89 /* Project 'pos' to screen space (or back again), overwrite with results:
  90  */
  91 void brw_clip_project_position(struct brw_clip_compile *c, struct brw_reg pos )
  92 {
  93    struct brw_compile *p = &c->func;
  94
  95    /* calc rhw
  96     */
  97    brw_math_invert(p, get_element(pos, W), get_element(pos, W));
  98
  99    /* value.xyz *= value.rhw
 100     */
 101    brw_set_access_mode(p, BRW_ALIGN_16);
 102    brw_MUL(p, brw_writemask(pos, WRITEMASK_XYZ), pos, brw_swizzle1(pos, W));
 103    brw_set_access_mode(p, BRW_ALIGN_1);
 104 }
 105
 106
 107 static void brw_clip_project_vertex( struct brw_clip_compile *c,
 108                                      struct brw_indirect vert_addr )
 109 {
 110    struct brw_compile *p = &c->func;
 111    struct brw_reg tmp = get_tmp(c);
 112
 113    /* Fixup position.  Extract from the original vertex and re-project
 114     * to screen space:
 115     */
 116    brw_MOV(p, tmp, deref_4f(vert_addr, c->offset[VERT_RESULT_HPOS]));
 117    brw_clip_project_position(c, tmp);
 118    brw_MOV(p, deref_4f(vert_addr, c->header_position_offset), tmp);
 119
 120    release_tmp(c, tmp);
 121 }
 122
 123
 124
 125
 126 /* Interpolate between two vertices and put the result into a0.0.
 127  * Increment a0.0 accordingly.
 128  */
 129 void brw_clip_interp_vertex( struct brw_clip_compile *c,
 130                              struct brw_indirect dest_ptr,
 131                              struct brw_indirect v0_ptr, /* from */
 132                              struct brw_indirect v1_ptr, /* to */
 133                              struct brw_reg t0,
 134                              GLboolean force_edgeflag)
 135 {
 136    struct brw_compile *p = &c->func;
 137    struct intel_context *intel = &p->brw->intel;
 138    struct brw_reg tmp = get_tmp(c);
 139    GLuint i;
 140
 141    /* Just copy the vertex header:
 142     */
 143    /*
 144     * After CLIP stage, only first 256 bits of the VUE are read
 145     * back on Ironlake, so needn't change it
 146     */
 147    brw_copy_indirect_to_indirect(p, dest_ptr, v0_ptr, 1);
 148
 149    /* Iterate over each attribute (could be done in pairs?)
 150     */
 151    for (i = 0; i < c->nr_attrs; i++) {
 152       GLuint delta = i*16 + 32;
 153
 154       if (intel->is_ironlake)
 155           delta = i * 16 + 32 * 3;
 156
 157       if (delta == c->offset[VERT_RESULT_EDGE]) {
 158          if (force_edgeflag)
 159             brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(1));
 160          else
 161             brw_MOV(p, deref_4f(dest_ptr, delta), deref_4f(v0_ptr, delta));
 162       }
 163       else {
 164          /* Interpolate:
 165           *
 166           *        New = attr0 + t*attr1 - t*attr0
 167           */
 168          brw_MUL(p,
 169                  vec4(brw_null_reg()),
 170                  deref_4f(v1_ptr, delta),
 171                  t0);
 172
 173          brw_MAC(p,
 174                  tmp,
 175                  negate(deref_4f(v0_ptr, delta)),
 176                  t0);
 177
 178          brw_ADD(p,
 179                  deref_4f(dest_ptr, delta),
 180                  deref_4f(v0_ptr, delta),
 181                  tmp);
 182       }
 183    }
 184
 185    if (i & 1) {
 186       GLuint delta = i*16 + 32;
 187
 188       if (intel->is_ironlake)
 189           delta = i * 16 + 32 * 3;
 190
 191       brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(0));
 192    }
 193
 194    release_tmp(c, tmp);
 195
 196    /* Recreate the projected (NDC) coordinate in the new vertex
 197     * header:
 198     */
 199    brw_clip_project_vertex(c, dest_ptr );
 200 }
 201
 202
 203
 204
 205 #define MAX_MRF 16
 206
 207 void brw_clip_emit_vue(struct brw_clip_compile *c,
 208                        struct brw_indirect vert,
 209                        GLboolean allocate,
 210                        GLboolean eot,
 211                        GLuint header)
 212 {
 213    struct brw_compile *p = &c->func;
 214    GLuint start = c->last_mrf;
 215
 216    brw_clip_ff_sync(c);
 217
 218    assert(!(allocate && eot));
 219
 220    /* Cycle through mrf regs - probably futile as we have to wait for
 221     * the allocation response anyway.  Also, the order this function
 222     * is invoked doesn't correspond to the order the instructions will
 223     * be executed, so it won't have any effect in many cases.
 224     */
 225 #if 0
 226    if (start + c->nr_regs + 1 >= MAX_MRF)
 227       start = 0;
 228
 229    c->last_mrf = start + c->nr_regs + 1;
 230 #endif
 231
 232    /* Copy the vertex from vertn into m1..mN+1:
 233     */
 234    brw_copy_from_indirect(p, brw_message_reg(start+1), vert, c->nr_regs);
 235
 236    /* Overwrite PrimType and PrimStart in the message header, for
 237     * each vertex in turn:
 238     */
 239    brw_MOV(p, get_element_ud(c->reg.R0, 2), brw_imm_ud(header));
 240
 241
 242    /* Send each vertex as a seperate write to the urb.  This
 243     * is different to the concept in brw_sf_emit.c, where
 244     * subsequent writes are used to build up a single urb
 245     * entry.  Each of these writes instantiates a seperate
 246     * urb entry - (I think... what about 'allocate'?)
 247     */
 248    brw_urb_WRITE(p,
 249                  allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
 250                  start,
 251                  c->reg.R0,
 252                  allocate,
 253                  1,             /* used */
 254                  c->nr_regs + 1, /* msg length */
 255                  allocate ? 1 : 0, /* response_length */
 256                  eot,           /* eot */
 257                  1,             /* writes_complete */
 258                  0,             /* urb offset */
 259                  BRW_URB_SWIZZLE_NONE);
 260 }
 261
 262
 263
 264 void brw_clip_kill_thread(struct brw_clip_compile *c)
 265 {
 266    struct brw_compile *p = &c->func;
 267
 268    brw_clip_ff_sync(c);
 269    /* Send an empty message to kill the thread and release any
 270     * allocated urb entry:
 271     */
 272    brw_urb_WRITE(p,
 273                  retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
 274                  0,
 275                  c->reg.R0,
 276                  0,             /* allocate */
 277                  0,             /* used */
 278                  1,             /* msg len */
 279                  0,             /* response len */
 280                  1,             /* eot */
 281                  1,             /* writes complete */
 282                  0,
 283                  BRW_URB_SWIZZLE_NONE);
 284 }
 285
 286
 287
 288
 289 struct brw_reg brw_clip_plane0_address( struct brw_clip_compile *c )
 290 {
 291    return brw_address(c->reg.fixed_planes);
 292 }
 293
 294
 295 struct brw_reg brw_clip_plane_stride( struct brw_clip_compile *c )
 296 {
 297    if (c->key.nr_userclip) {
 298       return brw_imm_uw(16);
 299    }
 300    else {
 301       return brw_imm_uw(4);
 302    }
 303 }
 304
 305
 306 /* If flatshading, distribute color from provoking vertex prior to
 307  * clipping.
 308  */
 309 void brw_clip_copy_colors( struct brw_clip_compile *c,
 310                            GLuint to, GLuint from )
 311 {
 312    struct brw_compile *p = &c->func;
 313
 314    if (c->offset[VERT_RESULT_COL0])
 315       brw_MOV(p,
 316               byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_COL0]),
 317               byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_COL0]));
 318
 319    if (c->offset[VERT_RESULT_COL1])
 320       brw_MOV(p,
 321               byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_COL1]),
 322               byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_COL1]));
 323
 324    if (c->offset[VERT_RESULT_BFC0])
 325       brw_MOV(p,
 326               byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_BFC0]),
 327               byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_BFC0]));
 328
 329    if (c->offset[VERT_RESULT_BFC1])
 330       brw_MOV(p,
 331               byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_BFC1]),
 332               byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_BFC1]));
 333 }
 334
 335
 336
 337 void brw_clip_init_clipmask( struct brw_clip_compile *c )
 338 {
 339    struct brw_compile *p = &c->func;
 340    struct brw_reg incoming = get_element_ud(c->reg.R0, 2);
 341
 342    /* Shift so that lowest outcode bit is rightmost:
 343     */
 344    brw_SHR(p, c->reg.planemask, incoming, brw_imm_ud(26));
 345
 346    if (c->key.nr_userclip) {
 347       struct brw_reg tmp = retype(vec1(get_tmp(c)), BRW_REGISTER_TYPE_UD);
 348
 349       /* Rearrange userclip outcodes so that they come directly after
 350        * the fixed plane bits.
 351        */
 352       brw_AND(p, tmp, incoming, brw_imm_ud(0x3f<<14));
 353       brw_SHR(p, tmp, tmp, brw_imm_ud(8));
 354       brw_OR(p, c->reg.planemask, c->reg.planemask, tmp);
 355
 356       release_tmp(c, tmp);
 357    }
 358 }
 359
 360 void brw_clip_ff_sync(struct brw_clip_compile *c)
 361 {
 362     struct intel_context *intel = &c->func.brw->intel;
 363
 364     if (intel->needs_ff_sync) {
 365         struct brw_compile *p = &c->func;
 366         struct brw_instruction *need_ff_sync;
 367
 368         brw_set_conditionalmod(p, BRW_CONDITIONAL_Z);
 369         brw_AND(p, brw_null_reg(), c->reg.ff_sync, brw_imm_ud(0x1));
 370         need_ff_sync = brw_IF(p, BRW_EXECUTE_1);
 371         {
 372             brw_OR(p, c->reg.ff_sync, c->reg.ff_sync, brw_imm_ud(0x1));
 373             brw_ff_sync(p,
 374                     c->reg.R0,
 375                     0,
 376                     c->reg.R0,
 377                     1,
 378                     1,          /* used */
 379                     1,          /* msg length */
 380                     1,          /* response length */
 381                     0,          /* eot */
 382                     1,          /* write compelete */
 383                     0,          /* urb offset */
 384                     BRW_URB_SWIZZLE_NONE);
 385         }
 386         brw_ENDIF(p, need_ff_sync);
 387         brw_set_predicate_control(p, BRW_PREDICATE_NONE);
 388     }
 389 }
 390
 391 void brw_clip_init_ff_sync(struct brw_clip_compile *c)
 392 {
 393     struct intel_context *intel = &c->func.brw->intel;
 394
 395     if (intel->needs_ff_sync) {
 396         struct brw_compile *p = &c->func;
 397
 398         brw_MOV(p, c->reg.ff_sync, brw_imm_ud(0));
 399     }
 400 }