src/mesa/drivers/dri/i965/brw_context.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/imports.h"
  34 #include "main/api_noop.h"
  35 #include "main/macros.h"
  36 #include "main/simple_list.h"
  37 #include "brw_context.h"
  38 #include "brw_defines.h"
  39 #include "brw_draw.h"
  40 #include "brw_state.h"
  41 #include "intel_span.h"
  42 #include "tnl/t_pipeline.h"
  43 #include "../glsl/ralloc.h"
  44
  45 /***************************************
  46  * Mesa's Driver Functions
  47  ***************************************/
  48
  49 static void brwInitDriverFunctions( struct dd_function_table *functions )
  50 {
  51    intelInitDriverFunctions( functions );
  52
  53    brwInitFragProgFuncs( functions );
  54    brw_init_queryobj_functions(functions);
  55 }
  56
  57 GLboolean brwCreateContext( int api,
  58                             const struct gl_config *mesaVis,
  59                             __DRIcontext *driContextPriv,
  60                             void *sharedContextPrivate)
  61 {
  62    struct dd_function_table functions;
  63    struct brw_context *brw = rzalloc(NULL, struct brw_context);
  64    struct intel_context *intel = &brw->intel;
  65    struct gl_context *ctx = &intel->ctx;
  66    unsigned i;
  67
  68    if (!brw) {
  69       printf("%s: failed to alloc context\n", __FUNCTION__);
  70       return GL_FALSE;
  71    }
  72
  73    brwInitVtbl( brw );
  74    brwInitDriverFunctions( &functions );
  75
  76    if (!intelInitContext( intel, api, mesaVis, driContextPriv,
  77                           sharedContextPrivate, &functions )) {
  78       printf("%s: failed to init intel context\n", __FUNCTION__);
  79       FREE(brw);
  80       return GL_FALSE;
  81    }
  82
  83    /* Initialize swrast, tnl driver tables: */
  84    intelInitSpanFuncs(ctx);
  85
  86    TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
  87
  88    ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
  89    ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
  90    ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
  91    ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
  92                                      ctx->Const.MaxTextureImageUnits);
  93    ctx->Const.MaxVertexTextureImageUnits = 0; /* no vertex shader textures */
  94    ctx->Const.MaxCombinedTextureImageUnits =
  95       ctx->Const.MaxVertexTextureImageUnits +
  96       ctx->Const.MaxTextureImageUnits;
  97
  98    ctx->Const.MaxTextureLevels = 14; /* 8192 */
  99    if (ctx->Const.MaxTextureLevels > MAX_TEXTURE_LEVELS)
 100            ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS;
 101    ctx->Const.Max3DTextureLevels = 9;
 102    ctx->Const.MaxCubeTextureLevels = 12;
 103    ctx->Const.MaxTextureRectSize = (1<<12);
 104
 105    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 106
 107    /* if conformance mode is set, swrast can handle any size AA point */
 108    ctx->Const.MaxPointSizeAA = 255.0;
 109
 110    /* We want the GLSL compiler to emit code that uses condition codes */
 111    for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
 112       ctx->ShaderCompilerOptions[i].EmitCondCodes = GL_TRUE;
 113       ctx->ShaderCompilerOptions[i].EmitNVTempInitialization = GL_TRUE;
 114       ctx->ShaderCompilerOptions[i].EmitNoNoise = GL_TRUE;
 115       ctx->ShaderCompilerOptions[i].EmitNoMainReturn = GL_TRUE;
 116       ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = GL_TRUE;
 117       ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = GL_TRUE;
 118
 119       ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform =
 120          (i == MESA_SHADER_FRAGMENT);
 121       ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
 122          (i == MESA_SHADER_FRAGMENT);
 123    }
 124
 125    ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
 126    ctx->Const.VertexProgram.MaxAluInstructions = 0;
 127    ctx->Const.VertexProgram.MaxTexInstructions = 0;
 128    ctx->Const.VertexProgram.MaxTexIndirections = 0;
 129    ctx->Const.VertexProgram.MaxNativeAluInstructions = 0;
 130    ctx->Const.VertexProgram.MaxNativeTexInstructions = 0;
 131    ctx->Const.VertexProgram.MaxNativeTexIndirections = 0;
 132    ctx->Const.VertexProgram.MaxNativeAttribs = 16;
 133    ctx->Const.VertexProgram.MaxNativeTemps = 256;
 134    ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
 135    ctx->Const.VertexProgram.MaxNativeParameters = 1024;
 136    ctx->Const.VertexProgram.MaxEnvParams =
 137       MIN2(ctx->Const.VertexProgram.MaxNativeParameters,
 138            ctx->Const.VertexProgram.MaxEnvParams);
 139
 140    ctx->Const.FragmentProgram.MaxNativeInstructions = (16 * 1024);
 141    ctx->Const.FragmentProgram.MaxNativeAluInstructions = (16 * 1024);
 142    ctx->Const.FragmentProgram.MaxNativeTexInstructions = (16 * 1024);
 143    ctx->Const.FragmentProgram.MaxNativeTexIndirections = (16 * 1024);
 144    ctx->Const.FragmentProgram.MaxNativeAttribs = 12;
 145    ctx->Const.FragmentProgram.MaxNativeTemps = 256;
 146    ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
 147    ctx->Const.FragmentProgram.MaxNativeParameters = 1024;
 148    ctx->Const.FragmentProgram.MaxEnvParams =
 149       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 150            ctx->Const.FragmentProgram.MaxEnvParams);
 151
 152    /* Fragment shaders use real, 32-bit twos-complement integers for all
 153     * integer types.
 154     */
 155    ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
 156    ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
 157    ctx->Const.FragmentProgram.LowInt.Precision = 0;
 158    ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
 159       = ctx->Const.FragmentProgram.LowInt;
 160
 161    /* Gen6 converts quads to polygon in beginning of 3D pipeline,
 162       but we're not sure how it's actually done for vertex order,
 163       that affect provoking vertex decision. Always use last vertex
 164       convention for quad primitive which works as expected for now. */
 165    if (intel->gen >= 6)
 166        ctx->Const.QuadsFollowProvokingVertexConvention = GL_FALSE;
 167
 168    if (intel->is_g4x || intel->gen >= 5) {
 169       brw->CMD_VF_STATISTICS = GM45_3DSTATE_VF_STATISTICS;
 170       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
 171       brw->has_surface_tile_offset = GL_TRUE;
 172       if (intel->gen < 6)
 173           brw->has_compr4 = GL_TRUE;
 174       brw->has_aa_line_parameters = GL_TRUE;
 175       brw->has_pln = GL_TRUE;
 176   } else {
 177       brw->CMD_VF_STATISTICS = GEN4_3DSTATE_VF_STATISTICS;
 178       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965;
 179    }
 180
 181    /* WM maximum threads is number of EUs times number of threads per EU. */
 182    if (intel->gen >= 7) {
 183       if (IS_IVB_GT1(intel->intelScreen->deviceID)) {
 184          brw->wm_max_threads = 86;
 185          brw->vs_max_threads = 36;
 186          brw->urb.size = 128;
 187          brw->urb.max_vs_entries = 512;
 188          brw->urb.max_gs_entries = 192;
 189       } else if (IS_IVB_GT2(intel->intelScreen->deviceID)) {
 190          brw->wm_max_threads = 86;
 191          brw->vs_max_threads = 128;
 192          brw->urb.size = 256;
 193          brw->urb.max_vs_entries = 704;
 194          brw->urb.max_gs_entries = 320;
 195       } else {
 196          assert(!"Unknown gen7 device.");
 197       }
 198    } else if (intel->gen == 6) {
 199       if (IS_SNB_GT2(intel->intelScreen->deviceID)) {
 200          /* This could possibly be 80, but is supposed to require
 201           * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
 202           * GPU reset to change.
 203           */
 204          brw->wm_max_threads = 40;
 205          brw->vs_max_threads = 60;
 206          brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
 207          brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
 208       } else {
 209          brw->wm_max_threads = 40;
 210          brw->vs_max_threads = 24;
 211          brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
 212          brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
 213       }
 214    } else if (intel->gen == 5) {
 215       brw->urb.size = 1024;
 216       brw->vs_max_threads = 72;
 217       brw->wm_max_threads = 12 * 6;
 218    } else if (intel->is_g4x) {
 219       brw->urb.size = 384;
 220       brw->vs_max_threads = 32;
 221       brw->wm_max_threads = 10 * 5;
 222    } else if (intel->gen < 6) {
 223       brw->urb.size = 256;
 224       brw->vs_max_threads = 16;
 225       brw->wm_max_threads = 8 * 4;
 226       brw->has_negative_rhw_bug = GL_TRUE;
 227    }
 228
 229    if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) {
 230       brw->vs_max_threads = 1;
 231       brw->wm_max_threads = 1;
 232    }
 233
 234    brw_init_state( brw );
 235
 236    brw->curbe.last_buf = calloc(1, 4096);
 237    brw->curbe.next_buf = calloc(1, 4096);
 238
 239    brw->state.dirty.mesa = ~0;
 240    brw->state.dirty.brw = ~0;
 241
 242    brw->emit_state_always = 0;
 243
 244    intel->batch.need_workaround_flush = true;
 245
 246    ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
 247    ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
 248
 249    brw_draw_init( brw );
 250
 251    return GL_TRUE;
 252 }
 253