src/mesa/drivers/dri/i965/brw_device_info.c

   1 /*
   2  * Copyright © 2013 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <stdio.h>
  25 #include <stdlib.h>
  26 #include "brw_device_info.h"
  27
  28 static const struct brw_device_info brw_device_info_i965 = {
  29    .gen = 4,
  30    .has_negative_rhw_bug = true,
  31    .num_slices = 1,
  32    .max_vs_threads = 16,
  33    .max_gs_threads = 2,
  34    .max_wm_threads = 8 * 4,
  35    .urb = {
  36       .size = 256,
  37    },
  38 };
  39
  40 static const struct brw_device_info brw_device_info_g4x = {
  41    .gen = 4,
  42    .has_pln = true,
  43    .has_compr4 = true,
  44    .has_surface_tile_offset = true,
  45    .is_g4x = true,
  46    .num_slices = 1,
  47    .max_vs_threads = 32,
  48    .max_gs_threads = 2,
  49    .max_wm_threads = 10 * 5,
  50    .urb = {
  51       .size = 384,
  52    },
  53 };
  54
  55 static const struct brw_device_info brw_device_info_ilk = {
  56    .gen = 5,
  57    .has_pln = true,
  58    .has_compr4 = true,
  59    .has_surface_tile_offset = true,
  60    .num_slices = 1,
  61    .max_vs_threads = 72,
  62    .max_gs_threads = 32,
  63    .max_wm_threads = 12 * 6,
  64    .urb = {
  65       .size = 1024,
  66    },
  67 };
  68
  69 static const struct brw_device_info brw_device_info_snb_gt1 = {
  70    .gen = 6,
  71    .gt = 1,
  72    .has_hiz_and_separate_stencil = true,
  73    .has_llc = true,
  74    .has_pln = true,
  75    .has_surface_tile_offset = true,
  76    .needs_unlit_centroid_workaround = true,
  77    .num_slices = 1,
  78    .max_vs_threads = 24,
  79    .max_gs_threads = 21, /* conservative; 24 if rendering disabled. */
  80    .max_wm_threads = 40,
  81    .urb = {
  82       .size = 32,
  83       .min_vs_entries = 24,
  84       .max_vs_entries = 256,
  85       .max_gs_entries = 256,
  86    },
  87 };
  88
  89 static const struct brw_device_info brw_device_info_snb_gt2 = {
  90    .gen = 6,
  91    .gt = 2,
  92    .has_hiz_and_separate_stencil = true,
  93    .has_llc = true,
  94    .has_pln = true,
  95    .has_surface_tile_offset = true,
  96    .needs_unlit_centroid_workaround = true,
  97    .num_slices = 1,
  98    .max_vs_threads = 60,
  99    .max_gs_threads = 60,
 100    .max_wm_threads = 80,
 101    .urb = {
 102       .size = 64,
 103       .min_vs_entries = 24,
 104       .max_vs_entries = 256,
 105       .max_gs_entries = 256,
 106    },
 107 };
 108
 109 #define GEN7_FEATURES                               \
 110    .gen = 7,                                        \
 111    .has_hiz_and_separate_stencil = true,            \
 112    .must_use_separate_stencil = true,               \
 113    .has_llc = true,                                 \
 114    .has_pln = true,                                 \
 115    .has_surface_tile_offset = true
 116
 117 static const struct brw_device_info brw_device_info_ivb_gt1 = {
 118    GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
 119    .needs_unlit_centroid_workaround = true,
 120    .num_slices = 1,
 121    .max_vs_threads = 36,
 122    .max_hs_threads = 36,
 123    .max_ds_threads = 36,
 124    .max_gs_threads = 36,
 125    .max_wm_threads = 48,
 126    .max_cs_threads = 36,
 127    .urb = {
 128       .size = 128,
 129       .min_vs_entries = 32,
 130       .max_vs_entries = 512,
 131       .max_hs_entries = 32,
 132       .min_ds_entries = 10,
 133       .max_ds_entries = 288,
 134       .max_gs_entries = 192,
 135    },
 136 };
 137
 138 static const struct brw_device_info brw_device_info_ivb_gt2 = {
 139    GEN7_FEATURES, .is_ivybridge = true, .gt = 2,
 140    .needs_unlit_centroid_workaround = true,
 141    .num_slices = 1,
 142    .max_vs_threads = 128,
 143    .max_hs_threads = 128,
 144    .max_ds_threads = 128,
 145    .max_gs_threads = 128,
 146    .max_wm_threads = 172,
 147    .max_cs_threads = 64,
 148    .urb = {
 149       .size = 256,
 150       .min_vs_entries = 32,
 151       .max_vs_entries = 704,
 152       .max_hs_entries = 64,
 153       .min_ds_entries = 10,
 154       .max_ds_entries = 448,
 155       .max_gs_entries = 320,
 156    },
 157 };
 158
 159 static const struct brw_device_info brw_device_info_byt = {
 160    GEN7_FEATURES, .is_baytrail = true, .gt = 1,
 161    .needs_unlit_centroid_workaround = true,
 162    .num_slices = 1,
 163    .has_llc = false,
 164    .max_vs_threads = 36,
 165    .max_hs_threads = 36,
 166    .max_ds_threads = 36,
 167    .max_gs_threads = 36,
 168    .max_wm_threads = 48,
 169    .max_cs_threads = 32,
 170    .urb = {
 171       .size = 128,
 172       .min_vs_entries = 32,
 173       .max_vs_entries = 512,
 174       .max_hs_entries = 32,
 175       .min_ds_entries = 10,
 176       .max_ds_entries = 288,
 177       .max_gs_entries = 192,
 178    },
 179 };
 180
 181 #define HSW_FEATURES             \
 182    GEN7_FEATURES,                \
 183    .is_haswell = true,           \
 184    .supports_simd16_3src = true, \
 185    .has_resource_streamer = true
 186
 187 static const struct brw_device_info brw_device_info_hsw_gt1 = {
 188    HSW_FEATURES, .gt = 1,
 189    .num_slices = 1,
 190    .max_vs_threads = 70,
 191    .max_hs_threads = 70,
 192    .max_ds_threads = 70,
 193    .max_gs_threads = 70,
 194    .max_wm_threads = 102,
 195    .max_cs_threads = 70,
 196    .urb = {
 197       .size = 128,
 198       .min_vs_entries = 32,
 199       .max_vs_entries = 640,
 200       .max_hs_entries = 64,
 201       .min_ds_entries = 10,
 202       .max_ds_entries = 384,
 203       .max_gs_entries = 256,
 204    },
 205 };
 206
 207 static const struct brw_device_info brw_device_info_hsw_gt2 = {
 208    HSW_FEATURES, .gt = 2,
 209    .num_slices = 1,
 210    .max_vs_threads = 280,
 211    .max_hs_threads = 256,
 212    .max_ds_threads = 280,
 213    .max_gs_threads = 256,
 214    .max_wm_threads = 204,
 215    .max_cs_threads = 70,
 216    .urb = {
 217       .size = 256,
 218       .min_vs_entries = 64,
 219       .max_vs_entries = 1664,
 220       .max_hs_entries = 128,
 221       .min_ds_entries = 10,
 222       .max_ds_entries = 960,
 223       .max_gs_entries = 640,
 224    },
 225 };
 226
 227 static const struct brw_device_info brw_device_info_hsw_gt3 = {
 228    HSW_FEATURES, .gt = 3,
 229    .num_slices = 2,
 230    .max_vs_threads = 280,
 231    .max_hs_threads = 256,
 232    .max_ds_threads = 280,
 233    .max_gs_threads = 256,
 234    .max_wm_threads = 408,
 235    .max_cs_threads = 70,
 236    .urb = {
 237       .size = 512,
 238       .min_vs_entries = 64,
 239       .max_vs_entries = 1664,
 240       .max_hs_entries = 128,
 241       .min_ds_entries = 10,
 242       .max_ds_entries = 960,
 243       .max_gs_entries = 640,
 244    },
 245 };
 246
 247 #define GEN8_FEATURES                               \
 248    .gen = 8,                                        \
 249    .has_hiz_and_separate_stencil = true,            \
 250    .has_resource_streamer = true,                   \
 251    .must_use_separate_stencil = true,               \
 252    .has_llc = true,                                 \
 253    .has_pln = true,                                 \
 254    .supports_simd16_3src = true,                    \
 255    .max_vs_threads = 504,                           \
 256    .max_hs_threads = 504,                           \
 257    .max_ds_threads = 504,                           \
 258    .max_gs_threads = 504,                           \
 259    .max_wm_threads = 384
 260
 261 static const struct brw_device_info brw_device_info_bdw_gt1 = {
 262    GEN8_FEATURES, .gt = 1,
 263    .num_slices = 1,
 264    .max_cs_threads = 42,
 265    .urb = {
 266       .size = 192,
 267       .min_vs_entries = 64,
 268       .max_vs_entries = 2560,
 269       .max_hs_entries = 504,
 270       .min_ds_entries = 34,
 271       .max_ds_entries = 1536,
 272       .max_gs_entries = 960,
 273    }
 274 };
 275
 276 static const struct brw_device_info brw_device_info_bdw_gt2 = {
 277    GEN8_FEATURES, .gt = 2,
 278    .num_slices = 1,
 279    .max_cs_threads = 56,
 280    .urb = {
 281       .size = 384,
 282       .min_vs_entries = 64,
 283       .max_vs_entries = 2560,
 284       .max_hs_entries = 504,
 285       .min_ds_entries = 34,
 286       .max_ds_entries = 1536,
 287       .max_gs_entries = 960,
 288    }
 289 };
 290
 291 static const struct brw_device_info brw_device_info_bdw_gt3 = {
 292    GEN8_FEATURES, .gt = 3,
 293    .num_slices = 2,
 294    .max_cs_threads = 56,
 295    .urb = {
 296       .size = 384,
 297       .min_vs_entries = 64,
 298       .max_vs_entries = 2560,
 299       .max_hs_entries = 504,
 300       .min_ds_entries = 34,
 301       .max_ds_entries = 1536,
 302       .max_gs_entries = 960,
 303    }
 304 };
 305
 306 static const struct brw_device_info brw_device_info_chv = {
 307    GEN8_FEATURES, .is_cherryview = 1, .gt = 1,
 308    .has_llc = false,
 309    .num_slices = 1,
 310    .max_vs_threads = 80,
 311    .max_hs_threads = 80,
 312    .max_ds_threads = 80,
 313    .max_gs_threads = 80,
 314    .max_wm_threads = 128,
 315    .max_cs_threads = 28,
 316    .urb = {
 317       .size = 192,
 318       .min_vs_entries = 34,
 319       .max_vs_entries = 640,
 320       .max_hs_entries = 80,
 321       .min_ds_entries = 34,
 322       .max_ds_entries = 384,
 323       .max_gs_entries = 256,
 324    }
 325 };
 326
 327 #define GEN9_FEATURES                               \
 328    .gen = 9,                                        \
 329    .has_hiz_and_separate_stencil = true,            \
 330    .has_resource_streamer = true,                   \
 331    .must_use_separate_stencil = true,               \
 332    .has_llc = true,                                 \
 333    .has_pln = true,                                 \
 334    .supports_simd16_3src = true,                    \
 335    .max_vs_threads = 336,                           \
 336    .max_gs_threads = 336,                           \
 337    .max_hs_threads = 336,                           \
 338    .max_ds_threads = 336,                           \
 339    .max_wm_threads = 64 * 9,                        \
 340    .max_cs_threads = 56,                            \
 341    .urb = {                                         \
 342       .size = 384,                                  \
 343       .min_vs_entries = 64,                         \
 344       .max_vs_entries = 1856,                       \
 345       .max_hs_entries = 672,                        \
 346       .min_ds_entries = 34,                         \
 347       .max_ds_entries = 1120,                       \
 348       .max_gs_entries = 640,                        \
 349    }
 350
 351 static const struct brw_device_info brw_device_info_skl_gt1 = {
 352    GEN9_FEATURES, .gt = 1,
 353    .num_slices = 1,
 354    .urb.size = 192,
 355 };
 356
 357 static const struct brw_device_info brw_device_info_skl_gt2 = {
 358    GEN9_FEATURES, .gt = 2,
 359    .num_slices = 1,
 360 };
 361
 362 static const struct brw_device_info brw_device_info_skl_gt3 = {
 363    GEN9_FEATURES, .gt = 3,
 364    .num_slices = 2,
 365 };
 366
 367 static const struct brw_device_info brw_device_info_skl_gt4 = {
 368    GEN9_FEATURES, .gt = 4,
 369    .num_slices = 3,
 370    /* From the "L3 Allocation and Programming" documentation:
 371     *
 372     * "URB is limited to 1008KB due to programming restrictions.  This is not a
 373     * restriction of the L3 implementation, but of the FF and other clients.
 374     * Therefore, in a GT4 implementation it is possible for the programmed
 375     * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but
 376     * only 1008KB of this will be used."
 377     */
 378    .urb.size = 1008 / 3,
 379 };
 380
 381 static const struct brw_device_info brw_device_info_bxt = {
 382    GEN9_FEATURES,
 383    .is_broxton = 1,
 384    .gt = 1,
 385    .has_llc = false,
 386
 387    /* XXX: These are preliminary thread counts and URB sizes. */
 388    .num_slices = 1,
 389    .max_vs_threads = 56,
 390    .max_hs_threads = 56,
 391    .max_ds_threads = 56,
 392    .max_gs_threads = 56,
 393    .max_wm_threads = 64 * 3,
 394    .max_cs_threads = 28,
 395    .urb = {
 396       .size = 64,
 397       .min_vs_entries = 34,
 398       .max_vs_entries = 640,
 399       .max_hs_entries = 80,
 400       .max_ds_entries = 80,
 401       .max_gs_entries = 256,
 402    }
 403 };
 404
 405 /*
 406  * Note: for all KBL SKUs, the PRM says SKL for GS entries, not SKL+.
 407  * There's no KBL entry. Using the default SKL (GEN9) GS entries value.
 408  */
 409
 410 /*
 411  * Both SKL and KBL support a maximum of 64 threads per
 412  * Pixel Shader Dispatch (PSD) unit.
 413  */
 414 #define  KBL_MAX_THREADS_PER_PSD 64
 415
 416 static const struct brw_device_info brw_device_info_kbl_gt1 = {
 417    GEN9_FEATURES,
 418    .gt = 1,
 419
 420    .max_cs_threads = 7 * 6,
 421    .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 2,
 422    .urb.size = 192,
 423    .num_slices = 1,
 424 };
 425
 426 static const struct brw_device_info brw_device_info_kbl_gt1_5 = {
 427    GEN9_FEATURES,
 428    .gt = 1,
 429
 430    .max_cs_threads = 7 * 6,
 431    .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 3,
 432    .num_slices = 1,
 433 };
 434
 435 static const struct brw_device_info brw_device_info_kbl_gt2 = {
 436    GEN9_FEATURES,
 437    .gt = 2,
 438
 439    .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 3,
 440    .num_slices = 1,
 441 };
 442
 443 static const struct brw_device_info brw_device_info_kbl_gt3 = {
 444    GEN9_FEATURES,
 445    .gt = 3,
 446
 447    .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 6,
 448    .num_slices = 2,
 449 };
 450
 451 static const struct brw_device_info brw_device_info_kbl_gt4 = {
 452    GEN9_FEATURES,
 453    .gt = 4,
 454
 455    .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 9,
 456    /*
 457     * From the "L3 Allocation and Programming" documentation:
 458     *
 459     * "URB is limited to 1008KB due to programming restrictions.  This
 460     *  is not a restriction of the L3 implementation, but of the FF and
 461     *  other clients.  Therefore, in a GT4 implementation it is
 462     *  possible for the programmed allocation of the L3 data array to
 463     *  provide 3*384KB=1152KB for URB, but only 1008KB of this
 464     *  will be used."
 465     */
 466    .urb.size = 1008 / 3,
 467    .num_slices = 3,
 468 };
 469
 470 const struct brw_device_info *
 471 brw_get_device_info(int devid)
 472 {
 473    const struct brw_device_info *devinfo;
 474    switch (devid) {
 475 #undef CHIPSET
 476 #define CHIPSET(id, family, name) \
 477    case id: devinfo = &brw_device_info_##family; break;
 478 #include "pci_ids/i965_pci_ids.h"
 479    default:
 480       fprintf(stderr, "i965_dri.so does not support the 0x%x PCI ID.\n", devid);
 481       return NULL;
 482    }
 483
 484    return devinfo;
 485 }
 486
 487 const char *
 488 brw_get_device_name(int devid)
 489 {
 490    switch (devid) {
 491 #undef CHIPSET
 492 #define CHIPSET(id, family, name) case id: return name;
 493 #include "pci_ids/i965_pci_ids.h"
 494    default:
 495       return NULL;
 496    }
 497 }