2 * Copyright © 2013 Intel Corporation
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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26 #include "brw_device_info.h"
28 static const struct brw_device_info brw_device_info_i965
= {
30 .has_negative_rhw_bug
= true,
31 .needs_unlit_centroid_workaround
= true,
34 .max_wm_threads
= 8 * 4,
40 static const struct brw_device_info brw_device_info_g4x
= {
42 .needs_unlit_centroid_workaround
= true,
46 .max_wm_threads
= 10 * 5,
52 static const struct brw_device_info brw_device_info_ilk
= {
54 .needs_unlit_centroid_workaround
= true,
57 .max_wm_threads
= 12 * 6,
63 static const struct brw_device_info brw_device_info_snb_gt1
= {
66 .has_hiz_and_separate_stencil
= true,
68 .needs_unlit_centroid_workaround
= true,
70 .max_gs_threads
= 21, /* conservative; 24 if rendering disabled. */
75 .max_vs_entries
= 256,
76 .max_gs_entries
= 256,
80 static const struct brw_device_info brw_device_info_snb_gt2
= {
83 .has_hiz_and_separate_stencil
= true,
85 .needs_unlit_centroid_workaround
= true,
92 .max_vs_entries
= 256,
93 .max_gs_entries
= 256,
97 #define GEN7_FEATURES \
99 .has_hiz_and_separate_stencil = true, \
100 .must_use_separate_stencil = true, \
102 .needs_unlit_centroid_workaround = true
104 static const struct brw_device_info brw_device_info_ivb_gt1
= {
105 GEN7_FEATURES
, .is_ivybridge
= true, .gt
= 1,
106 .max_vs_threads
= 36,
107 .max_gs_threads
= 36,
108 .max_wm_threads
= 48,
111 .min_vs_entries
= 32,
112 .max_vs_entries
= 512,
113 .max_gs_entries
= 192,
117 static const struct brw_device_info brw_device_info_ivb_gt2
= {
118 GEN7_FEATURES
, .is_ivybridge
= true, .gt
= 2,
119 .max_vs_threads
= 128,
120 .max_gs_threads
= 128,
121 .max_wm_threads
= 172,
124 .min_vs_entries
= 32,
125 .max_vs_entries
= 704,
126 .max_gs_entries
= 320,
130 static const struct brw_device_info brw_device_info_byt
= {
131 GEN7_FEATURES
, .is_baytrail
= true, .gt
= 1,
133 .max_vs_threads
= 36,
134 .max_gs_threads
= 36,
135 .max_wm_threads
= 48,
138 .min_vs_entries
= 32,
139 .max_vs_entries
= 512,
140 .max_gs_entries
= 192,
144 static const struct brw_device_info brw_device_info_hsw_gt1
= {
145 GEN7_FEATURES
, .is_haswell
= true, .gt
= 1,
146 .max_vs_threads
= 70,
147 .max_gs_threads
= 70,
148 .max_wm_threads
= 102,
151 .min_vs_entries
= 32,
152 .max_vs_entries
= 640,
153 .max_gs_entries
= 256,
157 static const struct brw_device_info brw_device_info_hsw_gt2
= {
158 GEN7_FEATURES
, .is_haswell
= true, .gt
= 2,
159 .max_vs_threads
= 280,
160 .max_gs_threads
= 256,
161 .max_wm_threads
= 204,
164 .min_vs_entries
= 64,
165 .max_vs_entries
= 1664,
166 .max_gs_entries
= 640,
170 static const struct brw_device_info brw_device_info_hsw_gt3
= {
171 GEN7_FEATURES
, .is_haswell
= true, .gt
= 3,
172 .max_vs_threads
= 280,
173 .max_gs_threads
= 256,
174 .max_wm_threads
= 408,
177 .min_vs_entries
= 64,
178 .max_vs_entries
= 1664,
179 .max_gs_entries
= 640,
183 const struct brw_device_info
*
184 brw_get_device_info(int devid
)
188 #define CHIPSET(id, family, name) case id: return &brw_device_info_##family;
189 #include "pci_ids/i965_pci_ids.h"
191 fprintf(stderr
, "Unknown Intel device.");