src/mesa/drivers/dri/i965/brw_eu.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_EU_H
  34 #define BRW_EU_H
  35
  36 #include <stdbool.h>
  37 #include "brw_inst.h"
  38 #include "brw_eu_defines.h"
  39 #include "brw_reg.h"
  40 #include "intel_asm_annotation.h"
  41
  42 #ifdef __cplusplus
  43 extern "C" {
  44 #endif
  45
  46 #define BRW_EU_MAX_INSN_STACK 5
  47
  48 /* A helper for accessing the last instruction emitted.  This makes it easy
  49  * to set various bits on an instruction without having to create temporary
  50  * variable and assign the emitted instruction to those.
  51  */
  52 #define brw_last_inst (&p->store[p->nr_insn - 1])
  53
  54 struct brw_codegen {
  55    brw_inst *store;
  56    int store_size;
  57    unsigned nr_insn;
  58    unsigned int next_insn_offset;
  59
  60    void *mem_ctx;
  61
  62    /* Allow clients to push/pop instruction state:
  63     */
  64    brw_inst stack[BRW_EU_MAX_INSN_STACK];
  65    bool compressed_stack[BRW_EU_MAX_INSN_STACK];
  66    brw_inst *current;
  67
  68    bool single_program_flow;
  69    const struct gen_device_info *devinfo;
  70
  71    /* Control flow stacks:
  72     * - if_stack contains IF and ELSE instructions which must be patched
  73     *   (and popped) once the matching ENDIF instruction is encountered.
  74     *
  75     *   Just store the instruction pointer(an index).
  76     */
  77    int *if_stack;
  78    int if_stack_depth;
  79    int if_stack_array_size;
  80
  81    /**
  82     * loop_stack contains the instruction pointers of the starts of loops which
  83     * must be patched (and popped) once the matching WHILE instruction is
  84     * encountered.
  85     */
  86    int *loop_stack;
  87    /**
  88     * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
  89     * blocks they were popping out of, to fix up the mask stack.  This tracks
  90     * the IF/ENDIF nesting in each current nested loop level.
  91     */
  92    int *if_depth_in_loop;
  93    int loop_stack_depth;
  94    int loop_stack_array_size;
  95 };
  96
  97 void brw_pop_insn_state( struct brw_codegen *p );
  98 void brw_push_insn_state( struct brw_codegen *p );
  99 void brw_set_default_exec_size(struct brw_codegen *p, unsigned value);
 100 void brw_set_default_mask_control( struct brw_codegen *p, unsigned value );
 101 void brw_set_default_saturate( struct brw_codegen *p, bool enable );
 102 void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode );
 103 void brw_inst_set_compression(const struct gen_device_info *devinfo,
 104                               brw_inst *inst, bool on);
 105 void brw_set_default_compression(struct brw_codegen *p, bool on);
 106 void brw_inst_set_group(const struct gen_device_info *devinfo,
 107                         brw_inst *inst, unsigned group);
 108 void brw_set_default_group(struct brw_codegen *p, unsigned group);
 109 void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c);
 110 void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc );
 111 void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse);
 112 void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
 113 void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value);
 114
 115 void brw_init_codegen(const struct gen_device_info *, struct brw_codegen *p,
 116                       void *mem_ctx);
 117 int brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
 118                          struct brw_inst *inst, bool is_compacted);
 119 void brw_disassemble(const struct gen_device_info *devinfo, void *assembly,
 120                      int start, int end, FILE *out);
 121 const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz );
 122
 123 brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
 124 void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest);
 125 void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 126
 127 void gen6_resolve_implied_move(struct brw_codegen *p,
 128                                struct brw_reg *src,
 129                                unsigned msg_reg_nr);
 130
 131 /* Helpers for regular instructions:
 132  */
 133 #define ALU1(OP)                                \
 134 brw_inst *brw_##OP(struct brw_codegen *p,       \
 135               struct brw_reg dest,              \
 136               struct brw_reg src0);
 137
 138 #define ALU2(OP)                                \
 139 brw_inst *brw_##OP(struct brw_codegen *p,       \
 140               struct brw_reg dest,              \
 141               struct brw_reg src0,              \
 142               struct brw_reg src1);
 143
 144 #define ALU3(OP)                                \
 145 brw_inst *brw_##OP(struct brw_codegen *p,       \
 146               struct brw_reg dest,              \
 147               struct brw_reg src0,              \
 148               struct brw_reg src1,              \
 149               struct brw_reg src2);
 150
 151 #define ROUND(OP) \
 152 void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0);
 153
 154 ALU1(MOV)
 155 ALU2(SEL)
 156 ALU1(NOT)
 157 ALU2(AND)
 158 ALU2(OR)
 159 ALU2(XOR)
 160 ALU2(SHR)
 161 ALU2(SHL)
 162 ALU1(DIM)
 163 ALU2(ASR)
 164 ALU1(F32TO16)
 165 ALU1(F16TO32)
 166 ALU2(ADD)
 167 ALU2(AVG)
 168 ALU2(MUL)
 169 ALU1(FRC)
 170 ALU1(RNDD)
 171 ALU2(MAC)
 172 ALU2(MACH)
 173 ALU1(LZD)
 174 ALU2(DP4)
 175 ALU2(DPH)
 176 ALU2(DP3)
 177 ALU2(DP2)
 178 ALU2(LINE)
 179 ALU2(PLN)
 180 ALU3(MAD)
 181 ALU3(LRP)
 182 ALU1(BFREV)
 183 ALU3(BFE)
 184 ALU2(BFI1)
 185 ALU3(BFI2)
 186 ALU1(FBH)
 187 ALU1(FBL)
 188 ALU1(CBIT)
 189 ALU2(ADDC)
 190 ALU2(SUBB)
 191 ALU2(MAC)
 192
 193 ROUND(RNDZ)
 194 ROUND(RNDE)
 195
 196 #undef ALU1
 197 #undef ALU2
 198 #undef ALU3
 199 #undef ROUND
 200
 201
 202 /* Helpers for SEND instruction:
 203  */
 204 void brw_set_sampler_message(struct brw_codegen *p,
 205                              brw_inst *insn,
 206                              unsigned binding_table_index,
 207                              unsigned sampler,
 208                              unsigned msg_type,
 209                              unsigned response_length,
 210                              unsigned msg_length,
 211                              unsigned header_present,
 212                              unsigned simd_mode,
 213                              unsigned return_format);
 214
 215 void brw_set_message_descriptor(struct brw_codegen *p,
 216                                 brw_inst *inst,
 217                                 enum brw_message_target sfid,
 218                                 unsigned msg_length,
 219                                 unsigned response_length,
 220                                 bool header_present,
 221                                 bool end_of_thread);
 222
 223 void brw_set_dp_read_message(struct brw_codegen *p,
 224                              brw_inst *insn,
 225                              unsigned binding_table_index,
 226                              unsigned msg_control,
 227                              unsigned msg_type,
 228                              unsigned target_cache,
 229                              unsigned msg_length,
 230                              bool header_present,
 231                              unsigned response_length);
 232
 233 void brw_set_dp_write_message(struct brw_codegen *p,
 234                               brw_inst *insn,
 235                               unsigned binding_table_index,
 236                               unsigned msg_control,
 237                               unsigned msg_type,
 238                               unsigned target_cache,
 239                               unsigned msg_length,
 240                               bool header_present,
 241                               unsigned last_render_target,
 242                               unsigned response_length,
 243                               unsigned end_of_thread,
 244                               unsigned send_commit_msg);
 245
 246 void brw_urb_WRITE(struct brw_codegen *p,
 247                    struct brw_reg dest,
 248                    unsigned msg_reg_nr,
 249                    struct brw_reg src0,
 250                    enum brw_urb_write_flags flags,
 251                    unsigned msg_length,
 252                    unsigned response_length,
 253                    unsigned offset,
 254                    unsigned swizzle);
 255
 256 /**
 257  * Send message to shared unit \p sfid with a possibly indirect descriptor \p
 258  * desc.  If \p desc is not an immediate it will be transparently loaded to an
 259  * address register using an OR instruction.  The returned instruction can be
 260  * passed as argument to the usual brw_set_*_message() functions in order to
 261  * specify any additional descriptor bits -- If \p desc is an immediate this
 262  * will be the SEND instruction itself, otherwise it will be the OR
 263  * instruction.
 264  */
 265 struct brw_inst *
 266 brw_send_indirect_message(struct brw_codegen *p,
 267                           unsigned sfid,
 268                           struct brw_reg dst,
 269                           struct brw_reg payload,
 270                           struct brw_reg desc);
 271
 272 void brw_ff_sync(struct brw_codegen *p,
 273                    struct brw_reg dest,
 274                    unsigned msg_reg_nr,
 275                    struct brw_reg src0,
 276                    bool allocate,
 277                    unsigned response_length,
 278                    bool eot);
 279
 280 void brw_svb_write(struct brw_codegen *p,
 281                    struct brw_reg dest,
 282                    unsigned msg_reg_nr,
 283                    struct brw_reg src0,
 284                    unsigned binding_table_index,
 285                    bool   send_commit_msg);
 286
 287 void brw_fb_WRITE(struct brw_codegen *p,
 288                    struct brw_reg payload,
 289                    struct brw_reg implied_header,
 290                    unsigned msg_control,
 291                    unsigned binding_table_index,
 292                    unsigned msg_length,
 293                    unsigned response_length,
 294                    bool eot,
 295                    bool last_render_target,
 296                    bool header_present);
 297
 298 brw_inst *gen9_fb_READ(struct brw_codegen *p,
 299                        struct brw_reg dst,
 300                        struct brw_reg payload,
 301                        unsigned binding_table_index,
 302                        unsigned msg_length,
 303                        unsigned response_length,
 304                        bool per_sample);
 305
 306 void brw_SAMPLE(struct brw_codegen *p,
 307                 struct brw_reg dest,
 308                 unsigned msg_reg_nr,
 309                 struct brw_reg src0,
 310                 unsigned binding_table_index,
 311                 unsigned sampler,
 312                 unsigned msg_type,
 313                 unsigned response_length,
 314                 unsigned msg_length,
 315                 unsigned header_present,
 316                 unsigned simd_mode,
 317                 unsigned return_format);
 318
 319 void brw_adjust_sampler_state_pointer(struct brw_codegen *p,
 320                                       struct brw_reg header,
 321                                       struct brw_reg sampler_index);
 322
 323 void gen4_math(struct brw_codegen *p,
 324                struct brw_reg dest,
 325                unsigned function,
 326                unsigned msg_reg_nr,
 327                struct brw_reg src,
 328                unsigned precision );
 329
 330 void gen6_math(struct brw_codegen *p,
 331                struct brw_reg dest,
 332                unsigned function,
 333                struct brw_reg src0,
 334                struct brw_reg src1);
 335
 336 void brw_oword_block_read(struct brw_codegen *p,
 337                           struct brw_reg dest,
 338                           struct brw_reg mrf,
 339                           uint32_t offset,
 340                           uint32_t bind_table_index);
 341
 342 unsigned brw_scratch_surface_idx(const struct brw_codegen *p);
 343
 344 void brw_oword_block_read_scratch(struct brw_codegen *p,
 345                                   struct brw_reg dest,
 346                                   struct brw_reg mrf,
 347                                   int num_regs,
 348                                   unsigned offset);
 349
 350 void brw_oword_block_write_scratch(struct brw_codegen *p,
 351                                    struct brw_reg mrf,
 352                                    int num_regs,
 353                                    unsigned offset);
 354
 355 void gen7_block_read_scratch(struct brw_codegen *p,
 356                              struct brw_reg dest,
 357                              int num_regs,
 358                              unsigned offset);
 359
 360 void brw_shader_time_add(struct brw_codegen *p,
 361                          struct brw_reg payload,
 362                          uint32_t surf_index);
 363
 364 /**
 365  * Return the generation-specific jump distance scaling factor.
 366  *
 367  * Given the number of instructions to jump, we need to scale by
 368  * some number to obtain the actual jump distance to program in an
 369  * instruction.
 370  */
 371 static inline unsigned
 372 brw_jump_scale(const struct gen_device_info *devinfo)
 373 {
 374    /* Broadwell measures jump targets in bytes. */
 375    if (devinfo->gen >= 8)
 376       return 16;
 377
 378    /* Ironlake and later measure jump targets in 64-bit data chunks (in order
 379     * (to support compaction), so each 128-bit instruction requires 2 chunks.
 380     */
 381    if (devinfo->gen >= 5)
 382       return 2;
 383
 384    /* Gen4 simply uses the number of 128-bit instructions. */
 385    return 1;
 386 }
 387
 388 void brw_barrier(struct brw_codegen *p, struct brw_reg src);
 389
 390 /* If/else/endif.  Works by manipulating the execution flags on each
 391  * channel.
 392  */
 393 brw_inst *brw_IF(struct brw_codegen *p, unsigned execute_size);
 394 brw_inst *gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional,
 395                   struct brw_reg src0, struct brw_reg src1);
 396
 397 void brw_ELSE(struct brw_codegen *p);
 398 void brw_ENDIF(struct brw_codegen *p);
 399
 400 /* DO/WHILE loops:
 401  */
 402 brw_inst *brw_DO(struct brw_codegen *p, unsigned execute_size);
 403
 404 brw_inst *brw_WHILE(struct brw_codegen *p);
 405
 406 brw_inst *brw_BREAK(struct brw_codegen *p);
 407 brw_inst *brw_CONT(struct brw_codegen *p);
 408 brw_inst *gen6_HALT(struct brw_codegen *p);
 409
 410 /* Forward jumps:
 411  */
 412 void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx);
 413
 414 brw_inst *brw_JMPI(struct brw_codegen *p, struct brw_reg index,
 415                    unsigned predicate_control);
 416
 417 void brw_NOP(struct brw_codegen *p);
 418
 419 void brw_WAIT(struct brw_codegen *p);
 420
 421 /* Special case: there is never a destination, execution size will be
 422  * taken from src0:
 423  */
 424 void brw_CMP(struct brw_codegen *p,
 425              struct brw_reg dest,
 426              unsigned conditional,
 427              struct brw_reg src0,
 428              struct brw_reg src1);
 429
 430 void
 431 brw_untyped_atomic(struct brw_codegen *p,
 432                    struct brw_reg dst,
 433                    struct brw_reg payload,
 434                    struct brw_reg surface,
 435                    unsigned atomic_op,
 436                    unsigned msg_length,
 437                    bool response_expected);
 438
 439 void
 440 brw_untyped_surface_read(struct brw_codegen *p,
 441                          struct brw_reg dst,
 442                          struct brw_reg payload,
 443                          struct brw_reg surface,
 444                          unsigned msg_length,
 445                          unsigned num_channels);
 446
 447 void
 448 brw_untyped_surface_write(struct brw_codegen *p,
 449                           struct brw_reg payload,
 450                           struct brw_reg surface,
 451                           unsigned msg_length,
 452                           unsigned num_channels);
 453
 454 void
 455 brw_typed_atomic(struct brw_codegen *p,
 456                  struct brw_reg dst,
 457                  struct brw_reg payload,
 458                  struct brw_reg surface,
 459                  unsigned atomic_op,
 460                  unsigned msg_length,
 461                  bool response_expected);
 462
 463 void
 464 brw_typed_surface_read(struct brw_codegen *p,
 465                        struct brw_reg dst,
 466                        struct brw_reg payload,
 467                        struct brw_reg surface,
 468                        unsigned msg_length,
 469                        unsigned num_channels);
 470
 471 void
 472 brw_typed_surface_write(struct brw_codegen *p,
 473                         struct brw_reg payload,
 474                         struct brw_reg surface,
 475                         unsigned msg_length,
 476                         unsigned num_channels);
 477
 478 void
 479 brw_memory_fence(struct brw_codegen *p,
 480                  struct brw_reg dst);
 481
 482 void
 483 brw_pixel_interpolator_query(struct brw_codegen *p,
 484                              struct brw_reg dest,
 485                              struct brw_reg mrf,
 486                              bool noperspective,
 487                              unsigned mode,
 488                              struct brw_reg data,
 489                              unsigned msg_length,
 490                              unsigned response_length);
 491
 492 void
 493 brw_find_live_channel(struct brw_codegen *p,
 494                       struct brw_reg dst,
 495                       struct brw_reg mask);
 496
 497 void
 498 brw_broadcast(struct brw_codegen *p,
 499               struct brw_reg dst,
 500               struct brw_reg src,
 501               struct brw_reg idx);
 502
 503 /***********************************************************************
 504  * brw_eu_util.c:
 505  */
 506
 507 void brw_copy_indirect_to_indirect(struct brw_codegen *p,
 508                                    struct brw_indirect dst_ptr,
 509                                    struct brw_indirect src_ptr,
 510                                    unsigned count);
 511
 512 void brw_copy_from_indirect(struct brw_codegen *p,
 513                             struct brw_reg dst,
 514                             struct brw_indirect ptr,
 515                             unsigned count);
 516
 517 void brw_copy4(struct brw_codegen *p,
 518                struct brw_reg dst,
 519                struct brw_reg src,
 520                unsigned count);
 521
 522 void brw_copy8(struct brw_codegen *p,
 523                struct brw_reg dst,
 524                struct brw_reg src,
 525                unsigned count);
 526
 527 void brw_math_invert( struct brw_codegen *p,
 528                       struct brw_reg dst,
 529                       struct brw_reg src);
 530
 531 void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
 532
 533 void brw_set_uip_jip(struct brw_codegen *p, int start_offset);
 534
 535 enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
 536 enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
 537
 538 /* brw_eu_compact.c */
 539 void brw_init_compaction_tables(const struct gen_device_info *devinfo);
 540 void brw_compact_instructions(struct brw_codegen *p, int start_offset,
 541                               int num_annotations, struct annotation *annotation);
 542 void brw_uncompact_instruction(const struct gen_device_info *devinfo,
 543                                brw_inst *dst, brw_compact_inst *src);
 544 bool brw_try_compact_instruction(const struct gen_device_info *devinfo,
 545                                  brw_compact_inst *dst, brw_inst *src);
 546
 547 void brw_debug_compact_uncompact(const struct gen_device_info *devinfo,
 548                                  brw_inst *orig, brw_inst *uncompacted);
 549
 550 /* brw_eu_validate.c */
 551 bool brw_validate_instructions(const struct brw_codegen *p, int start_offset,
 552                                struct annotation_info *annotation);
 553
 554 static inline int
 555 next_offset(const struct gen_device_info *devinfo, void *store, int offset)
 556 {
 557    brw_inst *insn = (brw_inst *)((char *)store + offset);
 558
 559    if (brw_inst_cmpt_control(devinfo, insn))
 560       return offset + 8;
 561    else
 562       return offset + 16;
 563 }
 564
 565 struct opcode_desc {
 566    /* The union is an implementation detail used by brw_opcode_desc() to handle
 567     * opcodes that have been reused for different instructions across hardware
 568     * generations.
 569     *
 570     * The gens field acts as a tag. If it is non-zero, name points to a string
 571     * containing the instruction mnemonic. If it is zero, the table field is
 572     * valid and either points to a secondary opcode_desc table with 'size'
 573     * elements or is NULL and no such instruction exists for the opcode.
 574     */
 575    union {
 576       struct {
 577          char    *name;
 578          int      nsrc;
 579       };
 580       struct {
 581          const struct opcode_desc *table;
 582          unsigned size;
 583       };
 584    };
 585    int      ndst;
 586    int      gens;
 587 };
 588
 589 const struct opcode_desc *
 590 brw_opcode_desc(const struct gen_device_info *devinfo, enum opcode opcode);
 591
 592 static inline bool
 593 is_3src(const struct gen_device_info *devinfo, enum opcode opcode)
 594 {
 595    const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
 596    return desc && desc->nsrc == 3;
 597 }
 598
 599 /** Maximum SEND message length */
 600 #define BRW_MAX_MSG_LENGTH 15
 601
 602 /** First MRF register used by pull loads */
 603 #define FIRST_SPILL_MRF(gen) ((gen) == 6 ? 21 : 13)
 604
 605 /** First MRF register used by spills */
 606 #define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13)
 607
 608 #ifdef __cplusplus
 609 }
 610 #endif
 611
 612 #endif